JP2002093061A - Disk drive - Google Patents

Abstract

(57) [Problem] To enable quick access to a target track when recording and reproduction are performed by activating disk rotation in a disk drive device. SOLUTION: In accordance with the remaining storage capacity of a memory for accumulating reproduction data, an optical pickup outputs a read signal from a disk intermittently, and when the disk starts rotating at the start of the intermittent read operation. Control for forcibly setting an oscillation frequency of a PLL circuit for extracting a clock component included in a read signal from a disk to a predetermined frequency set according to a radial position of the optical pickup and a rotation speed of the disk at that time. Is performed, the PLL circuit is quickly locked to the read signal when the disk is started to rotate, thereby shortening the access time at the time of starting the disk rotation. Also, the characteristics of the band-pass filter and the peak holding means for processing the output of the optical pickup are variably set according to the rotation speed of the disk.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk drive for recording or reproducing data on, for example, an optical disk or a magneto-optical disk. Related to the technology.

[0002]

2. Description of the Related Art CD (Compact Disc), MD (Mini Dis
c), DVD (Digital Video Disc or Digital Versat
2. Description of the Related Art In a disk drive device that performs recording or reproduction on an optical disk such as an ile disc) or a magneto-optical disk, an optical pickup that irradiates the disk with laser light requires tracking control to follow a track on the disk.

That is, an optical pickup for irradiating a laser beam to a disk requires a sled feed for moving the entire pickup in the radial direction of the disk and only a few optical components for irradiating a laser beam such as a lens in the optical pickup.
The target track position on the disk is set by tracking control by a tracking adjustment mechanism that moves the disk in the radial direction within a range of approximately mm (for example, a range of approximately several hundred tracks in the number of tracks). Here, for example, when performing recording or reproduction continuously on a spirally formed track on a disk, a combination of movement of the entire optical pickup by thread feed and tracking control by a tracking adjustment mechanism is executed. , So as to follow the track continuously.

In order to perform tracking control by the tracking adjustment mechanism, the return light of the laser beam irradiated on the disk by the optical pickup is divided into a plurality of parts and detected. A tracking error signal indicating a light shift is generated, and a voltage to be applied to a tracking correction coil is set based on the voltage of the tracking error signal so that a laser beam is applied to the center of a target track. It is set to the just track state. Here, when the tracking error signal is generated, various processes are performed to obtain a tracking error signal having good characteristics. For example, deviation of the visual field of the laser light in the optical pickup (deviation of the irradiation position of the laser light)
Conventionally, a field-of-view signal corresponding to the above is detected, and the tracking error signal is corrected with the field-of-view signal.

In order to generate this visual field signal, it is necessary to extract a predetermined frequency component from the detection output of the optical pickup with a band-pass filter or hold the peak value with peak holding means.

In recent years, it has been demanded that a disk drive be capable of recording and reproducing data at high speed. For example, in the case of continuously reproducing audio data or the like, a so-called 1 × speed reproduction in which the reproduction speed is continuously reproduced at a specified linear speed is performed.
Basically, continuous reproduction of audio data recorded on a disc can be performed. On the other hand, high-speed reproduction such as double-speed reproduction or quadruple-speed reproduction is performed, data is read at high speed, a certain amount of data is stored in a buffer memory in a short time, and the stored data is stored in the buffer memory. If audio is output continuously and the process of performing intermittent data reading such that data is reproduced from the disk again when the remaining amount of data in the buffer memory becomes low, the disk is driven to rotate. Time can be shortened, and power consumption can be reduced. Further, by changing the reproduction speed continuously according to the remaining amount of data in the buffer memory at that time (for example, continuously changing the reproduction speed in a range from 4 × speed reproduction to 1 × speed reproduction), more effect is obtained. It is also possible to reduce power consumption.

[0007]

In the case where the reproduction speed is variably set in the range from 4 × speed reproduction to 1 × speed reproduction as described above, a process for generating a tracking error signal from the output of the optical pickup. Also, when performing processing for detecting reproduction data from the output of an optical pickup, it is necessary to appropriately set each processing state in accordance with the reproduction speed (disk rotation speed). It can not be said that it is set to a state that it is, it takes time for the processing state to stabilize,
In some cases, it took a long time to access the disk at startup.

Specifically, for example, in the case of performing intermittent reproduction using a buffer memory as described above, it is necessary to frequently start the disk rotation because the reproduction is intermittent. Each time is performed, if a long time is required until a target track is accessed and data recorded on the track can be read, the operation state becomes inefficient.

The present invention has been made in view of such circumstances, and when starting or rotating a disk in this type of disk drive to perform recording or reproduction, access to a target track is quickly performed. The purpose is to be able to do it.

[0010]

SUMMARY OF THE INVENTION In order to solve this problem, the present invention intermittently executes output of a read signal from a disk by an optical pickup in accordance with the remaining capacity of a memory for storing reproduction data. When the disk starts rotating at the start of the intermittent reading, the oscillation frequency of the PLL circuit for extracting the clock component included in the read signal from the disk is determined by the radial position of the optical pickup and the rotating speed of the disk at that time. Control for forcibly setting a predetermined frequency which is set in accordance with.

According to the present invention, the oscillation frequency of the PLL circuit at the time of starting the rotation of the disk is forcibly set to a predetermined frequency set according to the radial position and the rotation speed of the optical pickup at that time. By oscillating at a frequency substantially close to the frequency of the clock component of the signal read from the disk, the PLL circuit can be quickly locked to the read signal.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the present invention will be described.
This will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram showing an example of the configuration of the disk drive of this embodiment. In this example, MD
FIG. 1 shows an example in which a disk drive device that performs recording and / or reproduction of an optical disk or a magneto-optical disk called (Mini Disc) is applied. FIG. 1 shows a processing configuration up to demodulating data read from the disk, FIG. 3 is a diagram illustrating an example of a configuration related to tracking control.

In the MD format, the tracks formed on the disk are formed in a spiral shape, and during normal reproduction, the innermost track is used as a lead-in area and is sequentially read from the innermost track. . However, data is not always recorded continuously. Also, M
In the format of D, in the case of a magneto-optical disk capable of recording a signal, tracks formed on the disk are slightly meandered (wobbled) at a predetermined frequency in advance, and the track address (sector address) is determined at the wobbling frequency. ) Is modulated and recorded, so that the track address can be read out even on a disc on which audio data and the like are not recorded. In the case of an optical disk which is a read-only disk in which audio data is recorded in advance, track addresses are recorded in pits.

In the case of the disk drive of this embodiment,
Assuming that the process of reproducing at a specified speed (linear speed) as the reproduction speed from the disc is 1 × speed reproduction, the reproduction speed can be varied in a range from 1 × speed reproduction to 4 × speed reproduction.

The disk drive of this embodiment shown in FIG. 1 has a disk 1 loaded in a cartridge 2 made of resin.
The disk 1 in the cartridge 2 mounted on the mounting portion is provided with a disk mounting portion on which a magneto-optical disk or an optical disk can be mounted. The signal recording surface of the disk 1 mounted on the disk mounting portion can be irradiated with laser light from the optical pickup 11. The optical pickup 11 is configured to be able to move in the radial direction of the disk by a thread feed mechanism (not shown). The optical pickup 11 irradiates a laser beam from the optical pickup to a track at a predetermined radial position, and records data on a track formed on the disk. Also, data recorded on a track can be reproduced.
When recording on the magneto-optical disk, the magnetic field modulation coil 1
Also use 2.

In the optical pickup 11, the return light of the laser light applied to the signal recording surface of the disk is detected by a four-divided detection unit (photodetector), and a voltage signal proportional to the detection level of the return light is detected. The detection unit outputs.
As shown in FIG. 2, for example, as shown in FIG. 2, the detector divided into four parts returns light at a position largely deviated to one side from the reference line with respect to the center of the track T formed on the disk in the longitudinal direction. A detecting unit Da for detecting return light, a detecting unit Db for detecting return light at a position slightly shifted to one side,
Detector Dc for detecting return light at a position slightly shifted to the other
And a detection unit Dd for detecting the return light at a position largely deviated from the other. The spot SP indicated by a broken line indicates the spot position of the return light in the just track state, for example. Here, the detection units Da, Db, Dc,
The outputs of Dd are referred to as signals Sa, Sb, Sc, and Sd.

Returning to the description of FIG.
The tracking position of the laser light applied from 1 to the disk 1 is set by the drive voltage supplied to the tracking coil 13 so as to follow a predetermined track. The application of the drive voltage to the tracking coil 13 is performed by a tracking coil drive circuit 29.

The signals Sa, Sb, Sc, and Sd output from the optical pickup 11 are supplied to an RF circuit (high-frequency circuit) 10, and each signal component is detected from the output. Specifically, the signal Sa and the signal Sb are added by the adder 14. The signal Sc and the signal Sd are
The addition is performed by the adder 15, and the output of the adder 14 and the output of the adder 15 are added by the adder 16 to obtain an RF signal for obtaining reproduction data.

This RF signal is supplied to a DSP (Digital Signal Processor) 30 for EFM modulation (8-14).
The converted (converted) data recorded on the disk (such as audio data) is supplied to the EFM decoder 31 for decoding. At this time, a clock component included in the RF signal is detected by a PLL circuit (phase locked loop circuit) 40, and a decoding process is performed by a decoder 31 synchronized with the detected clock. Then, the decoded reproduction data is stored in the buffer memory 32. If the reproduction data is audio data, the data stored at a constant rate is output from the buffer memory 32 during reproduction, and supplied to an audio data processing circuit (not shown) at the subsequent stage.

Returning to the description of the configuration of the RF circuit 10, the output of the adder 14 and the output of the adder 15 are supplied to the subtractor 17, and the difference signal between the output of the adder 14 and the output of the adder 15 is supplied. Get. The difference signal detected by the subtracter 17 becomes a tracking error signal component indicating whether the following track is shifted to the left or right from the center of the detection unit, and the tracking error signal component is used for tracking. The coil drive circuit 29 generates a drive voltage applied to the tracking coil 13. However, the subtractor 17
The tracking error signal component output by the control circuit includes components unnecessary for performing tracking control. After removing the unnecessary component, the tracking error signal TE output from the RF circuit 10 is obtained.

The configuration for removing unnecessary components necessary for generating the tracking error signal TE includes a configuration for removing a shift component of a visual field when tracking is turned on, and a configuration for removing a meandering component of a track.

As a configuration for removing the shift component of the visual field when tracking is turned on, the signals Sa and Sb output from the optical pickup 11 are supplied to separate peak hold circuits 18 and 19, respectively, and the peak value of each signal is set to a predetermined value. Hold by time constant. At this time, the time constant for holding the peak value in each of the peak hold circuits 18 and 19 is variably set under the control of a central control unit (CPU) 60 for controlling track access of the disk drive.

Then, each peak hold circuit 1
The values held in steps 8 and 19 are supplied to an averaging circuit 20, and the average value of both hold values is calculated. This averaging circuit 2
By calculating the average value at 0, the deviation of the laser beam irradiated on the track from the track center is detected. Here, such a signal is referred to as a visual field signal.

The visual field signal obtained by the averaging circuit 20 is supplied to a subtracter 21, and the visual field signal is subtracted from the tracking error signal component output from the subtracter 17, to obtain a signal from which the visual field signal component has been removed. However, in the case of this example, the removal of the visual field signal by the subtractor 21 is performed only when there is a change from the tracking off state in which the tracking control is not performed to the tracking on state in which the tracking control is performed. In a state where the tracking control is stable, the tracking error signal component supplied from the subtractor 17 is output as it is in the subtractor 21.

The output of the subtractor 21 is further supplied to a subtractor 28, where a field signal called a wobble push-pull signal Wpp is removed. As already mentioned,
When scanning a magneto-optical disk, a track formed on the disk has meandering at a predetermined frequency component called wobbling.
This is to remove it from the tracking error signal component.
When the disc to be reproduced is an optical disc, such a wobbling component does not exist, but a shift in the field of view of the laser light in the pickup may occur.
The process of removing the visual field signal due to the shift from the tracking error signal component is performed using the same circuit.

As a configuration for detecting the wobble push-pull signal Wpp, the signal Sa output from the optical pickup 11 is supplied to the band-pass filter 23 via the changeover switch 23a, and the wobbling frequency component Aw is extracted from the signal Sa. Let it. Also, the optical pickup 11
Is supplied to the bandpass filter 24 via the changeover switch 24a to extract the wobbling frequency component Dw from the signal Sd. The band pass filters 23 and 24 need to match the pass center frequency f ₀ with the wobbling frequency of the track.
With the control of 0, the passing center frequency f ₀ is variably set.

Output A of each bandpass filter 23, 24
w and Dw are supplied to the peak hold circuits 25 and 26, respectively, so that the peak values are held at a predetermined time constant, and the values held by the respective peak hold circuits 25 and 26 are sent to the subtracter 27. To detect the difference between the two signals. The difference signal detected by the subtractor 27 becomes a wobble push-pull signal Wpp (field signal) indicating a deviation of the field of view of the laser light in the optical pickup. The time constant for holding the peak value in each of the peak hold circuits 25 and 26 is variably set under the control of the CPU 60.

When the disk to be reproduced is an optical disk, since there is no wobbling component in the track, the switches Sa and S are switched so that the signals Sa and Sd are directly passed without passing through the band-pass filters 23 and. The signals are supplied to the peak hold circuits 25 and 26, and the field signal is detected by the subtracter 27. This changeover switch 23
Switching between a and 24a is controlled by, for example, discrimination of the disc type by the CPU 60.

Then, the wobble push-pull signal Wpp (field-of-view signal) obtained by the subtractor 27 is supplied to a subtractor 28, and the wobble push-pull signal Wpp is subtracted from the tracking error signal component output by the subtracter 21. hand,
The tracking error signal TE from which the component due to the shift of the field of view has been removed, and the tracking error signal TE,
After the phase is compensated by the phase compensation circuit 34 in the DSP 30, it is supplied to the tracking coil drive circuit 29. The tracking coil drive circuit 29 applies a drive voltage to the tracking coil 13 so that the tracking error signal TE becomes a constant voltage (for example, 0 V).

The tracking error signal component (the signal before removing the visual field signal component) output from the subtractor 17 is supplied to a band-pass filter 22, and the band-pass filter 22 extracts only the wobbling frequency component of the track. . The pass center frequency f ₀ of the band pass filter 22 is also variably set under the control of the CPU 60.
The wobbling frequency component extracted by the band-pass filter 22 includes the address data component ADIP recorded in the track as the wobbling frequency component, and supplies the output of the band-pass filter 22 to the address decoder 33 in the DSP 30. By doing so, the address (sector address) of the track being scanned by the optical pickup 11 at that time is decoded. The decoded track address is supplied to, for example, a central control unit (CPU) 60 that performs control related to disk drive, and is determined.

In the address decoder 33 in the DSP 30, the clock component included in the ADIP signal is detected by the PLL circuit 50, and the decoding process is performed by the decoder 33 in synchronization with the detected clock.

The DSP 30 is a circuit for performing digital processing. In practice, each signal output from the RF circuit 10 is
After being digitally converted by an analog / digital converter (not shown), it is supplied to the DSP 30.

Next, the configuration of the PLL circuit 40 for generating a clock for decoding in the EFM decoder 31 provided in the DSP 30 will be described with reference to FIG. PLL of this example
The circuit 40 supplies the EFM data (R
F signal) is supplied from a terminal 41 to a digital PLL circuit 42, and in the digital PLL circuit 42, a clock component included in the EFM data is extracted and output by comparison with an oscillation output of an oscillator of a voltage controlled oscillator 46. Let it. In the case of this example, the EFM data reproduced from the disc is data whose reproduction speed changes in the range of 1 × to 4 × speed, and the frequency of the EFM data changes corresponding to the change of the reproduction speed. Digital PL
The L circuit 42 has a configuration capable of coping with the frequency change.

The clock component output from the digital PLL circuit 42 is supplied to one fixed contact 43a of the changeover switch 43. The movable contact 4 of the changeover switch 43
When 3m is connected to one fixed contact 43a, the clock component output from the digital PLL circuit 42 is supplied to one input of the phase comparator 44, and the phase difference from the output of the frequency divider 47 is detected. After the phase error output is converted to a direct current by the low-pass filter 45, it is supplied to the voltage-controlled oscillator 46 so that the voltage-controlled oscillator 46 oscillates at a corresponding frequency. And the voltage controlled oscillator 46
Is supplied to the digital PLL circuit 42 and the frequency divider 47.

The PLL circuit 40 of this embodiment has a configuration in which a reference clock MCK from a reference clock generating means (not shown) built in the digital driving device is supplied to a terminal 48, and is obtained at the terminal 48. The reference clock is supplied to the frequency divider 49 to generate a predetermined frequency signal. In this case, the frequency division ratio of the frequency divider 49 is
Under the control of the CPU 60, the output frequency of the frequency divider 49 is correspondingly controlled. Specifically, 1
A frequency corresponding to the frequency at which the PLL circuit 40 locks during double-speed playback, a frequency corresponding to the frequency at which the PLL circuit 40 locks during double-speed playback, a frequency corresponding to the frequency at which the PLL circuit 40 locks during triple-speed playback, and quadruple-speed playback Sometimes, the frequency divider 49 can output four frequency signals having a frequency corresponding to the frequency at which the PLL circuit 40 locks.

The output of the frequency divider 49 is supplied to the changeover switch 4
3 to the other fixed contact 43b. When the movable contact 43m of the changeover switch 43 is connected to the other fixed contact 43b, the output of the frequency divider 49 is supplied to one input of the phase comparator 44. The changeover switch 43
Is controlled by the CPU 60. In the case of this example, the switching control is performed by connecting the movable contact 43m to the other fixed contact 43b when the CPU 60 starts rotating the disk 1 by the spindle motor 3 and starts decoding the reproduced data. Then, the voltage-controlled oscillator 46 is oscillated at a frequency corresponding to the signal supplied at that time, and immediately thereafter, the control for connecting the movable contact 43m to the one fixed contact 43a is performed.

Next, the configuration of the PLL circuit 50 for generating a clock for decoding in the address decoder 33 provided in the DSP 30 will be described with reference to FIG. PL of this example
In the L circuit 50, the ADIP signal supplied to the DSP 30 is supplied from a terminal 51 to a clock extraction circuit 52, and a clock component is extracted in the clock extraction circuit 52.

The clock component output from the clock extraction circuit 52 is connected to one fixed contact 5 of the changeover switch 53.
3a. The movable contact 53 of the changeover switch 53
When m is connected to one fixed contact 53a,
The clock component output from the clock extraction circuit 52 is supplied to one input of the phase comparator 54, the phase difference from the output of the frequency divider 57 is detected, and the phase error output is converted to DC by the low-pass filter 55. After that, the voltage is supplied to the voltage controlled oscillator 56 so that the voltage controlled oscillator 56 oscillates at the corresponding frequency. Then, the oscillation output of the voltage controlled oscillator 56 is supplied to the frequency divider 57.

The PLL circuit 50 of this embodiment has a configuration in which a reference clock MCK from a reference clock generating means (not shown) built in the digital driving device is supplied to a terminal 58, and is obtained at the terminal 58. The reference clock is supplied to the frequency divider 59 to generate a predetermined frequency signal. In this case, the frequency division ratio of the frequency divider 59 is
Under the control of the CPU 60, the output frequency of the frequency divider 59 is correspondingly controlled. Specifically, 1
A frequency corresponding to the frequency at which the PLL circuit 50 locks during double-speed playback, a frequency corresponding to the frequency at which the PLL circuit 50 locks during double-speed playback, a frequency corresponding to the frequency at which the PLL circuit 50 locks during triple-speed playback, and quadruple-speed playback Sometimes, the frequency divider 59 can output four frequency signals having a frequency corresponding to the frequency at which the PLL circuit 50 locks.

The output of the frequency divider 59 is supplied to the changeover switch 5
3 to the other fixed contact 53b. When the movable contact 53m of the changeover switch 53 is connected to the other fixed contact 53b, the output of the frequency divider 59 is supplied to one input of the phase comparator 54. The changeover switch 53
Is controlled by the CPU 60. In this example, the switching control is performed by connecting the movable contact 53m to the other fixed contact 53b when decoding the reproduced data when the CPU 60 starts the rotation of the disk 1 by the spindle motor 3 in the present embodiment. , Once the voltage controlled oscillator 56
Is oscillated at a frequency corresponding to the signal supplied at that time, and immediately thereafter, the movable contact 53m is connected to one of the fixed contacts 53a.
Is controlled to be connected.

Next, a description will be given of a process of reproducing data (such as audio data) recorded on the disk 1 by the disk drive device of this embodiment. In the case of this example, DSP3
0, the intermittent reproduction is performed based on the remaining amount of data stored in the memory 32.
This intermittent reproduction is executed under the control of the CPU 60, and FIG.
The control processing shown in the flowchart of FIG. That is,
During reproduction, the CPU 60 determines whether or not the remaining memory is equal to or smaller than the threshold Bth (step 101).

When it is detected that the remaining memory capacity is equal to or less than the threshold value Bth, the sleep state is turned off and the track for reproducing the data of the disk (the track on which the data following the last data stored in the memory 32 is recorded) is recorded. ) To access the optical pickup (step 10).
2). At the start of the access, if the disk is not driven to rotate by the spindle motor, the spindle motor is started to rotate the disk. And
It is determined whether or not the access to the track has been completed (step 103). When the access has been completed, a process of decoding the data read from the tracks subsequent to the accessed track and storing the data in the memory 32 is started (step 103). 104).

By storing in the memory 32, the memory 3
It is determined whether the remaining amount of data stored in the second storage device has reached the maximum storage amount Bmax (step 105). When it is determined that the maximum storage amount Bmax has been reached, reading from the track is stopped.
A sleep state is set (step 106), and step 1 is performed.
Return to the judgment of 01. In the sleep state, the rotation of the disk by the spindle motor is stopped. After setting the sleep state in step 106, step 102
Although the time until the access is started depends on the storage capacity of the buffer memory 32, for example, a time of about several tens of seconds is assumed. When the sleep state continues for about several tens of seconds, the rotation of the disk is completely stopped during that time.

FIG. 6 is a diagram showing an example of an operation state in which the intermittent reproduction is performed as described above. When in the sleep state, the remaining memory capacity decreases from the maximum storage capacity Bmax, and when the remaining memory capacity becomes equal to or less than the threshold value Bth, access to the track is started. When the access to the track is completed, data reading is started. Then, the remaining amount of memory becomes the maximum storage amount Bmax again, and this process is repeated as long as the reproduction continues. Time required for access (access time)
Is preferably as short as possible.

Here, in the case of this example, in order to reduce the access time, the PL required for decoding the reproduced data is
The L circuits 40 and 50 are locked in a short period of time at the time of access. When the PLL circuits 40 and 50 are locked, before the rotation speed of the disk stabilizes at the reproduction speed (linear speed) at that time. Then, the data read from the disk is decoded and stored in the memory 32.

FIG. 7 is a diagram showing the relationship between the details of the state when the remaining memory capacity becomes equal to or less than the threshold value Bth and the rotational frequency of the spindle motor proportional to the disk rotational speed. Is remaining memory below the threshold Bth, the access is started, the spindle motor is started, when a predetermined time t ₂ has elapsed, rotating at a frequency corresponding to the reproducing linear velocity that is required at that time I will be. In the case of the conventional intermittent reproduction, when the rotation frequency of the motor becomes stable, data reading from the disk is resumed,
It changed like the remaining memory capacity M2 indicated by the broken line in FIG.

On the other hand, in the case of the present embodiment, the processing for locking the PLL circuits 40 and 50 at a high speed from the start of access is performed, and the PLL circuits 40 and 50 are locked at time t ₁ until the rotation frequency of the motor is stabilized. 50 locks the reproduced data, decodes the reproduced data from the locked point, and stores the decoded data in the memory 32. The change characteristic of the memory remaining amount M1 indicated by the solid line in FIG. Become. In the case of the change characteristic of the memory remaining amount M1 in this example, since the data is read out and accumulated before the motor frequency is stabilized, the memory remaining amount M1 is maintained until the motor frequency is stabilized.
Is not linear.

Next, details of the processing for locking the PLL circuits 40 and 50 at a high speed at the time of access will be described with reference to the flowchart of FIG. This high-speed locking process is performed under the control of the CPU 60. First, immediately after the start of access, it is determined whether or not the rotation speed of the spindle motor at that time is lower than 10 Hz (step 111). Here, when it is determined that the frequency is not less than 10 Hz, the output frequencies of the frequency dividers 49 and 59 of both the PLL circuits 40 and 50 are locked (XTAL) at the time of the quadruple speed reproduction.
PLL 4), the movable contacts 43m, 53m of the changeover switches 43, 53 of the PLL circuits 40, 50 are connected to the other fixed contacts 43b, 53b, and the voltage-controlled oscillators 46, 56 are forcibly driven at that frequency. Oscillation (step 112).

When it is determined in step 111 that the rotation speed of the spindle motor is lower than 10 Hz,
Finally, it is determined whether or not the track address of the data read from the disk exceeds the address at the radius position of the optical pickup (step 113). Here, for example, it is determined whether or not the number has exceeded 500 clusters. When it is determined in this determination that the number of clusters exceeds 500 clusters, the frequency divider 4 of both PLL circuits 40 and 50
The output frequencies 9 and 59 are set to a frequency (XTAL PLL2) to be locked at the time of double speed reproduction, and the movable contacts 43 of the changeover switches 43 and 53 of the PLL circuits 40 and 50 are set.
m and 53m are connected to the other fixed contacts 43b and 53b, and the voltage controlled oscillators 46 and 56 are forcibly oscillated at the frequencies (step 114).

If it is determined in step 113 that the number of clusters does not exceed 500 clusters, both PLL circuits 40,
The output frequencies of the 50 frequency dividers 49 and 59 are set to a frequency (XTAL PLL1) to be locked at 1 × speed reproduction, and the changeover switches 43 and 53 of the PLL circuits 40 and 50 are set.
The movable contacts 43m and 53m of the other fixed contacts 43b and 5
3b, and the voltage-controlled oscillator 4
6, 56 are forcibly oscillated (step 115).

Then, step 114 or step 11
When the oscillation of the optical pickup 11 starts, the spindle motor is started (step 116).
To turn on the focus control for the track on the disk, turn on the tracking control for that track,
The LL circuits 40 and 50 are turned on (step 117).
When the disk is oscillated in step 112, the disk has already been driven to rotate, and
Move to 17.

After the processing in step 117 is performed, it is determined whether or not the PLL circuits 40 and 50 have locked the data read from the disk (step 118).
Wait for lock. When it is determined in step 118 that the PLL circuits 40 and 50 are locked, the address decoding by the address decoder 33 and the data decoding by the EFM decoder 31 are started, and the decoded data is stored in the memory 32 (step 118). 11
9).

Here, a description will be given of how each of the PLL circuits 40 and 50 is locked at a high speed by performing control as shown in the flowchart of FIG. 8. The relationship between the radial position of the optical pickup and the linear velocity when the motor is started will be described. To show the relationship,
As shown in FIG. In FIG. 9, the linear velocity is shown on the basis of double speed such as 1 × speed, 2 × speed, etc., and the horizontal axis is shown with the lapse of time (second) from the start of activation. In FIG.
Scanning characteristics of the track on the inner circumference side of the disk (line shown as the inner circumference), scanning characteristics of the track at a substantially intermediate radius position on the disk (line shown as the middle circumference), and the track on the outer circumference side of the disk Scanning characteristics (line shown as outer circumference)
At each position, the speed at which the spindle motor locks and the speed at which the PLL circuit is turned on are different. The time during which the PLL circuit is turned on is substantially constant without depending on the radial position of the pickup.

FIG. 10 shows the characteristic shown in FIG.
FIG. 4 is a diagram illustrating a linear velocity when an L circuit is turned on, and a cluster 0 is an innermost circumference side. As shown in FIG.
The linear velocity when the circuit is turned on increases as the pickup position changes toward the outer periphery.

Accordingly, as shown in the flow chart of FIG. 8, the PLL circuit 4 has three stages according to the rotation state of the disk at the start of access and the pickup position at that time.
By changing the on / off oscillation frequency of 0, 50, the PLL circuits 40, 50 can quickly lock to the data read from the disk in any state.

FIG. 11 shows a comparison between the waveform of the tracking error signal (FIG. 11A) and the phase comparator 44 in the PLL circuit 40 when accessing the inner track by performing the processing of this embodiment. FIG. 11 shows a change in voltage (FIG. 11B). FIG. 12 shows a case where the process of this example is performed to access a track (middle circumference) substantially at an intermediate position.
Tracking error signal waveform (FIG. 12A) and PLL
The change of the comparison voltage of the phase comparator 44 in the circuit 40 (FIG. 12)
B). FIG. 13 shows the waveform of the tracking error signal (FIG. 13A) when the process of the present example is performed to access the outer track, and FIG.
FIG. 13B shows a change in the comparison voltage of the phase comparator 44 in the LL circuit 40 (FIG. 13B). In any case, PL
The pull-in time from L on to PLL lock is short, which is a fraction of the time in the conventional case.

In the case of this embodiment, the pass center frequency f ₀ of each of the band-pass filters 22, 23, and 24 included in the RF circuit 10 and the peak hold circuits 18, 19, Since the CPU 60 controls the time constant for holding the peak values of 25 and 26, the tracking control to the target track can be performed at high speed at the time of access, and the detection of the track address by the address decoder 33 can be performed at high speed. This also contributes to shortening the access time.

FIG. 14 shows the optimum value of the pass center frequency f ₀ of each band-pass filter and the disk rotation speed (frequency).
FIG. 7 is a diagram showing a relationship between the characteristic and a change characteristic of an optimum value of the frequency f ₀ . Each of the band-pass filters 22, 23, and 24 is a filter for extracting a wobbling component of a track formed on the disk. The band-pass filters 22, 23, and 24 have a maximum value characteristic F1, a substantially intermediate value characteristic F2, and a minimum value characteristic F3. Is shown. The pass center frequency f ₀ of the bandpass filter may be set based on this characteristic. In the case of this example, as shown in FIG. 15, the characteristic obtained by approximating each characteristic F1, F2, F3 with two straight lines. F1 ', F2', to obtain F3 ', is to be set central pass frequency f ₀ of the bandpass filter based on its characteristics.

The process of performing the two-linear approximation will now be described. First, in the adjustment process at the time of manufacture, this disk drive device performs optimization adjustment of the frequency f ₀ at a known linear speed (n adj [double speed]). (F ₀ adj).

Then, the adjustment value of the frequency f ₀ (f ₀ ad
j) and the standard characteristics of the RF circuit (f ₀ typ, low slope side: k1
typ, high slope side: k2 typ), frequency f ₀ set value 1
Slope of two straight lines with 6 as the boundary (low-frequency side: k1, high-frequency side: k1
2) is obtained from the following equation. k1 = k1 typ * (1- CONST * (f 0 adj-f 0 typ)) k2 = k2 typ * (1-CONST * (f 0 adj-f 0 typ)) where, CONST is a fixed value.

The linear velocity n at the frequency f ₀ set value 16
16 [double speed] is obtained from the following equation. n 16 = n adj-k2 * (f ₀ adj-16) [f ₀ adj ≧ 16] n 16 = n adj-k1 * (f ₀ adj-16) [f ₀ adj <16] The value of this equation is It depends on the linear velocity at the time of adjustment.

Then, the current reproduction linear velocity (n [double speed])
For the frequency f₀Optimal value (f ₀) Is calculated from the following equation.
Thus, a value obtained by approximating the two straight lines is obtained. f₀= (N-n16) / k2 + 16 [n ≧ n16] f₀= (N-n 16) / k1 + 16 [n <n 16]

By setting the frequency of the band-pass filter with the value obtained by approximating the two straight lines, the optimum pass frequency can be set by a simple calculation process, and the tracking control and the detection of the address component can be performed quickly. It becomes possible. Here, two straight lines are approximated, but another straight line may be approximated. For example, in the case of a characteristic that can be approximated by one straight line, it is sufficient to approximate by one straight line, and when it is better to approximate three or more straight lines, by performing such an approximate calculation good.

In the case of this example, the time constants of the peak hold circuits 18, 19, 25, and 26 included in the RF circuit 10 are also optimized in accordance with the reproduction linear velocity at that time. is there. FIG. 16 shows an example of a tracking error signal obtained by performing a subtraction process in the subtractor 21 when the peak hold time constants in the peak hold circuits 18 and 19 are reduced, and FIG. 16A shows a thin solid line. Is a tracking error signal component supplied from the subtractor 17 side, and a thick solid line in FIG. 16A is a visual field signal detected by the averaging circuit 20,
FIG. 16B shows a tracking error signal obtained by performing the subtraction processing in the subtracter 21.

FIG. 17 shows the peak hold circuits 18 and 19
FIG. 17A shows an example of a tracking error signal obtained by performing a subtraction process in the subtractor 21 when the peak hold time constant is increased, and the thin solid line in FIG. 17A is a tracking error signal component, which is indicated by a thick solid line in FIG. 17A.
FIG. 17B shows a tracking error signal obtained by performing a subtraction process in the subtractor 21.

As shown in FIGS. 16 and 17, if the time constant is too small, the tracking performance as a visual field signal is lost, and if the time constant is too large, the gain decreases. It is preferable to always optimize the tracking error signal, so that an optimum tracking error signal can be obtained. Similarly, the peak hold circuits 25 and 26 in the RF circuit 10 are also always optimized similarly depending on the linear velocity, so that a good tracking error signal can be obtained.

In the above-described embodiment, in order to detect a visual field signal (wobble push-pull signal), the signal shown in FIG.
As shown in the figure, the detection unit divided into four in the direction orthogonal to the longitudinal direction of the track detects the return light of the laser light from the disk, and the signal Sa of the component shifted to the most one of them is detected.
And the signal Sd of the component shifted to the other side are converted to bandpass filters 23 and 24 and peak hold circuits 25 and 26.
And the visual field signal is detected, but the visual field signal may be detected from another configuration of the detection unit.

In the above-described embodiment, an example has been described in which the present invention is applied to the adjustment of a disk drive device for recording or reproducing a magneto-optical disk or an optical disk called an MD (mini-disk). Of course, it can be used also for frequency adjustment of a band-pass filter built in a disk drive that requires tracking servo control.

[0070]

According to the present invention, the oscillation frequency of the PLL circuit at the time of starting the rotation of the disk is forcibly set to a predetermined frequency set according to the radial position and the rotation speed of the optical pickup at that time. Thus, oscillation can be performed at a frequency substantially close to the frequency of the clock component of the signal read from the disk, and the PLL circuit can be quickly locked to the read signal, thereby shortening the access time when the disk starts rotating. For this reason, for example, even if the setting is made to perform high-speed reproduction, the PLL circuit is locked before the disk rotation is stabilized at the high-speed disk rotation when the disk rotation is started, so that the data read from the disk can be quickly read. Decoding can be performed, and efficient disk access can be performed.

In this case, a band pass filter for detecting a predetermined component from the output of the optical pickup is provided, and the center frequency of the band pass filter is variably set in accordance with the rotation speed of the disk by the spindle motor. When detecting a field-of-view signal or a track address from the output of the band-pass filter, the detection can be performed satisfactorily regardless of the rotational speed of the disk, and the disk can be accessed quickly from this point. Become like

When the pass center frequency of the band-pass filter is variably set, the correspondence between the pass center frequency of the band-pass filter and the rotational speed of the disk is obtained from the relationship between the pass center frequency and the rotational speed of the disk. By setting the curve with a line approximated by one or a plurality of straight lines, the center frequency of the filter passing can be variably set easily and satisfactorily.

Further, by setting the time constant of the peak hold means variably in accordance with the rotation speed of the disk by the spindle motor, a signal necessary for tracking control or the like is detected from the output of the peak hold means. This can be performed satisfactorily regardless of the rotational speed of the disk, and the disk can be quickly accessed from this point.

Further, a visual field signal indicating the shift amount of the irradiation position of the laser light in the optical pickup is generated based on the output of the peak hold means, so that the visual field signal is set to a good level. Thus, good tracking control becomes possible.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an example of a configuration of a disk drive device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing an example of a configuration for detecting return light in an optical pickup according to an embodiment;

FIG. 3 is a block diagram illustrating a configuration example of an EFM decoding PLL circuit according to an embodiment of the present invention;

FIG. 4 is a block diagram illustrating a configuration example of an address decoding PLL circuit according to an embodiment of the present invention.

FIG. 5 is a flowchart illustrating an example of an intermittent reproduction process according to an embodiment of the present invention.

FIG. 6 is an explanatory diagram showing an example of an intermittent reproduction operation according to an embodiment of the present invention.

FIG. 7 is an explanatory diagram showing a relationship between a spindle motor frequency and a memory remaining amount at the time of starting a disc in an intermittent reproduction operation according to an embodiment of the present invention.

FIG. 8 is a flowchart illustrating an example of an access process from a state where the spindle motor is not driven according to the embodiment of the present invention.

FIG. 9 is a characteristic diagram illustrating a relationship between a linear velocity and a pickup position when a spindle motor is started according to the embodiment of the present invention.

FIG. 10 is a characteristic diagram showing the characteristic shown in FIG. 9 in terms of the linear velocity when the PLL is on.

FIG. 11 is a waveform diagram showing an example of pulling in a PLL at the time of inner circumference of the pickup according to the embodiment of the present invention.

FIG. 12 is a waveform chart showing an example of PLL pull-in at the time of the middle circumference of the pickup according to the embodiment of the present invention.

FIG. 13 is a waveform diagram showing an example of PLL pull-in at the time of pickup outer circumference according to an embodiment of the present invention.

FIG. 14 is a characteristic diagram showing an example of an optimum value of a pass center frequency of the bandpass filter according to one embodiment of the present invention.

FIG. 15 is a characteristic diagram showing an example in which the optimum value of the pass center frequency of the bandpass filter according to the embodiment of the present invention is approximated by two straight lines.

FIG. 16 is a waveform chart showing an example of a tracking error signal when the time constant of the peak hold is small according to the embodiment of the present invention.

FIG. 17 is a waveform chart showing an example of a tracking error signal when the time constant of the peak hold is large according to the embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Disc, 2 ... Cartridge, 10 ... RF circuit, 1
1: optical pickup, 13: tracking coil, 1
4, 16 adder, 17 subtractor, 18, 19 peak hold circuit, 20 averaging circuit, 21 subtractor, 22,
23, 24: band pass filter, 23a, 24a: changeover switch, 25, 26: peak hold circuit, 27,
28: subtractor, 29: tracking coil drive circuit, 30: DSP (digital signal processor), 3
DESCRIPTION OF SYMBOLS 1 ... EFM decoder, 32 ... buffer memory, 33 ... address decoder, 34 ... phase compensation circuit, 40 ... PLL circuit for EFM decoding, 41 ... EFM data input terminal, 4
2: Digital PLL circuit, 43: Changeover switch, 44:
Phase comparator, 45 low-pass filter, 46 voltage-controlled oscillator, 47 frequency divider, 48 reference clock input terminal,
49: frequency divider, 50: PLL circuit for address decoding,
51: ADIP data input terminal, 52: ADIP clock extraction circuit, 53: changeover switch, 54: phase comparator,
55: low-pass filter, 56: voltage-controlled oscillator, 57
... frequency divider, 58 ... reference clock input terminal, 59 ... frequency divider, 60 ... central control unit (CPU)

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification FI FI Theme Court ゛ (Reference) G11B 19/28 G11B 19/28 B (72) Inventor Shinji Katsuki 7-35 Kitashinagawa, Shinagawa-ku, Tokyo No. Sony Corporation (72) Inventor Yuichi Kuroda, 134 Kobe-cho, Hodogaya-ku, Yokohama, Kanagawa Prefecture In-house Sony Corporation (72) Inventor Satoshi Yamori 134, Kobe-cho, Hodogaya-ku, Yokohama, Kanagawa Sony・ SSI Design Co., Ltd. In-house (72) Inventor Joh Takeuchi 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F-term (reference) 5D044 BC06 CC06 GM02 GM12 GM14 GM32 5D090 AA01 BB05 CC04 FF02 FF05 GG02 5D109 KA12 KB05 KB12 KB23 KD09 KD34 KD35 KD38 KD46 KD49 5D118 AA08 AA11 BA04 BC08 CA14 CB01 CD03 CD11 CD17 CF05

Claims (5)

[Claims] A disk mounting portion; a spindle motor for driving a disk mounted on the disk mounting portion to rotate; and a disk mounted on the disk mounting portion while being rotationally driven by the spindle motor. Irradiates the track with laser light, splits the return light and detects it,
An optical pickup that outputs the detection signal as a read signal from a disk, a phase locked loop circuit that generates a clock signal synchronized with the output of the optical pickup, and a clock signal generated by the phase locked loop circuit A decoder for demodulating data recorded on the track from an output by the return light detected by the optical pickup, a memory for storing data demodulated by the decoder, and a storage capacity of the memory In response to the above, the output of the read signal from the disc by the optical pickup is intermittently executed, and when the disc is started to rotate by the spindle motor at the start of the intermittent read, the phase locked loop circuit Set the oscillation frequency to the radius position of the optical pickup at that Control means for forcibly setting a predetermined frequency set according to the rotation speed of the disk. 2. The disk drive according to claim 1, further comprising: a band-pass filter to which an output of the optical pickup is supplied to detect a predetermined component recorded on the track, wherein the control unit controls the band-pass. A disk drive device that variably sets a center frequency of a passage of a filter in accordance with a rotation speed of a disk by the spindle motor. 3. The disk drive according to claim 2, wherein the correspondence between the pass center frequency of the bandpass filter and the rotational speed of the disk is determined by calculating a curve obtained from the relationship between the pass center frequency and the rotational speed of the disk. Alternatively, a disk drive device set by a line approximated by a plurality of straight lines. 4. The disk drive according to claim 1, wherein a peak value of the output of the optical pickup or a peak value of a signal obtained by extracting a predetermined frequency component from the output of the optical pickup is held at a predetermined time constant. Wherein the control means sets a time constant of the peak hold means,
A disk drive device variably set in accordance with the rotation speed of the disk by the spindle motor. 5. The disk drive according to claim 4, wherein a visual field signal indicating a shift amount of a laser light irradiation position in the optical pickup is generated based on an output of the peak hold means. Disk drive.