JP2002077098A - Communication device and communication method - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To obtain a communication device capable of improving the demodulation accuracy. SOLUTION: A transmission system orthogonal code assignment circuit 3 multiplies a “symbol in an area for specifying a communication partner” in a transmission frame by a predetermined orthogonal code previously assigned to the communication partner. "Symbol of area for specifying communication partner" in multiple data after Fourier transform
, A correlation detection is performed by multiplying by an orthogonal code assigned to the own device in advance, and then the timing with the highest correlation is defined as a formal symbol timing, and the symbol synchronization clock is corrected from the timing. And a correlation detection circuit 13 of a receiving system for calculating the amount.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication apparatus employing a multi-carrier modulation / demodulation system, and more particularly to a DMT (Discrete Multi Tone) modulation / demodulation system and OF.
The present invention relates to a communication device and a communication method capable of realizing data communication using an existing communication line by a DM (Orthogonal Frequency Division Multiplex) modulation / demodulation method or the like.

[0002]

2. Description of the Related Art A conventional communication device will be described below. In recent years, to reduce costs and make effective use of existing facilities,
A “power line modem” that performs communication using an existing power line (light line) without adding a new communication line has attracted attention. The power line modem performs various processes such as control of the product and data communication by networking electrical products such as inside and outside the home, buildings, factories, and stores connected by the power line.

At present, such power line modems include:
An apparatus using the SS (Spread Spectrum) method has been considered. For example, when the SS method is used as a power line modem, the transmitting side modulates predetermined information and further performs spread modulation using a “spreading code” to increase the signal band by several tens to several thousand times. Spread and send. On the other hand, the receiving side performs spread demodulation (despreading) using the same spreading code as the transmitting side, and then demodulates the despread signal into the predetermined information.

In this case, a spreading code desirable for the SS system generally has a sharp peak in the autocorrelation characteristic,
M-sequence (Maximum-length lin
earshift-register sequence) is used.

On the other hand, as a communication device employing a modulation / demodulation method different from the communication device employing the SS method, there is, for example, a conventional communication device employing a multicarrier modulation / demodulation method. Here, the operation of a conventional communication device employing the multi-carrier modulation / demodulation method will be described.

First, as a multi-carrier modulation / demodulation method,
The operation of the transmission system of a conventional communication device employing the OFDM modulation / demodulation method will be briefly described. For example, when performing data communication using the OFDM modulation / demodulation method, the transmission system performs tone ordering processing, that is, processing for allocating transmission data of a transmittable number of bits to a plurality of tones (multicarriers) in a predetermined frequency band. Do. More specifically, for example, tone0 to toneX (X
Is an integer indicating the number of tones), transmission data of a predetermined number of bits is allocated. The transmission data is multiplexed for each frame by performing the tone ordering process and the encoding process.

Further, the transmission system performs an inverse fast Fourier transform (IFFT) on the multiplexed transmission data,
The parallel data after the inverse fast Fourier transform is converted into serial data, then the digital waveform is converted into an analog waveform through a D / A converter, and finally the data is transmitted through a transmission path through a low-pass filter.

Next, a conventional communication apparatus employing an OFDM modulation / demodulation method as a multicarrier modulation / demodulation method is described below.
The operation of the receiving system will be briefly described. As above, OFD
When performing data communication using the M modulation / demodulation method, the reception system applies a low-pass filter to the reception data (the transmission data described above), and then converts an analog waveform into a digital waveform through an A / D converter, and sends the data to a time domain equalizer. To perform adaptive equalization processing in the time domain.

Further, the receiving system converts the data after the adaptive equalization processing in the time domain from serial data to parallel data, performs a fast Fourier transform on the parallel data, and then performs frequency domain equalization by a frequency domain equalizer. Is performed.

[0010] The data after the adaptive equalization processing in the frequency domain is converted into serial data by a composite processing (maximum likelihood composite method) and a tone ordering processing, and thereafter, rate conversion processing and FEC (forward error correction) are performed.
on: forward error correction), descrambling, CRC (cy
Processing such as clic redundancy check is performed, and finally the transmission data is reproduced.

As described above, in the conventional communication apparatus employing the OFDM modulation / demodulation method, a high rate of data transmission can be achieved by utilizing the high transmission efficiency and the flexibility of functions which cannot be obtained by the CDMA or single carrier modulation / demodulation method. Communication is possible.

[0012]

SUMMARY OF THE INVENTION However,
In a conventional power line modem using the SS system, for example, a spectrum that fills a given band is transmitted, that is, a spectrum that fills a frequency band that can be used under legal regulations: 10 kHz to 450 kHz is transmitted. Therefore, there is a problem that it is difficult to coexist with other communication schemes, and that a transfer rate for a used band is low (extensibility is low).

Further, in the conventional communication apparatus employing the OFDM modulation / demodulation method, for example, from the viewpoint of “further improvement of transmission rate and demodulation accuracy”, it is necessary to determine whether or not the signal is transmitted to the own apparatus. Configuration,
There is a problem that there is room for improvement in the configuration for establishing symbol synchronization.

The present invention has been made in view of the above, and even when a plurality of devices can communicate on the same network, it is possible to determine whether a signal on a transmission path is a signal sent to the own device. It is an object of the present invention to provide a communication device capable of realizing an improvement in a transmission rate by accurately determining a symbol length, and further realizing an improvement in demodulation accuracy by establishing symbol synchronization with higher accuracy.

[0015]

Means for Solving the Problems The above-mentioned problems are solved,
In order to achieve the object, in the communication device according to the present invention, using a pilot tone output by the clock master, establish symbol synchronization before performing data communication,
A structure for demodulating a frame addressed to itself using the symbol synchronization clock generated here is provided. For example, a "symbol in an area for specifying a communication partner" in a transmission frame is provided.
Is multiplied by a predetermined orthogonal code previously assigned to the communication partner, and further subjected to inverse Fourier transform on all transmission frames including the result of the multiplication. Transmitting means for P / S conversion and D / A conversion of the data of the above (corresponding to a framing circuit 1, a mapper 2, an orthogonal code assignment circuit 3, an IFFT 4, a P / S 5 and a D / A 6 in an embodiment described later) And A /
The D-converted sampled data is converted into parallel data at the timing of the symbol synchronization clock and other sample timings before and after a plurality of times, and then the parallel data generated at the plurality of timings is individually converted. By performing a Fourier transform, and then multiplying the “symbol of the area for specifying the communication partner” in the plurality of data after the Fourier transform by an orthogonal code previously assigned to the own device. Correlation detection is performed, and then the timing with the highest correlation is defined as a formal symbol timing, a correction amount of the symbol synchronization clock is calculated from the timing, and finally, the symbol corrected based on the correction amount is calculated. Receiving means (A / D1) for demodulating a subsequent frame using a synchronous clock
6, an S / P 15, an FFT 14, a correlation detection circuit 13, a demapper 12, a deframing circuit 11, a symbol boundary determination value calculation circuit 21, a symbol boundary determiner 22, and a synchronous tone selector 23). It is characterized by.

In the communication device according to the next invention,
An orthogonal code multiplying means (orthogonal code multiplying means (orthogonal code multiplying means) for multiplying a “symbol in an area for specifying a communication partner” in a transmission frame by a predetermined orthogonal code assigned to the communication partner in advance. And an inverse Fourier transform unit (IF) for performing an inverse Fourier transform on all transmission frames including the multiplication result.
FT4) and the data after the inverse Fourier transform is
/ S conversion and D / A conversion and output means (P /
S5, D / A6).

In the communication device according to the next invention,
A symbol synchronization is established before data communication is performed using a pilot tone output by a clock master, and a frame addressed to itself is demodulated using a symbol synchronization clock generated here. For example, A / D conversion A data generating means (corresponding to A / D16, S / P15) for converting the later sampled data into parallel data at the timing of the symbol synchronization clock and at a plurality of sample timings before and after, respectively; Fourier transform means for individually performing Fourier transform on the parallel data generated at the timing (corresponding to FFT14)
And, the correlation detection is performed by multiplying the “symbol of the area for specifying the communication partner” in the plurality of data after the Fourier transform by an orthogonal code assigned to the own apparatus in advance, and thereafter, A timing having a high correlation is defined as a formal symbol timing, and a correction amount calculating means (corresponding to the correlation detection circuit 13) for calculating a correction amount of the symbol synchronous clock from the timing is corrected. Demodulation means (S / P15, FFT) for demodulating the subsequent frame using the symbol synchronization clock
14, corresponding to the demapper 12).

In the communication method according to the next invention,
An orthogonal code multiplication step of multiplying a “symbol in an area for identifying a communication partner” in the transmission frame by a predetermined orthogonal code assigned to the communication partner in advance, and all the multiplication results including the multiplication result An inverse Fourier transform step of performing an inverse Fourier transform on the transmission frame; and performing P / S conversion and D / A conversion on the data after the inverse Fourier transform.
An output step of converting and outputting, and a data generating step of converting the sampled data after the A / D conversion into parallel data at a timing of the symbol synchronization clock and other plural times before and after the sampling timing. A Fourier transform step of individually performing a Fourier transform on the parallel data generated at a plurality of timings; and Correlation detection is performed by multiplying the orthogonal code assigned to the device, and then the timing with the highest correlation is defined as formal symbol timing, and the correction amount for calculating the correction amount of the symbol synchronization clock from the timing is defined. A calculating step, and a symbol synchronization corrected based on the correction amount. Characterized in that it comprises a demodulation step of demodulating the subsequent frames by using the lock.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a communication device according to the present invention will be described in detail with reference to the drawings. In addition,
The present invention is not limited by the embodiment. That is, any communication device that performs data communication by the multi-carrier modulation / demodulation method can be applied to devices other than the power line modem.

Embodiment 1 In the present embodiment, as a communication device using an existing power line, for example, a power line modem employing a multi-carrier modulation / demodulation method will be described. In a power line modem, for example, an OFDM (Orthogonal Frequency Division Multip
lexing) When transmitting and receiving signals, 256 complex IFFs
Using T, 128 DQPSK data or MQ
Convert AM data to time axis data. Therefore, when the carrier interval is set to Δf = 4.3125 KHz, a band from 0 to 552 KHz is used.

Further, in the present embodiment, when transmitting and receiving an OFDM signal of 128 tones, a power line modem operating in a low-speed mode includes five narrow-band carrier frequency carriers arranged every 16 tones, for example, Tone 3
Data communication is performed using 2, 48, 64, 80, and 96, and the power line modem operating in the high-speed mode performs data communication using the remaining tones.

FIG. 1 is a diagram showing a configuration of a communication device according to the present invention. Specifically, it is a diagram illustrating a configuration of a communication device that can operate in a low-speed mode. In FIG. 1, 1 is a framing circuit, 2 is a mapper, 3 is an orthogonal code assignment circuit, and 4 is an inverse fast Fourier transform circuit (I
FFT: Inverse Fast Fourier Transform)
Is a parallel / serial conversion circuit (P / S), 6 is a digital / analog conversion circuit (D / A), 7 is a transmission line (power line), 8 is a coupling circuit, and 10 is a control circuit. And 11 is a deframing circuit, and 1
2 is a demapper, 13 is a correlation detection circuit, and 14
Is a fast Fourier transform circuit (FFT).
orm), and 15 is a serial / parallel conversion circuit (S
/ P), 16 is an analog / digital conversion circuit (A / D), 17 is a carrier detector, 21
Is a symbol boundary determination value calculator, 22 is a symbol boundary determination unit, and 23 is a synchronous tone selector.

The framing circuit 1, the mapper 2,
Orthogonal code assignment circuit 3, IFFT4, P / S5, D / A6
Configure the transmission system with A / D16, S / P15, FFT1
4. A reception system is constituted by the correlation detection circuit 13, demapper 12, deframing circuit 11, symbol boundary determination value calculator 21, symbol boundary determiner 22, and synchronous tone selector 23.

Hereinafter, basic operations of the transmission system and the reception system will be described with reference to the drawings. First, the operation of the transmission system will be described. For example, when transmission data is input from a data processing device (not shown) connected to the communication device (power line modem), the framing circuit 1 performs a framing process shown in FIG. Output to 2. Then, the mapper 2 maps the received frame using “tone ordering selection information”, “turbo code length selection information”, “bitmap selection information”, “power distribution selection information” from the control circuit 10 (DQPSK modulation, M-QAM modulation, turbo coding, power distribution control, etc.) and output the result to IFFT4.

In IFFT4, all received tones (tones 48, 64, and tones used in the low-speed mode)
(Other than 80) is subjected to inverse Fourier transform to convert frequency axis data into time axis data and output it to P / S5.

At P / S5, the parallel data output from IFFT4 is converted into serial data, and the serial data is output to D / A6.
At 6, the digital / analog conversion is performed on the serial data, and the analog signal is transmitted to another communication device (not shown) connected to the transmission path 7 via the coupling circuit 8 and the transmission path 7. I do.

Next, the operation of the receiving system will be described.
Here, for convenience of explanation, since only one communication device is connected to the transmission path 7, the description will be made using the configuration of the receiving system in FIG. In the receiving system described below,
It is confirmed that symbol synchronization is established by using a pilot tone constantly transmitted from a communication device serving as a clock master (actually, by using a pilot frame transmitted intermittently when communication is not being performed). It is assumed. More specifically, the synchronization tone selector 23 selects tones (tones 40, 56, 72, etc.) required for performing the synchronization process based on information from the control circuit 10. Then, the symbol boundary determination value calculator 21 calculates a symbol boundary determination value based on the signal of the selected tone, and the symbol boundary determination unit 22 further calculates a symbol boundary value based on the calculated symbol boundary determination value. Determine the boundaries and establish symbol synchronization.

First, when multicarrier data is transmitted from the transmission system as described above, the reception system of another communication device performs an operation reverse to the operation of the transmission system to demodulate the data. More specifically, all the multi-carrier data sent from the communication device on the transmission side is fetched via the coupling circuit 8, and the A / D 16 performs analog / digital conversion. Subsequently, the carrier detector 17 detects a carrier detection field by carrier sense and tone test.

Thereafter, the S / P 15 converts the serial data converted into digital data into parallel data based on the symbol timing at which synchronization has been established.
The data is output to FFT14.

The FFT 14 performs a Fourier transform on the parallel data to convert the multicarrier signal on the time axis into data on the frequency axis, and outputs the frequency axis data to the demapper 12. After that, the demapper 12 demodulates the received frequency data by using “FEQ coefficient information”, “information on turbo decoding”, “bitmap information”, and “tone ordering selection information” specified by the control circuit 10.

Finally, the deframing circuit 11 performs a deframing process for cutting out only the data in the transmission frame (see FIG. 2) from the demodulated data,
It generates reception data and outputs the reception data to a device (not shown) connected to the communication device. Note that the deframing process is a process opposite to the framing process by the framing circuit 1, and separates a preamble and a physical layer header, which will be described later, from a frame of the primary demodulated data, and synthesizes only the physical layer payload. processing,
That is, it refers to a process of reconstructing received data into original transmission data.

FIG. 2 is a diagram showing the structure of a frame generated by the framing processing by the framing circuit 1. As shown in FIG. The frame shown in FIG. 2 includes a preamble field (AGC) which is an area of a signal for carrier detection, a code (ID) indicating a transmission path, a sample clock / symbol clock synchronization signal (PT1, PT2), and the like. The framing circuit 1 includes a header field, a logical data boundary identification code, a bitmap match / mismatch detection code, a command field, control information such as a group code, and a physical layer payload field including transmission data. , And after being modulated in the above-described processing, is output to the transmission path 7.

The frame on the transmission line is received by all communication devices connected to the transmission line, and the control circuit 10
Then, only when the received signal is identified and the code matches the own code, it is determined that the data transmitted on the transmission path is addressed to itself, and the contents of the subsequent payload portion are understood. If it is determined that it is not addressed to itself, no operation is performed.

FIG. 3 is a diagram showing tones used by the communication device operating in the low-speed mode for data communication and tones used by the communication device operating in the high-speed mode for data communication. For example, 128 lines at 4.3125 kHz intervals (#
Assuming the tones of 0 to # 127), the communication device operating in the low-speed mode performs data communication using the illustrated five tones selected at intervals of 16 lines, and performs communication in the high-speed mode. Then, data communication is performed using other tones.

FIG. 4 is a diagram showing the state of the frame on the transmission path and the unit of the symbol input to the FFT. For example, in the present embodiment, as shown in FIG. 4, the symbols constituting the frame include a cyclic prefix (CP) of 16 samples,
It consists of a data portion of 6 samples and one symbol is 27
There are two samples. Therefore, the receiving side demodulates the data in a state where the CP inserted at a known timing is deleted (corresponding to “to demodulation FFT” in FIG. 4). The data portion is a minimum unit of communication, and represents a composite wave of all tones to be transmitted in a 256-point sample. The CP is inserted between symbols in order to prevent inter-symbol interference, and is obtained by duplicating and pasting the last 16 samples of the data portion. It becomes a waveform.

Here, a method of establishing symbol synchronization when data communication is performed between the communication devices will be described in detail. Here, the symbol frequency F is set to F = 4 kHz,
The sampling frequency S of D / A6 and A / D16 is S
= 1.024 MHz. In this case, a signal for one symbol time is composed of S / F (256 samples) + CP (16 samples) = 272 samples. Also, the symbol here is the minimum unit of communication,
For example, a multi-tone composite wave used for communication
This is represented by two sample data. Also, I
When FFT4 and FFT14 correspond to 256 samples, the tone frequencies that can be generated are Fxx (x = 1 to 1).
28), and 128 tones are available.

In such a state, the receiving system of the communication device first establishes symbol synchronization using the pilot tone transmitted by the clock master at the time of start-up and when data communication is not performed. Be prepared to start. Specifically, first, A /
D16 captures the signal on the transmission line by performing 272-point sampling. Then, the symbol boundary determination value calculation unit 21 performs an operation for establishing symbol synchronization with another communication device using the sampling data of the pilot tone after the A / D conversion.

The symbol boundary determination value calculator 21 calculates a determination value required for determining a symbol boundary using the sampling data of the pilot tone. The synchronous tone selector 23 selects at least one pilot tone from a plurality of tones according to an instruction from the control circuit 10. If the frequency of the selected pilot tone is, for example, M times the symbol frequency (M = 2
4, 40, 56, 72, 88), the symbol boundary determination value calculator 21 calculates the past S / F + CP = 272.
The sample data is buffered, and a symbol boundary determination value described later is calculated. However, here, the first content of the buffer is D ₀ , and the last content is D _{0.
(S / F + CP) -1} . Each time new sample data is obtained, the latest S / F + CP = 27
It is calculated using two sample data.

Next, the symbol boundary determination unit 22 searches for the timing at which the maximum value of the symbol boundary determination values for the past 272 times of S / F + CP has occurred. Establish synchronization.

FIG. 5 is a diagram showing a specific example of a method of establishing symbol synchronization between communication devices. Here, as the pilot tone, for example, a 24 × tone (tone 24)
Is selected (M = 24). Note that, as described above, the pilot tone is a signal having the same phase in a symbol cycle unit.

FIG. 5A shows a composite wave of a plurality of tones.
It expresses only the pilot tone. FIG.
In (a), the signal on the pilot tone includes a sine wave signal for 25 cycles (including CP) in one symbol period. Therefore, when one symbol is sampled at S / F + CP = 272 points, 16 samples are obtained. , And has a value in which the sign is inverted every 16 samples.

First, in the symbol boundary judgment value calculator 21, every time new sample data is obtained, the latest S / S
F + CP = using 272 sample data, and 16
Inverts the value in sample units and performs synchronous addition. That is, as shown in the figure, the sample value is inverted every 16 samples, and synchronous addition is performed within a range of one symbol length.

FIG. 5B is a diagram showing a calculation range of the symbol boundary determination value, FIG. 5C is a diagram showing an example of the synchronous addition result, and FIG. 5D is a diagram showing the synchronous addition result. FIG. 14 is a diagram illustrating a result of adding the absolute values of sample data in the result, that is, a symbol boundary determination value. As shown, when the calculation range of the symbol boundary determination value is A (see FIG. 5B).
Can obtain a synchronous addition result for 1.5 cycles in which the pilot tone signal is enhanced and the amplitude becomes 17 times (see A ′ in FIG. 5C). In this case, the symbol boundary determination value becomes the maximum (see FIG. 5D). Then, as the calculation range of the symbol boundary determination value deviates from A, the symbol boundary determination value gradually decreases. Note that signal components of tones other than the selected pilot tone (M = 24) are canceled by the above-described synchronous addition, and the value becomes 0.

On the other hand, the calculation range of the symbol boundary judgment value is B
5 (see FIG. 5B), since the first half (D _{0 to} D ₁₃₅ ) and the second half (D _{136 to} D ₂₇₂ ) of the 272-point signal are in-phase signals, the synchronous addition (in units of 16 samples) The signal of the pilot tone is canceled by the inversion, and a synchronous addition result for 1.5 cycles in which the amplitude becomes 0 can be obtained (see B ′ in FIG. 5C). In this case, the symbol boundary determination value becomes minimum (see FIG. 5D).

Then, the symbol boundary judgment unit 22 that has received the output from the symbol boundary judgment value calculator 21
The timing at which the symbol boundary determination value over the symbol period is maximum is detected, and this is used as the symbol timing between the communication devices.

As described above, when symbol synchronization is established between communication apparatuses, pilot tones (tones 24, 40, 56, 72, 8) satisfying 16n (n is a natural number) +8
The symbol synchronization process is performed using 8). More specifically, the value of the pilot tone is inverted in units of 1/17 symbol length (16 samples), and synchronous addition of sampling data is performed within one symbol length range. The timing at which the sum of the absolute values of the sampling points in, that is, the symbol boundary determination value, becomes maximum is defined as the symbol timing between the communication devices.

In the above description, the basic operation of the communication device and the method of establishing symbol synchronization between the communication devices have been described. In the following description, for example, from the viewpoint of “further improvement of transmission rate and demodulation accuracy”, a configuration for determining whether a signal has been transmitted to the own device and a configuration for establishing symbol synchronization have been improved. Was done. Specifically, the symbol timing generated by the above method is corrected using the ID (for one symbol) in the physical layer header shown in FIG.

Hereinafter, the configuration added to improve the transmission rate and the demodulation accuracy and its operation will be described. First, the operation of the transmission system will be described. For example, in the above description, when transmission data is input from a data processing device connected to a communication device, a frame after a framing process shown in FIG. 2 described later is mapped, and the mapping result is output to IFFT4. However, in the present embodiment, the orthogonal code assignment circuit 3 further sets in advance a code for identifying a transmission path in the frame, that is, an “ID” that is a code for identifying a communication partner. A predetermined orthogonal code assigned to the communication partner is multiplied.

FIG. 6 is a diagram showing a Hadamard sequence of 32 rows × 32 columns which is an example of the orthogonal code. Note that the elements of the n (0-31) row of the Hadamard series are called h (n), and the elements of the m (0-31) column are called h (n, m). In the present embodiment, for example, 96 tones from tone 3 to tone 98 (actually, reserved tones in low-speed mode,
BPSK encoding of a 32-bit Hadamard sequence (excluding pilot tones). The following shows the encoded value t (n). t (3m) = h (ID, m) t (3m + 1) = h (ID, m) t (3m + 2) = h (ID, m) where ID is 0 to 31.

The IFFT 4 converts the frequency axis data into time axis data by performing an inverse Fourier transform on all the received tones.

On the other hand, in the receiving system of the communication device, all the multi-carrier data sent from the communication device on the transmission side is taken in via the coupling circuit 8, and the A / D 16 performs analog / digital conversion. Subsequently, the carrier detector 17 detects a carrier detection field by carrier sense and tone test. Here, the signal for carrier detection (AGC) is determined by the carrier detector 17.
If it is determined that there is a frame, the subsequent sampling data is used to determine whether the frame being received is a frame for the own device.

More specifically, first, the S / P 15 converts the serial data (ID portion in the frame: one symbol) converted into digital data into parallel data based on the current symbol synchronization clock. Then, the data is output to the FFT 14. At this time, the S / P 15 converts the sampling data corresponding to the ID into parallel data, for example, at the timing of the symbol synchronization clock and at two other sample timings before and after. FIG. 7 is a diagram illustrating the sample timing of the ID in the frame being received (see (a)) and the correlation result in the correlation detection circuit 13 (see (b)).

Thereafter, the FFT 14 performs a Fourier transform on each of the five types of parallel data to convert the multicarrier signal on the time axis into data on the frequency axis. Output to the circuit 13. Thereafter, the correlation detection circuit 13 determines whether or not the frame being received is for its own device from “ID” which is a code for identifying the transmission path in the frame. More specifically, in the present embodiment, the correlation detection circuit 13 applies one of the orthogonal codes shown in FIG. To determine whether the frame being received is for the own device.

Further, in the correlation detection circuit 13, the timing having the highest correlation is defined as the formal symbol timing in the correlation detection processing (multiplication) for the five kinds of data after the Fourier transform, and the timing is obtained from the timing. The correction amount is notified to the symbol boundary determiner 22. Then, the symbol boundary determiner 22 corrects the symbol synchronization clock based on the correction amount, and thereafter outputs the corrected symbol synchronization clock as a formal symbol synchronization clock.

As described above, in the present embodiment, an orthogonal code assignment circuit 3 for assigning an orthogonal code for specifying a communication partner is added to the configuration on the transmitting side, and the frame being received is added to the configuration on the receiving side. Is added using a pre-assigned orthogonal code to determine whether the frame is addressed to the own device. As a result, it is possible to accurately determine whether the signal on the transmission path is a signal transmitted to the own apparatus with a short symbol length and without lowering the transmission rate. Further, since the ID field is multiplied by the orthogonal code of its own device (correlation detection) a predetermined number of times while shifting the sample clock (correlation detection), and the symbol synchronization clock is corrected with high accuracy based on the multiplication result, the multiplier is used. The demodulation accuracy can be greatly improved with a simple configuration just added.

[0056]

As described above, according to the present invention, orthogonal code multiplying means for assigning an orthogonal code for specifying a communication partner is added to the structure of the transmitting side, and the receiving side is configured to receive the signal. A correction amount calculating means for determining whether or not the frame is a frame addressed to the own device by using a pre-assigned orthogonal code and finally calculating a correction amount of the symbol synchronization clock is added. Thus, it is possible to obtain a communication device capable of accurately determining whether a signal on a transmission path is a signal transmitted to the own device with a short symbol length and without lowering a transmission rate. It works. Further, since the ID field is multiplied by the orthogonal code of its own device (correlation detection) a predetermined number of times while shifting the sample clock (correlation detection), and the symbol synchronization clock is corrected with high accuracy based on the multiplication result, the multiplier is used. An effect is obtained that a communication device capable of greatly improving demodulation accuracy can be obtained with a simple configuration simply added.

According to the next invention, an orthogonal code multiplying means for assigning an orthogonal code for specifying a communication partner is added. This has the effect that the receiving side can accurately determine whether or not the signal on the transmission path has been sent to its own device with a short symbol length and without lowering the transmission rate.

According to the next invention, whether or not the frame being received is a frame addressed to the own device is determined by using a previously assigned orthogonal code, and finally the correction amount of the symbol synchronization clock is determined. The correction amount calculating means for calculating is added. With this, it is possible to accurately determine whether the signal on the transmission path is a signal transmitted to the own device, with a short symbol length and without lowering the transmission rate.
This has the effect. Further, since the ID field is multiplied by the orthogonal code of its own device (correlation detection) a predetermined number of times while shifting the sample clock (correlation detection), and the symbol synchronization clock is corrected with high accuracy based on the multiplication result, the multiplier is used. An effect is obtained that the demodulation accuracy can be greatly improved with a simple configuration just added.

According to the next invention, an orthogonal code multiplication step for assigning an orthogonal code for specifying a communication partner is added to the transmitting side, and the receiving side determines whether or not the frame being received is a frame addressed to itself. A correction amount calculating step of determining using the orthogonal code assigned in advance and finally calculating the correction amount of the symbol synchronization clock is added. As a result, it is possible to accurately determine whether the signal on the transmission path is a signal transmitted to the own device with a short symbol length and without lowering the transmission rate. Further, since the ID field is multiplied by the orthogonal code of its own device (correlation detection) a predetermined number of times while shifting the sample clock (correlation detection), and the symbol synchronization clock is corrected with high accuracy based on the multiplication result, the multiplier is used. An effect is obtained that the demodulation accuracy can be greatly improved with a simple configuration just added.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a communication device according to the present invention.

FIG. 2 is a diagram illustrating a configuration of a frame generated by a framing process.

FIG. 3 is a diagram showing tones used for data communication.

FIG. 4 is a diagram illustrating a state of a frame on a transmission path and a unit of a symbol input to an FFT.

FIG. 5 is a diagram illustrating a specific example of a method of establishing symbol synchronization between communication devices.

FIG. 6 is a diagram showing a Hadamard sequence of 32 rows × 32 columns, which is an example of an orthogonal code.

FIG. 7 is a diagram illustrating sample timing of IDs in a frame being received and a correlation result in a correlation detection circuit.

[Explanation of symbols]

1 framing circuit, 2 mapper, 3 orthogonal code assignment circuit, 4 inverse fast Fourier transform circuit, 5 parallel / serial converter circuit (P / S), 6 digital / analog converter circuit (D / A), 7 transmission line (power line) , 8 coupling circuit, 10 control circuit, 11 deframing circuit, 1
2 Demapper, 13 Correlation detection circuit, 14 Fast Fourier transform circuit, 15 Serial / parallel transform circuit (S /
P), 16 analog / digital conversion circuit (A /
D), 17 carrier detector, 21 symbol boundary judgment value calculator, 22 symbol boundary judgment unit, 23 synchronous tone selector.

Continued on the front page F term (reference) 5K004 AA05 FB06 FG02 FG04 5K022 DD01 DD13 DD18 DD19 DD33 DD42 5K047 AA01 GG45 HH02 HH15 MM44 MM45

Claims (4)

[Claims] 1. A communication apparatus for establishing symbol synchronization before performing data communication using a pilot tone output by a clock master and demodulating a frame addressed to itself using the generated symbol synchronization clock. The “symbol in the area for specifying the communication partner” in the transmission frame is multiplied by a predetermined orthogonal code assigned to the communication partner in advance, and all the transmission frames including the multiplication result are further multiplied. Transmitting means for performing P / S conversion and D / A conversion of the data after the inverse Fourier transform and outputting the data, and sampling data after the A / D conversion to the symbol synchronization clock. At the same timing and at other sample timings before and after, to convert the data into parallel data. Fourier transform is performed individually on the parallel data generated by the above-mentioned process, and then the “symbol of the area for specifying the communication partner” in the plurality of data after the Fourier transform is assigned to the own device in advance. Correlation detection is performed by multiplying by the orthogonal code, and then the timing with the highest correlation is defined as formal symbol timing, and the correction amount of the symbol synchronization clock is calculated from the timing, and finally, Receiving means for demodulating a subsequent frame using a symbol synchronization clock corrected based on the correction amount. 2. A communication apparatus operating as a transmitter, wherein a “symbol in an area for specifying a communication partner” in a transmission frame is multiplied by a predetermined orthogonal code previously assigned to the communication partner. Orthogonal code multiplication means; inverse Fourier transform means for performing inverse Fourier transform on all transmission frames including the multiplication result; P / S transform and D /
A communication device comprising: an output unit configured to perform A conversion and output. 3. A receiver that establishes symbol synchronization before performing data communication using a pilot tone output by a clock master, and demodulates a frame addressed to itself using the generated symbol synchronization clock. An operating communication device, comprising: data generating means for converting the sampled data after A / D conversion into parallel data at a timing of the symbol synchronization clock and at a plurality of sample timings before and after each other; Fourier transform means for individually performing a Fourier transform on the parallel data generated in the above, and for the "symbol of the area for specifying the communication partner" in the plurality of data after the Fourier transform, assigned in advance to its own device Correlation detection is performed by multiplying the orthogonal code Correction timing calculating means for defining a correction timing of the symbol synchronization clock based on the timing defined as a formal symbol timing, and a subsequent frame using the symbol synchronization clock corrected based on the correction timing. A communication device, comprising: demodulation means for demodulating. 4. A communication method for establishing symbol synchronization before performing data communication using a pilot tone output by a clock master, and demodulating a frame addressed to itself using the generated symbol synchronization clock. An orthogonal code multiplication step of multiplying a “symbol of an area for specifying a communication partner” in a transmission frame by a predetermined orthogonal code assigned to the communication partner in advance, An inverse Fourier transform step of performing an inverse Fourier transform on the transmission frame; and performing P / S conversion and D / S conversion on the data after the inverse Fourier transform.
An output step of A-converting and outputting; a data generating step of converting the sampled data after the A / D conversion into parallel data at a timing of the symbol synchronization clock and at a plurality of sample timings before and after a plurality of times; A Fourier transform step of individually performing a Fourier transform on the parallel data generated at the plurality of timings; and, for the “symbol of an area for specifying a communication partner” in the plurality of data after the Fourier transform, Correlation detection is performed by multiplying the orthogonal code assigned to the own device, and then the timing with the highest correlation is defined as formal symbol timing, and the correction amount for calculating the correction amount of the symbol synchronization clock from the timing is defined. An amount calculating step; and a symbol corrected based on the correction amount. A demodulating step of demodulating a subsequent frame using a synchronous clock.