JP2001358338A - Trench gate type semiconductor device - Google Patents

Abstract

(57) Abstract: In a trench gate type semiconductor device in which a gate having a MOS structure is provided in a trench, a problem of a decrease in gate withstand voltage due to a gate oxide film at an end portion of a stripe-shaped trench is solved. Improve the reliability of the oxide film. A gate oxide film at an end of a trench is provided.
Is made thicker than other gate oxide film portions. The terminal end of the trench 5 is surrounded by a p-terminal region 26 which is deeper than the trench 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a MOSFET (metal-oxide-semiconductor-structure gate) having a control gate electrode buried through an insulating film in a trench dug in a surface layer of a semiconductor substrate. Field effect transistors with electrodes, IGBTs (insulated gate bipolar transistors), insulated gate thyristors, and intelligent power modules (IPMs) as an aggregate thereof
And the like.

[0002]

2. Description of the Related Art As the power consumption of a power conversion device is reduced, there is a great expectation for a power device (switching device) that plays a central role in the power conversion device. In recent years, a trench gate type power device in which channel density is increased and on-state power loss is greatly reduced has been put to practical use, and its application range has been expanding to power MOSFETs, IGBTs, thyristors, and diodes.

An outline of a trench gate type element will be described by taking a trench gate type MOSFET as an example of a MOS semiconductor device as an example. FIG. 7A shows a conventional trench gate type MOSFET having a striped trench gate.
FIG. 4 is a perspective plan view of a semiconductor substrate surface of a main part of the semiconductor substrate, seen through a protective film, an electrode film and the like. FIG. 7B shows A in FIG.
FIG. 3C is a partial cross-sectional view along the line A, and FIG.
FIG. 7D is a partial sectional view taken along a line, and FIG. 7D is an enlarged view of a part of FIG.

In FIG. 7A, reference numeral 5 denotes a trench, 17
Denotes a step of the field oxide film 12, and 16 denotes a step in which the gate electrode 4 is dug down. In FIG. 7B, a p-well region 7 is formed in the surface layer of n drift layer 1b of semiconductor substrate 1 comprising n ⁺ drain layer 1a and n drift layer 1b, and n well is formed in the surface layer of p well region 7. A source region 8 is formed. A trench 5 is formed from the surface of n source region 8 to penetrate p well region 7 and reach n drift layer 1b. Inside trench 5, gate electrode 4 made of polycrystalline silicon with gate oxide film 3 interposed therebetween is formed. Is filled. On the surface of the n source region 8, p
A source electrode 9 made of an Al-Si alloy or the like that is in common contact with the well region 7 is also provided, and a drain electrode 10 is provided on the back surface of the n ⁺ drain layer 1a. The interlayer insulating film 11 that covers the gate electrode 4 is an insulating film that insulates the source electrode 9 from the gate electrode 4. As in this example, the interlayer insulating film 1
In many cases, the source electrode 9 is extended above the element 1, but this is not necessary.

[0007] As shown in FIG. 7 (c), the end of the striped trench 5 also serves as a lead-out portion of the gate electrode 4, and the gate electrode 4 extends on the surface of the semiconductor substrate 1. It is connected to a gate metal electrode (not shown) on field oxide film 12. By applying an appropriate voltage to the gate metal electrode 13, an inversion layer (channel) is formed on the surface layer of the p-well region 7 along the inner wall of the trench 5, and the conduction between the drain electrode 10 and the source electrode 9 is established. Electric current flows.

[0006]

In any device using a trench gate, it is important to construct a highly reliable trench gate structure comparable to a conventional planar gate structure. However, the smoothness of the inner wall of the trench where the gate oxide film is formed is inferior to that of the substrate surface, and in consideration of the problem of a damaged layer of silicon generated at the time of trench etching, the difficulty of removing foreign matter on the inner wall of the trench, and the like, It is difficult to obtain good gate oxide film reliability beyond the planar gate structure.

In particular, since the stripe-shaped trench formed linearly on the substrate surface has a terminal portion of the trench, this portion is liable to cause the above-mentioned problem unlike the linear region, and the gate oxide film grown there is formed in the linear region. The quality is inferior to that formed in FIG. 7D is an enlarged cross-sectional view of the end portion of the trench groove. As shown in this figure, the gate electrode 4 and the semiconductor substrate 1 are insulated by the gate oxide film 3. The trench 5 is usually formed by dry etching. At that time, at the end of the trench 5, it is sharp at the upper corner portion 14, so that the gate oxide film 3 becomes thinner at this portion or an electric field is concentrated. In some cases, the breakdown voltage of the gate oxide film 3 is reduced. For example, in the case of the drawing, the thickness of the gate oxide film 3 at the upper corner portion 14 is smaller by about 30% than other portions. The tip of the upper end corner 14 of FIG.
(A) becomes sharpest at the corner 18 of the trench 5,
It is known that the smaller the radius of curvature of the corner portion 18 is, the sharper it becomes.

In view of the above problems, an object of the present invention is to provide a trench gate type semiconductor device having a highly reliable gate oxide film by preventing a reduction in the withstand voltage of a gate oxide film having a stripe trench gate structure. . Of course, in a structure having a lattice-shaped or polygonal-cell-shaped trench gate, a similar problem occurs even when a layout having an end is provided. Therefore, the same applies to these structures.

As a countermeasure against this problem, for example, the trench 5
Japanese Patent Application Laid-Open No. 7-249 discloses a method of shaving the corner of the upper end corner portion 14 of the terminal or increasing the thickness of the gate oxide film 3 in that portion.
No. 769. However, in the disclosed method, a step must be added to cut off the upper end corner 14 of the trench 5 or increase the thickness of the gate oxide film 3 in this portion. Further, even if such a step is added, the sharpness remains at the corner portion 18 of the trench 5.

As another method for preventing a crystal defect caused by the end of the trench and the effect of the insulating film at that portion and improving the gate withstand voltage, the tip of the trench toward the end of the chip is formed as follows.
A method of connecting with the tip of an adjacent trench is disclosed in, for example, JP-A-8-293601, JP-A-10-214968, JP-A-10-256545, and JP-A-11-97689.

[0011] The applicant of the present invention has also disclosed in Japanese Patent Application No.
No. 35986 proposes a structure in which a wide enlarged terminal portion is provided at the terminal portion of a trench gate. Another object of the present invention is to provide a trench gate type semiconductor device having a highly reliable gate oxide film by preventing a reduction in the breakdown voltage of a gate oxide film having a stripe-shaped trench gate structure.

[0012]

According to the present invention, there is provided a first conductive type drain layer, a second conductive type channel region provided on the first conductive type drain layer, and a second conductive type channel region. A first conductivity type source region selectively formed in the surface layer of the channel region, and a trench reaching the first conductivity type drain layer through the second conductivity type channel region from the surface of the first conductivity type source region, A gate electrode provided in the trench with a gate insulating film interposed therebetween, a source electrode provided in common contact with the surfaces of the first conductivity type source region and the second conductivity type channel region, and a first conductivity type drain In the trench gate type semiconductor device including the drain electrode provided in contact with the layer, the thickness of the gate oxide film at the end of the stripe-shaped trench is larger than the thickness of the gate oxide film in the other portion of the trench And the.

By forming an insulating film thicker than that at the central portion between the terminal portion of the stripe trench and the third electrode, the electric field applied to the oxide film at the terminal portion is reduced. Further, the thickness of the gate oxide film in the side wall direction at the end of the stripe-shaped trench is made larger than the thickness of the gate oxide film in the other part of the trench. By doing so, a thick oxide film can be left at the end of the trench.

A first conductivity type drain layer, a second conductivity type channel region provided on the first conductivity type drain layer, and a second conductivity type channel region selectively formed on a surface layer of the second conductivity type channel region. One conductivity type source region, a trench penetrating from the surface of the first conductivity type source region to the first conductivity type drain layer through the second conductivity type channel region, and a gate provided in the trench via a gate insulating film An electrode, a source electrode provided in common with the surface of the first conductivity type source region and the surface of the second conductivity type channel region, and a drain electrode provided in contact with the first conductivity type drain layer. In the trench gate type semiconductor device, the end of the stripe-shaped trench is surrounded by a second conductivity type termination region deeper than the trench, and the second conductivity type termination region is formed by a source electrode and a drain. It assumed to be electrically isolated from the emission electrode.

The end of the stripe trench is surrounded by a second conductivity type termination region deeper than the trench, and is separated from the first electrode and the second electrode. P between one conductivity type drain layer
As a result, the electric field applied to the gate oxide film at the terminal end is reduced.

[0016]

Embodiments of the present invention will be described below with reference to the drawings of the embodiments. FIG. 1 shows a MOSF according to a first embodiment of the present invention.
It is sectional drawing of the length direction of the striped trench of ET.

A p well region 7 is formed in the surface layer of n drift layer 1b. A trench 5 is dug deeper than the p-well region 7, and a gate electrode 4 made of polycrystalline silicon is buried in the trench 5 via a gate oxide film 3. Gate electrode 4 is extended above p-well region 7 via field oxide film 12.
Reference numeral 9 denotes a source electrode made of an Al—Si alloy, and reference numeral 11 denotes an interlayer insulating film made of boron-phosphorus-silica glass (BPSG) that insulates the source electrode 9 from the gate electrode 4.

The difference from the conventional structure shown in FIG. 7C is that the gate oxide film 3a at the end of the stripe-shaped trench is formed.
Is extended into the trench 5 to be thicker than other portions. For example, if the thickness of the gate oxide film 3 is 10
0 nm, whereas the gate oxide film 3 at the trench end is 3 nm.
The thickness of a is about 1500 nm. Other major dimensions are as follows. The depth of the trench 5 is 3μ.
m. The thickness of the field oxide film 12 is about 450 nm,
The thickness of the gate electrode 4 on the semiconductor substrate is about 800 nm. The thickness of the source electrode 9 is 3 μm, and the thickness of the interlayer insulating film 11 is 500 nm.

FIGS. 2 (a) to 2 (d) and FIGS. 3 (a) to 3 (a)
FIG. 2D is a sectional view illustrating a main process of the method of manufacturing the trench gate type MOSFET in FIG. 1 in order of main steps. Using the oxide film 27 as a mask, the trench 5 is formed by reactive ion etching (RIE) using a hydrogen halide such as HBr (FIG. 2A).

A layer damaged by the etching process by plasma etching using a mixed gas of carbon tetrafluoride and oxygen is removed by etching [FIG. A sacrificial oxide film 21 having a thickness of about 100 nm is formed on the inner wall of the trench 5 by oxidation [FIG. For example, the trench 5 is filled with an HTO (high-temperature oxide film) 22 formed by CVD using monosilane gas (SiH ₄ ) (FIG. 4D).

Next, only the terminal portion is masked with a photoresist 23 (FIG. 3A). The photoresist mask 23 is used to selectively etch the HTO oxide film 22 embedded in the trench 5 together with the sacrificial oxide film 21 (FIG. 2B). At this time, the overhang width W ₂ of the photoresist 23 is preferably set to be W ₂ / W ₁ ≧ 1.5 with respect to the depth W ₁ of the trench 5. Then, leaving the gate oxide film 3a of the isotropic thickness of 0.5 W ₁ to the inner wall portion of the trench terminating be etched.

Here, if the etching of the oxide film is dry etching, W ₂ / W ₁ may be smaller than 1.5. In any case, it is preferable that the width of the protrusion of the oxide film in the trench direction be larger than twice the thickness of the gate electrode. Thereby, the gate oxide film in the side wall direction at the end of the trench becomes the thickest. Next, a gate oxide film 3 is grown to a thickness of 100 nm [FIG.

The trench 5 is filled with polycrystalline silicon 24 by a low pressure CVD method to form a gate electrode [FIG. In this manner, the gate oxide film 3a at the end portion of the trench 5 is formed thick, so that the conventional reduction in breakdown voltage can be prevented. In the actually fabricated trench gate type MOSFET, the thickness of the gate oxide film 3 is set to 1
When the thickness is set to 00 nm, the gate breakdown voltage is 85 V or more, which is about 20% higher than the conventional 70 V.

Although FIG. 1 shows only one end of the stripe-shaped trench, this figure shows only one end of the stripe-shaped trench, and the same structure is applied to the other end of the trench. And HTO (high temperature oxide film) as a CVD oxide film to be buried in the trench 5
In addition, phosphorus-silica glass (PSG), boron-phosphorus-silica glass (BPSG), spin-on glass (SOG), or the like can also be used. [Example 1b] FIGS. 4A to 4D and FIGS.
FIG. 2C is a sectional view of the main process for explaining another method for manufacturing the trench gate type MOSFET of FIG. 1.

After the gate oxide film 3 is formed in the trench 5, it is buried with polycrystalline silicon 24, and the polycrystalline silicon 24 on the surface of the semiconductor substrate is etched back [FIG.
(A)]. Except for the vicinity of the end of the trench, the photoresist 23 is used for masking [FIG.

The polycrystalline silicon 24 which is not masked by the photoresist 23 is etched [FIG. Next, a screen oxide film 25 is formed [FIG. The trench 5 is filled with the HTO oxide film 22 by the CVD method (FIG. 5A). Then, the HTO oxide film 22 on the surface is etched back so as to leave only the HTO oxide film 22a in the trench [FIG.

A field oxide film 1 is formed on the surface of a semiconductor substrate.
After forming 2, polycrystalline silicon 24 is deposited again,
It is assumed that the gate electrode 4 is drawn [FIG. The actually-produced trench gate type MOSFET also showed a breakdown voltage almost equal to that of the example 1a. In this embodiment, since the gate electrode 4 is pulled out from the end of the trench, the polycrystalline silicon 24 is deposited. However, if the gate electrode 4 is drawn out from the center of the trench, the polycrystalline silicon in this step is removed. The deposition of the silicon 24 becomes unnecessary, and only the formation of the field oxide film 12 is sufficient.

[Embodiment 2] FIG. 6 is a sectional view of a trench gate type MOSFET according to a second embodiment of the present invention. The end of the striped trench 5 is p deeper than the trench.
It is surrounded by a termination region 26. And this p-terminal region 2
6 is electrically separated from the source electrode 9 and a drain electrode (not shown).

In this figure, only one end of the stripe trench is shown, but the other end has the same structure. By doing so, the voltage applied to the gate electrode is carried by the pn junction between p-termination region 26 and n drift layer 1b, and the electric field applied to gate oxide film 3b at the trench termination is reduced. You. Therefore, even if the thickness of the gate oxide film 3b at the end of the trench is small, the breakdown voltage no longer decreases.

In the actually manufactured trench MOSFET, when the thickness of the gate oxide film 3 is 100 nm, the withstand voltage of the gate oxide film is 90 V or more, which is about 30% higher than the conventional one. In the embodiment, an example of a MOSFET is shown, but an IGBT in which the n ⁺ drain layer 1a is replaced with a p collector layer, an insulated gate thyristor, a high breakdown voltage IC
(HVIC) and a trench gate type semiconductor device such as an intelligent power module (IPM) which is an aggregate thereof.

[0031]

As described above, according to the present invention, a structure in which a thick gate oxide film is provided at the end of a striped trench toward the chip end, or the trench end is surrounded by an end region deeper than the depth of the trench. By doing so, it was possible to prevent a decrease in breakdown voltage due to the gate oxide film at the trench end, which was a conventional problem, and to improve the long-term reliability of the trench gate type semiconductor device.

[Brief description of the drawings]

FIG. 1 shows a trench gate type MOSFE according to a first embodiment of the present invention.
Cross section of T

FIGS. 2A to 2D show trench gate type M of FIG.
Sectional drawing in order of process explaining a manufacturing method of OSFET

3 (a) to 3 (d) are cross-sectional views in a process order illustrating a method of manufacturing the trench gate type MOSFET of FIG. 1 subsequent to FIG. 2 (d).

FIGS. 4A to 4D are cross-sectional views in the order of steps for explaining another method for manufacturing the MOSFET of FIG. 1;

5 (a) to 5 (c) are cross-sectional views in the order of steps for explaining another method for manufacturing the trench gate type MOSFET of FIG. 1 following FIG. 4 (d).

FIG. 6 shows a trench gate type MOSFE according to a second embodiment of the present invention.
Cross section of T

FIG. 7A is a conventional trench gate type MOSFET.
FIGS. 7B and 7C are plan views of FIGS.
FIG. 7C is a cross-sectional view taken along line A and line BB.
Enlarged view of part of

[Explanation of symbols]

REFERENCE SIGNS LIST 1 semiconductor substrate 1 an ⁺ drain layer 1 b n drift layer 3 gate oxide film 3 a gate oxide film at trench termination 4 gate electrode 5 trench 7 p well region 8 n source region 9 source electrode 10 drain electrode 11 interlayer insulating film 12 field oxidation Film 13 gate metal electrode 14 upper corner of trench end 16 step of gate electrode 17 step of field oxide film 21 sacrificial oxide film 22 HTO oxide film 23 photoresist 24 polycrystalline silicon 25 screen oxide film 26 p termination region

Claims (3)

[Claims] A first conductivity type drain layer; a second conductivity type channel region provided on the first conductivity type drain layer;
A first conductivity type source region selectively formed on the surface layer of the second conductivity type channel region, and a second conductivity type channel region penetrating from the surface of the first conductivity type source region to the first conductivity type drain layer. A reaching trench, a gate electrode provided in the trench via a gate insulating film, a source electrode provided in common contact with the surfaces of the first conductivity type source region and the second conductivity type channel region, In the trench gate type semiconductor device including the drain electrode provided in contact with the one conductivity type drain layer, the thickness of the gate oxide film at the end of the stripe-shaped trench is smaller than the thickness of the gate oxide film at the other portion of the trench. A trench gate type semiconductor device characterized by being thicker than a thickness. 2. The trench gate type semiconductor device according to claim 1, wherein the thickness of the gate oxide film in the side wall direction at the end of the stripe-shaped trench is larger than the thickness of the gate oxide film in the other portion of the trench. A trench gate type semiconductor device. 3. A first conductivity type drain layer, a second conductivity type channel region provided on the first conductivity type drain layer,
A first conductivity type source region selectively formed on the surface layer of the second conductivity type channel region, and a second conductivity type channel region penetrating from the surface of the first conductivity type source region to the first conductivity type drain layer. A reaching trench, a gate electrode provided in the trench via a gate insulating film, a source electrode provided in common contact with the surfaces of the first conductivity type source region and the second conductivity type channel region, In the trench gate type semiconductor device including the drain electrode provided in contact with the one conductivity type drain layer, an end portion of the stripe-shaped trench is surrounded by a second conductivity type end region deeper than the trench, and A trench gate type semiconductor device, wherein a second conductivity type termination region is electrically separated from a source electrode and a drain electrode.