JP2001347500A - Manufacturing method of micromachine - Google Patents
Manufacturing method of micromachineInfo
- Publication number
- JP2001347500A JP2001347500A JP2000168790A JP2000168790A JP2001347500A JP 2001347500 A JP2001347500 A JP 2001347500A JP 2000168790 A JP2000168790 A JP 2000168790A JP 2000168790 A JP2000168790 A JP 2000168790A JP 2001347500 A JP2001347500 A JP 2001347500A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- film
- amorphous
- sacrificial layer
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 229910018104 Ni-P Inorganic materials 0.000 claims abstract description 16
- 229910018536 Ni—P Inorganic materials 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000010949 copper Substances 0.000 claims abstract description 13
- 238000007772 electroless plating Methods 0.000 claims abstract description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052802 copper Inorganic materials 0.000 claims abstract description 8
- 238000007747 plating Methods 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims abstract description 7
- 239000005300 metallic glass Substances 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 4
- 239000004020 conductor Substances 0.000 abstract description 26
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 4
- 239000010408 film Substances 0.000 description 25
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 6
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 235000019270 ammonium chloride Nutrition 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000005459 micromachining Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Micromachines (AREA)
- Chemically Coating (AREA)
- ing And Chemical Polishing (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、表面マイクロマ
シニング技術を用いたマイクロマシンの作製方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a micromachine using a surface micromachining technique.
【0002】[0002]
【従来の技術】近年、微細な構造体を形成して静電スイ
ッチやセンサなどを作製するために、マイクロマシン技
術の開発が精力的に行われている。代表的な構造である
多結晶シリコンを構造体に用いたマイクロマシンは、シ
リコン集積回路の作製工程を基にした工程で作製され
る。そのため、プロセス温度が高くシリコン(Si)な
どの耐熱性の有る基板しか使えない、段差が大きい構造
体が作れないなどの欠点が有る。この欠点を補うため、
例えば、次のように構造体が提案されている。(1)樹
脂製支柱とアルミ薄膜を組み合わせた構造体(John N.
Randall,Chuck Goldsmith et.al,J.Vac,Sci,technol.B/
4(6),p.3692 〜3696(1996))。(2)Niメッキを用い
た構造体(Paul M.Zavracy,Nicol E.McGruer et.al,Pro
c.Sens.Eypo.Detroit.p.293 〜298(1997) )。しかし、
構造体の強度の点で問題が有る。2. Description of the Related Art In recent years, micromachine technology has been energetically developed in order to form an electrostatic switch or a sensor by forming a fine structure. A micromachine using polycrystalline silicon as a structure, which is a typical structure, is manufactured by a process based on a manufacturing process of a silicon integrated circuit. Therefore, there are disadvantages such as that only a substrate having a high process temperature such as silicon (Si) having heat resistance can be used, and a structure having a large step cannot be formed. To make up for this shortcoming,
For example, a structure has been proposed as follows. (1) A structure combining resin columns and aluminum thin film (John N.
Randall, Chuck Goldsmith et.al, J. Vac, Sci, technol.B /
4 (6), p.3692-3696 (1996)). (2) Structure using Ni plating (Paul M. Zavracy, Nicol E. McGruer et.al, Pro
c. Sens. Eypo. Detroit. p. 293-298 (1997)). But,
There is a problem in the strength of the structure.
【0003】[0003]
【発明が解決しようとする課題】この発明は上記のよう
な背景の下になされたものであり、その目的は、新規な
手法により、基板の選択の自由度を増し、安価な基板の
使用を可能にするとともに、段差の大きな構造体の作製
を可能にするマイクロマシンの作製方法を提供すること
にある。SUMMARY OF THE INVENTION The present invention has been made in view of the above background, and an object of the present invention is to increase the degree of freedom in selecting a substrate by using a novel technique and to use an inexpensive substrate. It is another object of the present invention to provide a method for manufacturing a micromachine that enables a structure having a large step to be made possible.
【0004】[0004]
【課題を解決するための手段】請求項1に記載のマイク
ロマシンの作製方法によれば、基板の上に犠牲層が形成
され、犠牲層上を含む基板上に無電解メッキ法によりア
モルファス金属膜が堆積される。そして、犠牲層をエッ
チングにより除去してアモルファス金属膜が梁構造にさ
れる。According to the first aspect of the present invention, a sacrifice layer is formed on a substrate, and an amorphous metal film is formed on the substrate including the sacrifice layer by electroless plating. Is deposited. Then, the sacrificial layer is removed by etching, so that the amorphous metal film has a beam structure.
【0005】このように、無電解メッキを利用して、常
温で犠牲層上にアモルファス金属膜を堆積することで、
段差の大きい場所でも段切れすることなく、機械強度の
優れた構造体を形成することができる。その結果、基板
の選択の自由度を増し、安価な基板の使用を可能にする
とともに、段差の大きな構造体の作製が可能となる。As described above, by depositing an amorphous metal film on a sacrificial layer at room temperature using electroless plating,
A structure having excellent mechanical strength can be formed without breakage even in a place having a large step. As a result, the degree of freedom in selecting a substrate is increased, an inexpensive substrate can be used, and a structure having a large step can be manufactured.
【0006】ここで、請求項2に記載のように、無電解
メッキとして、無電解Ni−Pメッキを用いると、実用
上好ましい。この際、請求項3に記載のように、犠牲層
として、導電性を有するもの、特に、請求項4に記載の
ように銅膜を用いると、実用上好ましいものとなる。Here, it is practically preferable to use electroless Ni-P plating as the electroless plating. At this time, it is practically preferable to use a conductive film as the sacrificial layer, particularly, a copper film as described in claim 4.
【0007】[0007]
【発明の実施の形態】以下、この発明を具体化した実施
の形態を図面に従って説明する。本実施形態においては
ミリ波集積回路の一部をなす静電スイッチ(詳しくは、
容量結合型静電スイッチ)に具体化している。図1に
は、本実施形態における静電スイッチの斜視図を示す。
また、図2には静電スイッチの平面図を示す。さらに、
図2のA−A線での縦断面を図3に示す。Embodiments of the present invention will be described below with reference to the drawings. In the present embodiment, an electrostatic switch (particularly, a part of a millimeter wave integrated circuit)
(A capacitive coupling type electrostatic switch). FIG. 1 is a perspective view of the electrostatic switch according to the present embodiment.
FIG. 2 is a plan view of the electrostatic switch. further,
FIG. 3 shows a vertical section taken along line AA in FIG.
【0008】基板1には高抵抗シリコン基板が用いられ
ており、その抵抗値は1000Ωcm以上である。高抵
抗シリコン基板1の上には導体2,3,4が延設され、
コプレーナウェーブガイドを構成している。つまり、基
板1の上にグランド用導体3,4が延設されるととも
に、グランド用導体3,4の間に伝送線路2が延びてい
る。導体2〜4はAu/Tiよりなる。なお、基板1上
の導体2〜4の無い領域には絶縁層5が形成され、絶縁
層5はシリコン酸化膜(SiO2 )よりなる。その線路
の途中において、導体2,3,4の上に絶縁層6が形成
され、絶縁層6はシリコン窒化膜(Si3 N4 )よりな
る。絶縁層6の上には空隙7を介して梁構造のスイッチ
用導体8が配置されている。スイッチ用導体8にはアモ
ルファス金属であるアモルファスNi−Pが用いられて
いる。A high-resistance silicon substrate is used as the substrate 1 and its resistance value is 1000 Ωcm or more. Conductors 2, 3, and 4 are extended on the high-resistance silicon substrate 1,
It constitutes a coplanar waveguide. That is, the ground conductors 3 and 4 extend on the substrate 1, and the transmission line 2 extends between the ground conductors 3 and 4. The conductors 2 to 4 are made of Au / Ti. Note that an insulating layer 5 is formed in a region on the substrate 1 where the conductors 2 to 4 do not exist, and the insulating layer 5 is made of a silicon oxide film (SiO 2 ). In the middle of the line, an insulating layer 6 is formed on the conductors 2, 3, and 4, and the insulating layer 6 is made of a silicon nitride film (Si 3 N 4 ). A switching conductor 8 having a beam structure is arranged on the insulating layer 6 via a gap 7. The switch conductor 8 is made of amorphous Ni-P, which is an amorphous metal.
【0009】梁構造のスイッチ用導体8は、平面形状と
して、図2に示すように、4つのアンカー部9a,9
b,9c,9dを有し、そのアンカー部9a,9b,9
c,9dから梁10a,10b,10c,10dが延
び、長方形部(対向電極部)11につながっている。長
方形部11は線路用導体2,3,4の上に位置してい
る。アンカー部9a,9bは制御電極12aの上に固定
されるとともに、アンカー部9c,9dは制御電極12
bの上に固定されている。制御電極12a,12bはA
u/Tiよりなる。図3に示すように、スイッチ用導体
8とグランド用導体3,4との間には容量C1,C2が
形成されるとともに、スイッチ用導体8と伝送線路2と
の間には容量C3が形成されている。As shown in FIG. 2, the switch conductor 8 having a beam structure has four anchor portions 9a and 9 as shown in FIG.
b, 9c, 9d, and their anchor portions 9a, 9b, 9
Beams 10a, 10b, 10c, and 10d extend from c and 9d, and are connected to a rectangular portion (opposite electrode portion) 11. The rectangular portion 11 is located on the line conductors 2, 3, and 4. The anchors 9a and 9b are fixed on the control electrode 12a, and the anchors 9c and 9d are fixed on the control electrode 12a.
b. The control electrodes 12a and 12b are A
u / Ti. As shown in FIG. 3, capacitors C1 and C2 are formed between the switch conductor 8 and the ground conductors 3 and 4, and a capacitor C3 is formed between the switch conductor 8 and the transmission line 2. Have been.
【0010】そして、制御電極12a,12bに電圧が
印加されない状態では、スイッチ用導体8の長方形部
(対向電極部)11とグランド用導体3,4および伝送
線路2とは所定の間隔に保持されている。この状態では
線路をミリ波が伝送していく。一方、この状態から制御
電極12a,12bに交流電圧が印加されると、スイッ
チ用導体8の長方形部11が基板1側に引き寄せられ、
図4に示すように、スイッチ用導体8の長方形部11と
グランド用導体3,4の距離、および、長方形部11と
伝送線路2の距離が小さくなり(容量C1,C2,C3
が減少して)、伝送線路2とグランド用導体3,4の間
が高周波に対して短絡されるため線路が終端される。そ
のため、伝送線路2を伝送してきたミリ波は当該箇所で
反射する。このように、ミリ波の通過を許容/遮断する
スイッチとして機能する。When no voltage is applied to the control electrodes 12a, 12b, the rectangular portion (opposite electrode portion) 11 of the switch conductor 8, the ground conductors 3, 4, and the transmission line 2 are held at predetermined intervals. ing. In this state, millimeter waves are transmitted through the line. On the other hand, when an AC voltage is applied to the control electrodes 12a and 12b from this state, the rectangular portion 11 of the switch conductor 8 is drawn toward the substrate 1, and
As shown in FIG. 4, the distance between the rectangular portion 11 of the switch conductor 8 and the ground conductors 3 and 4 and the distance between the rectangular portion 11 and the transmission line 2 are reduced (capacitances C1, C2, and C3).
Is reduced), and the line is terminated because the transmission line 2 and the ground conductors 3 and 4 are short-circuited to a high frequency. Therefore, the millimeter wave transmitted through the transmission line 2 is reflected at the corresponding location. In this way, it functions as a switch that allows / blocks the passage of the millimeter wave.
【0011】次に、この容量結合型静電スイッチを作製
する工程について、図5および図3を用いて説明する。
まず、図5(a)に示すように、高抵抗シリコン基板1
を用意する。そして、高抵抗シリコン基板1上に、絶縁
層であるシリコン酸化膜(SiO2 )5と線路用導体や
制御電極となるAu/Ti膜(2,3,4,12a,1
2b)をフォトリソグラフィにより形成する。Next, a process of manufacturing the capacitive coupling type electrostatic switch will be described with reference to FIGS.
First, as shown in FIG.
Prepare Then, on the high-resistance silicon substrate 1, a silicon oxide film (SiO 2 ) 5 as an insulating layer and an Au / Ti film (2, 3, 4, 12a, 1) serving as a line conductor or a control electrode are formed.
2b) is formed by photolithography.
【0012】さらに、図5(b)に示すように、高抵抗
シリコン基板1上におけるシリコン酸化膜5およびAu
/Ti膜(2,3,4,12a,12b)の上に絶縁層
となるシリコン窒化膜(Si3 N4 )6を堆積し、パタ
ーニングする。Further, as shown in FIG. 5B, a silicon oxide film 5 and Au on the high resistance silicon substrate 1 are formed.
A silicon nitride film (Si 3 N 4 ) 6 serving as an insulating layer is deposited on the / Ti film (2, 3, 4 , 12a, 12b) and patterned.
【0013】その後、図5(c)に示すように、基板1
の上に、犠牲層となる銅膜20を形成し、さらに、銅膜
20に対し構造体のアンカー部となる箇所21を開口す
る。引き続き、図5(d)に示すように、フォトレジス
ト22をパターニングする。そして、無電解メッキによ
り基板1上にアモルファスNi−P膜8を堆積する。つ
まり、基板1上におけるフォトレジスト22から露出し
た部位(Cu犠牲層20の上およびアンカー部となる箇
所21)に対しアモルファスNi−P膜8を堆積する。
この無電解Ni−Pメッキを行うときの温度は約90℃
である。[0013] Thereafter, as shown in FIG.
A copper film 20 serving as a sacrifice layer is formed on the substrate, and a portion 21 serving as an anchor portion of the structure is opened in the copper film 20. Subsequently, as shown in FIG. 5D, the photoresist 22 is patterned. Then, an amorphous Ni-P film 8 is deposited on the substrate 1 by electroless plating. That is, the amorphous Ni-P film 8 is deposited on the portion of the substrate 1 exposed from the photoresist 22 (on the Cu sacrificial layer 20 and the portion 21 serving as the anchor portion).
The temperature when performing this electroless Ni-P plating is about 90 ° C.
It is.
【0014】その後、フォトレジスト22を除去した
後、Cu犠牲層20をエッチングにて除去する。エッチ
ング液には、塩化アンモン第2銅とアンモニアの混合物
を用いる。その結果、図3に示すように、スイッチ用導
体(アモルファスNi−P膜)8と線路用導体(Au/
Ti)2,3,4との間に空隙7が形成され、スイッチ
用導体8の梁10a〜10dと長方形部(対向電極部)
11が基板1側から分離する。このように犠牲層エッチ
ングにてアモルファスNi−P膜8を梁構造にして、静
電スイッチの作製が完了する。Thereafter, after removing the photoresist 22, the Cu sacrificial layer 20 is removed by etching. As an etching solution, a mixture of cupric ammonium chloride and ammonia is used. As a result, as shown in FIG. 3, the switch conductor (amorphous Ni-P film) 8 and the line conductor (Au /
A gap 7 is formed between Ti) 2, 3, and 4, and beams 10a to 10d of the switch conductor 8 and a rectangular portion (a counter electrode portion)
11 is separated from the substrate 1 side. In this way, the fabrication of the electrostatic switch is completed by making the amorphous Ni-P film 8 into a beam structure by the sacrifice layer etching.
【0015】以上のように、無電解Ni−Pメッキによ
り、常温(0〜100℃)で機械強度の優れたアモルフ
ァス金属の堆積が可能であることを利用して、シリコン
集積回路の作製工程のような高温(例えば、1000
℃)の工程を用いることなく構造体の形成が可能にな
る。それ故、基板の選択の自由度を増し、安価な基板の
使用を可能にすると共に、メッキのステップカバレッジ
を利用し、段差の大きな構造体を作製することが可能と
なる。As described above, by utilizing the fact that amorphous metal having excellent mechanical strength can be deposited at room temperature (0 to 100 ° C.) by electroless Ni—P plating, a process for manufacturing a silicon integrated circuit can be performed. Such high temperature (for example, 1000
C) can be formed without using the step (C). Therefore, the degree of freedom in selecting a substrate can be increased, an inexpensive substrate can be used, and a structure having a large step can be manufactured by utilizing plating step coverage.
【0016】より具体的には、ガラス基板は耐熱温度が
500℃以下であり、プラスチック基板(樹脂基板)は
耐熱温度が150℃程度である。このような安価な基板
を使用することが可能となる。More specifically, a glass substrate has a heat resistant temperature of 500 ° C. or less, and a plastic substrate (resin substrate) has a heat resistant temperature of about 150 ° C. Such an inexpensive substrate can be used.
【0017】このように、本実施の形態は下記の特徴を
有する。 (イ)マイクロマシンの作製方法として、図5(c)に
示すように、基板1の上に、導電性を有する犠牲層とし
ての銅膜20を形成する工程と、図5(d)に示すよう
に、Cu犠牲層20上を含む基板1上に無電解メッキ法
(無電解Ni−Pメッキ)によりアモルファス金属膜で
あるアモルファスNi−P膜8を堆積する工程と、Cu
犠牲層20をエッチングにより除去して、図3に示すよ
うに、アモルファスNi−P膜8を梁構造にする工程
と、を備えた。このように、無電解メッキを利用して、
常温でCu犠牲層20上にアモルファスNi−P膜8を
堆積することで、段差の大きい場所でも段切れすること
なく、機械強度の優れた構造体を形成することができ
る。その結果、基板の選択の自由度を増し、安価な基板
の使用を可能にするとともに、段差の大きな構造体の作
製が可能となる。As described above, this embodiment has the following features. (A) As a method for manufacturing a micromachine, as shown in FIG. 5C, a step of forming a copper film 20 as a sacrificial layer having conductivity on the substrate 1 and a step of forming a copper film as shown in FIG. Depositing an amorphous Ni-P film 8 as an amorphous metal film on the substrate 1 including the Cu sacrificial layer 20 by an electroless plating method (electroless Ni-P plating);
And removing the sacrificial layer 20 by etching to form the amorphous Ni-P film 8 into a beam structure as shown in FIG. In this way, using electroless plating,
By depositing the amorphous Ni-P film 8 on the Cu sacrificial layer 20 at normal temperature, a structure having excellent mechanical strength can be formed without breaking even in a place having a large step. As a result, the degree of freedom in selecting a substrate is increased, an inexpensive substrate can be used, and a structure having a large step can be manufactured.
【0018】なお、本発明のマイクロマシンの具体的用
途として、微細な構造体を有する静電スイッチの他に
も、アクチュエータ、センサなどを挙げることができ
る。また、アモルファス金属として、アモルファスNi
−Pを用いたが、他のアモルファス金属、例えばNi−
B等を使用してもよい。As a specific application of the micromachine of the present invention, an actuator, a sensor, and the like can be given in addition to an electrostatic switch having a fine structure. As an amorphous metal, amorphous Ni
Although -P was used, other amorphous metals such as Ni-
B or the like may be used.
【図1】 実施の形態における容量結合型静電スイッチ
の斜視図。FIG. 1 is a perspective view of a capacitive coupling type electrostatic switch according to an embodiment;
【図2】 容量結合型静電スイッチの平面図。FIG. 2 is a plan view of a capacitive coupling type electrostatic switch.
【図3】 図2のA−A線での縦断面図。FIG. 3 is a longitudinal sectional view taken along line AA of FIG. 2;
【図4】 静電スイッチの動作説明図。FIG. 4 is an explanatory diagram of an operation of the electrostatic switch.
【図5】 静電スイッチを作製する工程説明図。FIG. 5 is a diagram illustrating a process of manufacturing an electrostatic switch.
1…高抵抗シリコン基板、2,3,4…導体、5…絶縁
層、6…絶縁層、7…空隙、8…スイッチ用導体、20
…犠牲層となる銅膜。DESCRIPTION OF SYMBOLS 1 ... High resistance silicon substrate, 2, 3, 4 ... Conductor, 5 ... Insulating layer, 6 ... Insulating layer, 7 ... Air gap, 8 ... Switch conductor, 20
... A copper film to be a sacrificial layer.
フロントページの続き (72)発明者 筈見 浩史 愛知県刈谷市昭和町1丁目1番地 株式会 社デンソー内 Fターム(参考) 4K022 AA02 AA31 AA41 BA04 BA14 BA16 BA35 CA28 DA01 EA03 EA04 4K057 WA12 WB03 WC05 WE08 WE23 WN01 WN06 Continuing from the front page (72) Inventor Hiroshi Zumi 1-1-1 Showa-cho, Kariya-shi, Aichi F-term in DENSO Corporation (reference) 4K022 AA02 AA31 AA41 BA04 BA14 BA16 BA35 CA28 DA01 EA03 EA04 4K057 WA12 WB03 WC05 WE08 WE23 WN01 WN06
Claims (4)
アモルファス金属膜を堆積する工程と、 前記犠牲層をエッチングにより除去して前記アモルファ
ス金属膜を梁構造にする工程と、を備えたことを特徴と
するマイクロマシンの作製方法。A step of forming a sacrificial layer on the substrate, a step of depositing an amorphous metal film on the substrate including the sacrificial layer by electroless plating, and removing the sacrificial layer by etching. A step of forming the amorphous metal film into a beam structure.
ッキであることを特徴とする請求項1に記載のマイクロ
マシンの作製方法。2. The method according to claim 1, wherein the electroless plating is electroless Ni—P plating.
ることを特徴とする請求項1または2に記載のマイクロ
マシンの作製方法。3. The method according to claim 1, wherein the sacrificial layer has conductivity.
ることを特徴とする請求項3に記載のマイクロマシンの
作製方法。4. The method according to claim 3, wherein the conductive sacrificial layer is a copper film.
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Cited By (9)
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| JP2004172504A (en) * | 2002-11-21 | 2004-06-17 | Fujitsu Media Device Kk | Variable capacitor, package including the same, and method of manufacturing variable capacitor |
| US7189625B2 (en) | 2002-06-05 | 2007-03-13 | Nippon Telegraph And Telephone Corporation | Micromachine and manufacturing method |
| JP2007250848A (en) * | 2006-03-16 | 2007-09-27 | Casio Comput Co Ltd | Manufacturing method of three-dimensional wiring structure |
| US7402877B2 (en) | 2002-07-30 | 2008-07-22 | Sony Corporation | Micromachine and method of manufacturing the micromachine |
| US7411261B2 (en) | 2002-03-11 | 2008-08-12 | Samsung Electronics Co., Ltd. | MEMS device and fabrication method thereof |
| US7759591B2 (en) | 2005-12-15 | 2010-07-20 | Samsung Electronics Co., Ltd. | Pneumatic MEMS switch and method of fabricating the same |
| JP2011005600A (en) * | 2009-06-26 | 2011-01-13 | Fujitsu Ltd | Mems device and method for manufacturing the same |
| US8508003B2 (en) | 2009-04-24 | 2013-08-13 | Murata Manufacturing Co., Ltd. | MEMS element and method for manufacturing same |
| JP2016137565A (en) * | 2014-12-22 | 2016-08-04 | デルフメムズ エスエーエス | MEMS structure with thick movable film |
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| JPH01264618A (en) * | 1988-04-15 | 1989-10-20 | Seiko Epson Corp | Magnetic head manufacturing method |
| JPH0653687A (en) * | 1992-07-29 | 1994-02-25 | Tochigi Pref Gov | Electromagnetic shield material and manufacturing method thereof |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7411261B2 (en) | 2002-03-11 | 2008-08-12 | Samsung Electronics Co., Ltd. | MEMS device and fabrication method thereof |
| US7189625B2 (en) | 2002-06-05 | 2007-03-13 | Nippon Telegraph And Telephone Corporation | Micromachine and manufacturing method |
| US7402877B2 (en) | 2002-07-30 | 2008-07-22 | Sony Corporation | Micromachine and method of manufacturing the micromachine |
| JP2004172504A (en) * | 2002-11-21 | 2004-06-17 | Fujitsu Media Device Kk | Variable capacitor, package including the same, and method of manufacturing variable capacitor |
| US7759591B2 (en) | 2005-12-15 | 2010-07-20 | Samsung Electronics Co., Ltd. | Pneumatic MEMS switch and method of fabricating the same |
| JP2007250848A (en) * | 2006-03-16 | 2007-09-27 | Casio Comput Co Ltd | Manufacturing method of three-dimensional wiring structure |
| US8508003B2 (en) | 2009-04-24 | 2013-08-13 | Murata Manufacturing Co., Ltd. | MEMS element and method for manufacturing same |
| JP2011005600A (en) * | 2009-06-26 | 2011-01-13 | Fujitsu Ltd | Mems device and method for manufacturing the same |
| JP2016137565A (en) * | 2014-12-22 | 2016-08-04 | デルフメムズ エスエーエス | MEMS structure with thick movable film |
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