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JP2001237380A - Variable resistance element and semiconductor device using the same - Google Patents

Variable resistance element and semiconductor device using the same

Info

Publication number
JP2001237380A
JP2001237380A JP2000048821A JP2000048821A JP2001237380A JP 2001237380 A JP2001237380 A JP 2001237380A JP 2000048821 A JP2000048821 A JP 2000048821A JP 2000048821 A JP2000048821 A JP 2000048821A JP 2001237380 A JP2001237380 A JP 2001237380A
Authority
JP
Japan
Prior art keywords
resistance element
variable resistance
resistor
variable
main component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000048821A
Other languages
Japanese (ja)
Inventor
Kenji Iijima
賢二 飯島
Michihito Ueda
路人 上田
Koji Nishikawa
孝司 西川
Kiyoyuki Morita
清之 森田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2000048821A priority Critical patent/JP2001237380A/en
Publication of JP2001237380A publication Critical patent/JP2001237380A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problems that circuits in an FPGA using anti-fuses cannot be rewritten several times but only once because of its operation characteristics, circuits in an FPGA using an SRAM can be rewritten any number of times, but the power consumption increases, the memory cannot be held with power set off and hence it needs to re-store information in a RAM, and a flash memory has a low writing rate of about several milliseconds, a high writing voltage of 8-12 V and a little write-erase repetition of about several hundred thousand times. SOLUTION: In the variable resistive element composed of a resistance body with electrodes at the ends, the resistance body is an oxide containing as a main component any metal selected among a group of following materials.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子機器に用いら
れる可変抵抗素子、半導体メモリ装置、半導体大規模集
積回路等に用いられる。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used for a variable resistance element, a semiconductor memory device, a semiconductor large-scale integrated circuit and the like used in electronic equipment.

【0002】[0002]

【従来の技術】携帯性に優れ、ネットワークへのアクセ
スが容易に行える携帯情報端末用への要求が高まってい
る。これら情報携帯端末には、情報処理用のプロセッサ
が搭載されているが、通常はそれぞれの目的に応じてカ
スタマイズされた専用のLSIが用いられている。近
年、情報機器の多様化に伴い、アンチフューズによる回
路再構成が可能なFPGA、SRAMを搭載し、LSI
中に作り込まれたIPを逐次切り替えることで、多様な
情報処理に対応するFPGAなどが用いられるようにな
った。また、EEPROM、FLASHメモリは不揮発
性で電気的に記録の書き込み消去が可能であるため現在
各種機器、ICカード等に搭載されている。しかしなが
ら、これらメモリの書き込み速度が約ミリ秒と遅く、書
き込み電圧が8〜12Vと高い、あるいは書き込み/消
去の繰り返しが数十万回程度と少ないといった課題があ
る。
2. Description of the Related Art There is an increasing demand for portable information terminals which are excellent in portability and can easily access a network. These information portable terminals are equipped with a processor for information processing. Usually, dedicated LSIs customized for respective purposes are used. In recent years, along with the diversification of information devices, FPGAs and SRAMs that can reconfigure circuits using antifuse
By sequentially switching the IPs built therein, FPGAs and the like that support various information processing have come to be used. EEPROMs and FLASH memories are non-volatile and electrically recordable and erasable, and are therefore currently mounted on various devices, IC cards, and the like. However, there is a problem that the writing speed of these memories is as low as about millisecond, the writing voltage is as high as 8 to 12 V, or the repetition of writing / erasing is as small as several hundred thousand times.

【0003】[0003]

【発明が解決しようとする課題】アンチフューズを用い
たFPGAでは、回路の書き込みはその動作特性上1回
のみで、何度も書き換えることは出来ない。また、SR
AMを用いたFPGAでは回路の書き換えは何度も出来
るが、消費電力が大きくなり、また、電源OFF時には
記憶の保持が出来ないため、情報をRAM待避させる必
要がある。またフラッシュメモリは書き込み速度が約ミ
リ秒と遅く、書き込み電圧が8〜12Vと高い、あるい
は書き込み/消去の繰り返しが数十万回程度と少ないと
いった課題がある。
In an FPGA using an antifuse, writing of a circuit is performed only once due to its operating characteristics and cannot be rewritten many times. Also, SR
In the FPGA using the AM, the circuit can be rewritten many times, but the power consumption increases and the memory cannot be held when the power is turned off. Therefore, it is necessary to save the information to the RAM. Further, the flash memory has a problem that the writing speed is as slow as about millisecond, the writing voltage is as high as 8 to 12 V, or the number of repetitions of writing / erasing is as small as several hundred thousand times.

【0004】[0004]

【課題を解決するための手段】端部に電極を有する抵抗
体で構成される可変抵抗素子において、前記抵抗体が下
記物質群から選ばれたいずれかの金属を主成分とする酸
化物であることを特徴とする可変抵抗素子を構成する。
金属酸化物として、物質群:銀、鉛、銅、Pd、Irか
ら選ばれたいずれかの金属酸化物を用いる。さらには、
前記可変抵抗素子を用いた、メモリを搭載した半導体装
置を構成する。さらには、前記可変抵抗素子を搭載した
大規模半導体集積回路を搭載した半導体装置を構成す
る。
According to the present invention, there is provided a variable resistance element comprising a resistor having an electrode at an end, wherein the resistor is an oxide mainly composed of a metal selected from the following substance group. A variable resistance element characterized by the above features.
As the metal oxide, any metal oxide selected from a substance group: silver, lead, copper, Pd, and Ir is used. Moreover,
A semiconductor device having a memory using the variable resistance element is configured. Further, a semiconductor device on which a large-scale semiconductor integrated circuit on which the variable resistance element is mounted is mounted.

【0005】[0005]

【発明の実施の形態】以下に実施例を用いて、上記発明
を詳細に記述する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

【0006】抵抗0.01Ω・cmのp型(100)S
i基板1上に膜厚100nmのSiO2膜2を熱酸化に
より形成した後、膜厚200nmの白金電極3をスパッ
タリング法で形成し、その後、CVD法により膜厚50
0nmのSiO24を形成したのち、イオンミリングに
より開口部を形成し、真空蒸着法により酸化銀5を堆積
したのち、CMPによる平坦化を行い、上部電極6をス
パッタリング法で形成し可変抵抗素子を作製した。本実
施例で作製した可変抵抗素子の断面模式図を図1に示
す。
A p-type (100) S having a resistance of 0.01 Ω · cm
After forming a SiO 2 film 2 having a thickness of 100 nm on an i-substrate 1 by thermal oxidation, a platinum electrode 3 having a thickness of 200 nm is formed by a sputtering method, and then a 50 nm-thick film is formed by a CVD method.
After forming a SiO 2 layer having a thickness of 0 nm, an opening is formed by ion milling, silver oxide 5 is deposited by a vacuum deposition method, flattening is performed by CMP, and an upper electrode 6 is formed by a sputtering method. Was prepared. FIG. 1 shows a schematic cross-sectional view of the variable resistance element manufactured in this example.

【0007】可変抵抗素子の下部電極3と上部電極6の
間に電圧を印加して可変抵抗素子の電流-電圧測定を行
った。その結果を図2に示す。図に示すとおり、電圧の
印加により電流の履歴が観察される。本実施例で作製し
た可変抵抗素子では、5V以上の電圧印加で電流値が非
線形に約2桁変化し、履歴が認められた。この電圧履歴
は1015回の繰り返しで全く変化が認められなかった。
6V印加時の抵抗は1ナノ秒以下の早さで変化し、測定
器の観測限界以下であった。銀酸化物の他に金属酸化物
として、鉛、銅、Pd、Irの酸化物を用いた場合にお
いても同様の結果が得られた。
A voltage was applied between the lower electrode 3 and the upper electrode 6 of the variable resistance element to measure the current-voltage of the variable resistance element. The result is shown in FIG. As shown in the figure, the history of the current is observed by applying the voltage. In the variable resistance element manufactured in this example, the current value changed nonlinearly by about two digits when a voltage of 5 V or more was applied, and a history was observed. This voltage history showed no change after 10 15 repetitions.
The resistance when 6 V was applied changed at a speed of 1 nanosecond or less, and was below the observation limit of the measuring instrument. Similar results were obtained when lead, copper, Pd, and Ir oxides were used as metal oxides in addition to silver oxide.

【0008】続いて、図3に示すように、可変抵抗素子
をダイオードと組み合わせてマトリックス状に配列させ
た回路素子を半導体基板上に作製した。XとYのスイッ
チを順次切り替えてマトリックス素子を個別にアクセス
し、電流値による抵抗変化を検討したところ、それぞれ
の素子で、図2に示したのと同じ電流電圧特性が得ら
れ、ランダムアクセスメモリデバイスとしての動作が実
証された。
Subsequently, as shown in FIG. 3, a circuit element in which variable resistance elements were combined with diodes and arranged in a matrix was fabricated on a semiconductor substrate. When the matrix elements are individually accessed by sequentially switching the X and Y switches and the resistance change according to the current value is examined, the same current-voltage characteristics as shown in FIG. Operation as a device has been demonstrated.

【0009】さらには、本実施例では検討を行わなかっ
たが、例えば、図4に示すようにMOSFETと組み合
わせた構成は、さらに高速の動作を実現するに有効であ
ることは、容易に理解できる。以上本実施例で示した構
成の可変抵抗素子を用いたメモリデバイスは、構成が簡
単で、高記録密度のメモリデバイスを実現することは極
めて容易である。
Further, although no study was conducted in this embodiment, it can be easily understood that, for example, a configuration combined with a MOSFET as shown in FIG. 4 is effective for realizing a higher-speed operation. . As described above, the memory device using the variable resistance element having the configuration shown in this embodiment has a simple configuration, and it is extremely easy to realize a memory device having a high recording density.

【0010】[0010]

【発明の効果】以上述べてきたように、本願発明の実施
により、高速動作の可変抵抗素子が容易に提供され、さ
らには高記録密度の不揮発半導体メモリ装置を容易に提
供する事が可能で、その産業に及ぼす経済的効果は顕著
なものが期待される。
As described above, by implementing the present invention, a high-speed operation variable resistance element can be easily provided, and a nonvolatile semiconductor memory device having a high recording density can be easily provided. The economic effects on the industry are expected to be significant.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る実施例で作製された可変抵抗素子
の断面図
FIG. 1 is a sectional view of a variable resistance element manufactured in an example according to the present invention.

【図2】本発明に係る実施例で作製された可変抵抗素子
の電流−電圧特性を示す図
FIG. 2 is a view showing current-voltage characteristics of a variable resistance element manufactured in an example according to the present invention.

【図3】可変抵抗素子をマトリックス配列したときの実
施例を示す図
FIG. 3 is a diagram showing an embodiment when variable resistance elements are arranged in a matrix.

【図4】MOSトランジスタと可変抵抗素子を組み合わ
せたメモリ素子の構成例を示す図
FIG. 4 is a diagram showing a configuration example of a memory element combining a MOS transistor and a variable resistance element;

【符号の説明】[Explanation of symbols]

1 Si基板 2 SiO2 3 下部電極 4 SiO2 5 金属酸化物 6 上部電極1 Si substrate 2 SiO 2 3 lower electrode 4 SiO 2 5 metal oxide 6 upper electrode

フロントページの続き (72)発明者 西川 孝司 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 森田 清之 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5F038 AV17 CA02 DF05 EZ14 EZ20 5F064 AA08 BB02 BB12 CC22 GG10 5F083 FZ10 JA21 JA38 Continuing from the front page (72) Inventor Takashi Nishikawa 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. Reference) 5F038 AV17 CA02 DF05 EZ14 EZ20 5F064 AA08 BB02 BB12 CC22 GG10 5F083 FZ10 JA21 JA38

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】端部に電極を有する抵抗体で構成される可
変抵抗素子において、前記抵抗体が銀を主成分とする酸
化物であることを特徴とする可変抵抗素子。
1. A variable resistor comprising a resistor having an electrode at an end, wherein the resistor is an oxide containing silver as a main component.
【請求項2】端部に電極を有する抵抗体で構成される可
変抵抗素子において、前記抵抗体が鉛を主成分とする酸
化物であることを特徴とする可変抵抗素子。
2. A variable resistance element comprising a resistor having an electrode at an end, wherein the resistor is an oxide containing lead as a main component.
【請求項3】端部に電極を有する抵抗体で構成される可
変抵抗素子において、前記抵抗体が銅を主成分とする酸
化物であることを特徴とする可変抵抗素子。
3. A variable resistor comprising a resistor having an electrode at an end, wherein the resistor is an oxide containing copper as a main component.
【請求項4】端部に電極を有する抵抗体で構成される可
変抵抗素子において、前記抵抗体がPdを主成分とする
酸化物であることを特徴とする可変抵抗素子。
4. A variable resistor comprising a resistor having an electrode at an end, wherein the resistor is an oxide containing Pd as a main component.
【請求項5】端部に電極を有する抵抗体で構成される可
変抵抗素子において、前記抵抗体がIrを主成分とする
酸化物であることを特徴とする可変抵抗素子。
5. A variable resistor comprising a resistor having an electrode at an end, wherein the resistor is an oxide containing Ir as a main component.
【請求項6】可変抵抗素子に流す電流値により可変抵抗
素子の抵抗値が変化することを特徴とする請求項1〜5
のいずれかに記載の可変抵抗素子。
6. The variable resistance element according to claim 1, wherein a resistance value of the variable resistance element changes according to a current value flowing through the variable resistance element.
The variable resistance element according to any one of the above.
【請求項7】可変抵抗素子に流す電流の通電時間によ
り、可変抵抗素子の抵抗値が変化する事を特徴とする請
求項1〜6のいずれかに記載の可変抵抗素子。
7. The variable resistance element according to claim 1, wherein the resistance value of the variable resistance element changes depending on the duration of the current flowing through the variable resistance element.
【請求項8】請求項1〜6のいずれかに記載の可変抵抗
素子の抵抗変化を用いてメモリを構成したことを特徴と
する半導体装置。
8. A semiconductor device comprising a memory using the resistance change of the variable resistance element according to claim 1.
【請求項9】請求項1〜6のいずれかに記載の可変抵抗
素子を用いたことを特徴とする大規模半導体集積回路を
搭載した半導体装置。
9. A semiconductor device equipped with a large-scale semiconductor integrated circuit, wherein the variable resistance element according to claim 1 is used.
JP2000048821A 2000-02-25 2000-02-25 Variable resistance element and semiconductor device using the same Pending JP2001237380A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000048821A JP2001237380A (en) 2000-02-25 2000-02-25 Variable resistance element and semiconductor device using the same

Publications (1)

Publication Number Publication Date
JP2001237380A true JP2001237380A (en) 2001-08-31

Family

ID=18570853

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2001237380A (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3515556B2 (en) 2001-12-04 2004-04-05 株式会社東芝 Programmable element, programmable circuit and semiconductor device
JP2004158804A (en) * 2002-11-08 2004-06-03 Sharp Corp Nonvolatile variable resistance element, storage device, and scaling method for nonvolatile variable resistance element
JP2006210882A (en) * 2005-01-31 2006-08-10 Samsung Electronics Co Ltd Nonvolatile memory device using resistor and manufacturing method thereof
KR100682913B1 (en) 2005-01-06 2007-02-15 삼성전자주식회사 Hybrid Multibit Nonvolatile Memory Device and Its Operation Method
CN101261880A (en) * 2002-02-19 2008-09-10 微米技术有限公司 Programmable conductor random access memory and method for sensing same
US7750332B2 (en) 2002-04-30 2010-07-06 Japan Science And Technology Agency Solid electrolyte switching device, FPGA using same, memory device, and method for manufacturing solid electrolyte switching device
US7829473B2 (en) 2007-03-26 2010-11-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing memory element
US7956343B2 (en) 2007-02-01 2011-06-07 Samsung Electronics Co., Ltd. Nonvolatile memory devices and method of manufacturing the same
US8067316B2 (en) 2008-06-20 2011-11-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing memory element
US8283724B2 (en) 2007-02-26 2012-10-09 Semiconductor Energy Laboratory Co., Ltd. Memory element and semiconductor device, and method for manufacturing the same
JP2012532451A (en) * 2009-07-01 2012-12-13 インターナショナル・ビジネス・マシーンズ・コーポレーション Circuit structure and method for programming and reprogramming low power multi-state electronic fuses (e fuses)
US8362455B2 (en) 2007-01-12 2013-01-29 Samsung Electronics Co., Ltd. Storage node of a resistive random access memory device with a resistance change layer and method of manufacturing the same
JP2013165282A (en) * 2007-02-28 2013-08-22 Toshiba Corp Method and system in memory device
US8841642B2 (en) 2006-11-17 2014-09-23 Semiconductor Energy Laboratory Co., Ltd. Memory element and method for manufacturing the same, and semiconductor device
US9006741B2 (en) 2007-02-02 2015-04-14 Semiconductor Energy Laboratory Co., Ltd. Memory device in a programmed state having a memory layer comprising conductive nanoparticles coated with an organic film formed between two conductive layers

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3515556B2 (en) 2001-12-04 2004-04-05 株式会社東芝 Programmable element, programmable circuit and semiconductor device
CN101261880B (en) * 2002-02-19 2011-06-15 微米技术有限公司 Programmable conductor random access memory and method for sensing same
CN101261880A (en) * 2002-02-19 2008-09-10 微米技术有限公司 Programmable conductor random access memory and method for sensing same
US7750332B2 (en) 2002-04-30 2010-07-06 Japan Science And Technology Agency Solid electrolyte switching device, FPGA using same, memory device, and method for manufacturing solid electrolyte switching device
JP2004158804A (en) * 2002-11-08 2004-06-03 Sharp Corp Nonvolatile variable resistance element, storage device, and scaling method for nonvolatile variable resistance element
KR100682913B1 (en) 2005-01-06 2007-02-15 삼성전자주식회사 Hybrid Multibit Nonvolatile Memory Device and Its Operation Method
US8168469B2 (en) 2005-01-31 2012-05-01 Samsung Electronics Co., Ltd. Nonvolatile memory device made of resistance material and method of fabricating the same
JP2006210882A (en) * 2005-01-31 2006-08-10 Samsung Electronics Co Ltd Nonvolatile memory device using resistor and manufacturing method thereof
US8841642B2 (en) 2006-11-17 2014-09-23 Semiconductor Energy Laboratory Co., Ltd. Memory element and method for manufacturing the same, and semiconductor device
US8362455B2 (en) 2007-01-12 2013-01-29 Samsung Electronics Co., Ltd. Storage node of a resistive random access memory device with a resistance change layer and method of manufacturing the same
US7956343B2 (en) 2007-02-01 2011-06-07 Samsung Electronics Co., Ltd. Nonvolatile memory devices and method of manufacturing the same
US9006741B2 (en) 2007-02-02 2015-04-14 Semiconductor Energy Laboratory Co., Ltd. Memory device in a programmed state having a memory layer comprising conductive nanoparticles coated with an organic film formed between two conductive layers
US8431997B2 (en) 2007-02-26 2013-04-30 Semiconductor Energy Laboratory Co., Ltd. Memory element and semiconductor device and method for manufacturing the same
US8283724B2 (en) 2007-02-26 2012-10-09 Semiconductor Energy Laboratory Co., Ltd. Memory element and semiconductor device, and method for manufacturing the same
US8753967B2 (en) 2007-02-26 2014-06-17 Semiconductor Energy Laboratory Co., Ltd. Memory element and semiconductor device, and method for manufacturing the same
JP2013165282A (en) * 2007-02-28 2013-08-22 Toshiba Corp Method and system in memory device
US7829473B2 (en) 2007-03-26 2010-11-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing memory element
US8361909B2 (en) 2008-06-20 2013-01-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing memory element
US8067316B2 (en) 2008-06-20 2011-11-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing memory element
JP2012532451A (en) * 2009-07-01 2012-12-13 インターナショナル・ビジネス・マシーンズ・コーポレーション Circuit structure and method for programming and reprogramming low power multi-state electronic fuses (e fuses)

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