JP2001294481A - Dielectric ceramic composition and multilayer ceramic capacitor using the same - Google Patents
Dielectric ceramic composition and multilayer ceramic capacitor using the sameInfo
- Publication number
- JP2001294481A JP2001294481A JP2001033447A JP2001033447A JP2001294481A JP 2001294481 A JP2001294481 A JP 2001294481A JP 2001033447 A JP2001033447 A JP 2001033447A JP 2001033447 A JP2001033447 A JP 2001033447A JP 2001294481 A JP2001294481 A JP 2001294481A
- Authority
- JP
- Japan
- Prior art keywords
- dielectric
- dielectric ceramic
- composition
- multilayer ceramic
- insulation resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Compositions Of Oxide Ceramics (AREA)
- Ceramic Capacitors (AREA)
- Inorganic Insulating Materials (AREA)
Abstract
(57)【要約】
【課題】 本発明は、非酸化性雰囲気中の焼成におい
て、安定した電気特性の得られる誘電体磁器組成物と積
層セラミックコンデンサを提供することを目的とするも
のである。
【解決手段】 一般式としてn(BaOx−SrOy−C
aOz)(ZrmTi1- m)O2(但し、x+y+z=1、
x,y,z,m,nはモル比)で表わされる組成系にお
いて、x,y,zが、(表1)に示すa,b,c,d,
eを直線で囲むモル比の組成範囲で、m≧0.95、
0.8≦n≦1.04となる範囲の組成物を主成分とし
て、この主成分100wt%に対し、添加物としてMn
3O4を0.1〜0.7wt%、BaSiO3を0.5〜
3.0wt%、V2O5を0.01〜0.07wt%、さ
らにAl2O3を0.05〜0.30wt%添加した誘電
体磁器組成物としたものである。
【表1】
(57) [Problem] An object of the present invention is to provide a dielectric ceramic composition and a multilayer ceramic capacitor capable of obtaining stable electric characteristics when fired in a non-oxidizing atmosphere. SOLUTION: As a general formula, n (BaO x -SrO y -C
aO z) (Zr m Ti 1- m) O 2 ( where, x + y + z = 1 ,
x, y, z, m, and n are molar ratios, and x, y, and z are a, b, c, d, and d shown in Table 1.
In a composition range of a molar ratio surrounding e with a straight line, m ≧ 0.95;
As a main component, a composition in the range of 0.8 ≦ n ≦ 1.04 is added.
0.1 to 0.7 wt% of 3 O 4 , 0.5 to 0.5% of BaSiO 3
This is a dielectric ceramic composition containing 3.0 wt%, V 2 O 5 of 0.01 to 0.07 wt%, and Al 2 O 3 of 0.05 to 0.30 wt%. [Table 1]
Description
【0001】[0001]
【発明の属する技術分野】本発明はニッケルなどの卑金
属で内部電極を形成した温度補償用の積層セラミックコ
ンデンサに用いる誘電体磁器組成物とこれを用いた積層
セラミックコンデンサに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric ceramic composition for use in a multilayer ceramic capacitor for temperature compensation having an internal electrode formed of a base metal such as nickel, and a multilayer ceramic capacitor using the same.
【0002】[0002]
【従来の技術】従来の積層セラミックコンデンサは、公
知の積層セラミックコンデンサの製造方法に従って、誘
電体粉末を主成分とするセラミックグリーンシートと内
部電極層を交互に複数層積層した積層体を、所定のチッ
プ形状に切断しグリーンチップを形成した後、所定温度
で焼成を行い、得られた焼結体の端面に露出した内部電
極と電気的に接続するように焼結体の端面部に外部電極
を形成する方法が一般的に行われている。2. Description of the Related Art A conventional multilayer ceramic capacitor is obtained by forming a multilayer body in which a plurality of ceramic green sheets mainly composed of dielectric powder and internal electrode layers are alternately laminated in accordance with a known method for manufacturing a multilayer ceramic capacitor. After cutting into a chip shape to form a green chip, baking is performed at a predetermined temperature, and an external electrode is provided on the end surface of the sintered body so as to be electrically connected to the internal electrode exposed on the end surface of the obtained sintered body. The method of forming is generally performed.
【0003】そして、前記内部電極にニッケル等の卑金
属を用いたグリーンチップを酸化を防ぐため非酸化性雰
囲気中で焼結を行う方法が主流となってきている。[0003] In order to prevent oxidation of a green chip using a base metal such as nickel for the internal electrode, a method of sintering in a non-oxidizing atmosphere has become mainstream.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、静電容
量温度係数の小さい温度補償用の積層セラミックコンデ
ンサに用いる誘電体磁器組成物は、一般的に主成分のM
gTiO3,CaTiO3に希土類酸化物を添加した組成
が多く、この材料は非酸化性雰囲気で焼成すると主成分
中の酸化チタンが還元され易く、半導体化して絶縁抵抗
が低くなると共に所望の誘電体特性が得られないという
課題を有していた。However, a dielectric ceramic composition used for a multilayer ceramic capacitor for temperature compensation having a small temperature coefficient of capacitance is generally composed of M as a main component.
In many cases, rare earth oxides are added to gTiO 3 and CaTiO 3. When this material is fired in a non-oxidizing atmosphere, titanium oxide in the main component is easily reduced. There was a problem that characteristics could not be obtained.
【0005】本発明は非酸化性雰囲気中の焼成条件にお
いて、絶縁抵抗が高く安定した電気特性を得ることがで
きる誘電体磁器組成物とこれを用いた積層セラミックコ
ンデンサを提供することを目的としたものであり、内部
電極にニッケル等の卑金属を用いた温度補償用の積層セ
ラミックコンデンサに好適なものである。SUMMARY OF THE INVENTION It is an object of the present invention to provide a dielectric ceramic composition capable of obtaining stable electrical characteristics with high insulation resistance under firing conditions in a non-oxidizing atmosphere and a multilayer ceramic capacitor using the same. It is suitable for a multilayer ceramic capacitor for temperature compensation using a base metal such as nickel for the internal electrodes.
【0006】[0006]
【課題を解決するための手段】前記目的を達成するため
本発明は、一般式としてn(BaOx−SrOy−CaO
z)(ZrmTi1-m)O2(但し、x+y+z=1、x,
y,z,m,nはモル比)で表わされる組成系におい
て、x,y,zが、(表2)に示すa,b,c,d,e
を直線で囲む範囲で、m≧0.95、0.8≦n≦1.
04となる範囲の組成物を主成分として、この主成分1
00wt%に対し、添加物としてMn3O4を0.1〜
0.7wt%、BaSiO3を0.5〜3.0wt%、
V2O5を0.01〜0.07wt%、さらにAl2O3を
0.05〜0.30wt%添加した誘電体磁器組成物と
したものである。In order to achieve the above object, the present invention provides a compound represented by the general formula: n (BaO x -SrO y -CaO
z) (Zr m Ti 1- m) O 2 ( where, x + y + z = 1 , x,
In the composition system represented by (y, z, m, n is a molar ratio), x, y, z are a, b, c, d, e shown in (Table 2).
Are enclosed by a straight line, m ≧ 0.95, 0.8 ≦ n ≦ 1.
04 as a main component, and the main component 1
Mn 3 O 4 as an additive is 0.1 to
0.7wt%, BaSiO 3 a 0.5~3.0wt%,
V 2 O 5 the 0.01~0.07wt%, in which further a dielectric ceramic composition obtained by adding 0.05~0.30Wt% of Al 2 O 3.
【0007】[0007]
【表2】 [Table 2]
【0008】これにより、非酸化性雰囲気中の焼成にお
いても絶縁抵抗が高く安定した誘電体特性の得られる誘
電体磁器組成物とこれを用いた積層セラミックコンデン
サを得ることができる。As a result, it is possible to obtain a dielectric ceramic composition having high insulation resistance and stable dielectric properties even when fired in a non-oxidizing atmosphere, and a multilayer ceramic capacitor using the same.
【0009】[0009]
【発明の実施の形態】本発明の請求項1に記載の発明
は、一般式としてn(BaOx−SrOy−CaOz)
(ZrmTi1-m)O2(但し、x+y+z=1、x,
y,z,m,nはモル比)で表わされる組成系におい
て、x,y,zが、(表2)に示すa,b,c,d,e
を直線で囲む範囲で、m≧0.95、0.8≦n≦1.
04となる範囲の組成物を主成分として、この主成分1
00wt%に対し、添加物としてMn3O4を0.1〜
0.7wt%、BaSiO3を0.5〜3.0wt%、
V2O5を0.01〜0.07wt%、さらにAl2O3を
0.05〜0.30wt%添加した誘電体磁器組成物と
したものであり、(表2)に示すa,b,c,d,eを
直線で囲む範囲で、BaOとSrOとCaOの3種のモ
ル比を組合せることで、焼結性を向上させて絶縁抵抗が
高く、静電容量温度係数が小さくても誘電率が高い誘電
特性の優れた積層セラミックコンデンサを得ることがで
きる。BEST MODE FOR CARRYING OUT THE INVENTION The invention described in claim 1 of the present invention has a general formula of n (BaO x -SrO y -CaO z )
(Zr m Ti 1-m) O 2 ( where, x + y + z = 1 , x,
In the composition system represented by (y, z, m, n is a molar ratio), x, y, z are a, b, c, d, e shown in (Table 2).
Are enclosed by a straight line, m ≧ 0.95, 0.8 ≦ n ≦ 1.
04 as a main component, and the main component 1
Mn 3 O 4 as an additive is 0.1 to
0.7wt%, BaSiO 3 a 0.5~3.0wt%,
This is a dielectric ceramic composition to which V 2 O 5 is added in an amount of 0.01 to 0.07 wt% and further Al 2 O 3 is added in an amount of 0.05 to 0.30 wt%. , C, d, and e by a combination of three molar ratios of BaO, SrO, and CaO within a range surrounded by a straight line, thereby improving the sinterability, increasing the insulation resistance, and decreasing the capacitance temperature coefficient. Also, a multilayer ceramic capacitor having a high dielectric constant and excellent dielectric properties can be obtained.
【0010】また、ZrO2とTiO2のモル比をmの範
囲に規定することで、静電容量温度係数の小さい誘電体
磁器組成物を得ることができ、さらに、モル比nの範囲
に規定することで、非酸化性雰囲気中での焼結できる範
囲を規定して、更に、焼結助材としてBaSiO3,A
l2O3,Mn3O4を添加し、1300℃以下の焼成温度
で焼結させることができるという作用を有する。従っ
て、内部電極をニッケルで形成する積層セラミックコン
デンサには1350℃以下(好ましくは1300℃以
下)で焼成することにより高温焼成で発生し易い内部電
極の拡散や静電容量の低下等の不良を防止できるという
効果を有する。Further, by defining the molar ratio of ZrO 2 and TiO 2 within the range of m, a dielectric ceramic composition having a small capacitance temperature coefficient can be obtained. In this way, the range in which sintering can be performed in a non-oxidizing atmosphere is defined, and BaSiO 3 , A
Addition of l 2 O 3 and Mn 3 O 4 has the effect of sintering at a firing temperature of 1300 ° C. or less. Therefore, by firing at 1350 ° C. or less (preferably 1300 ° C. or less), a multilayer ceramic capacitor in which the internal electrodes are formed of nickel prevents defects such as internal electrode diffusion and a decrease in capacitance, which are likely to occur at high temperature firing. It has the effect of being able to.
【0011】また、Mn3O4を規定量添加することによ
り耐還元性を向上させる効果があり、非酸化性雰囲気中
で焼成を行っても絶縁抵抗の劣化を防止する効果を有
し、さらに、V2O5を添加することにより耐還元性を更
に向上させる効果を有する。The addition of a prescribed amount of Mn 3 O 4 has the effect of improving the resistance to reduction, and has the effect of preventing the insulation resistance from deteriorating even when firing in a non-oxidizing atmosphere. , V 2 O 5 has the effect of further improving the reduction resistance.
【0012】本発明の請求項2に記載の発明は、添加物
として更にY2O3を0.2〜1.0wt%添加した請求
項1に記載の誘電体磁器組成物であり、積層セラミック
コンデンサの素体内部の絶縁抵抗の劣化を防止して電圧
を印加した高温負荷寿命特性を向上させる効果を有する
ものである。According to a second aspect of the present invention, there is provided the dielectric ceramic composition according to the first aspect, wherein 0.2 to 1.0 wt% of Y 2 O 3 is further added as an additive. This has the effect of preventing the deterioration of the insulation resistance inside the capacitor body and improving the high-temperature load life characteristics when voltage is applied.
【0013】本発明の請求項3に記載の発明は、添加物
として更にNiOを0.02〜0.5wt%、もしくは
MgOを0.1〜0.5wt%添加した請求項1に記載
の誘電体磁器組成物であり、ニッケルの内部電極とセラ
ミックシートの積層体の焼結収縮挙動差を緩和し、クラ
ックの発生や残留応力を防止することができ、耐湿負荷
寿命特性の優れた積層セラミックコンデンサを得ること
ができるという効果を有するものである。According to a third aspect of the present invention, there is provided the dielectric material according to the first aspect, wherein 0.02 to 0.5 wt% of NiO or 0.1 to 0.5 wt% of MgO is further added as an additive. Multilayer ceramic capacitor that is a body porcelain composition that can reduce the difference in sintering shrinkage behavior of the laminate of nickel internal electrodes and ceramic sheets, prevent cracks and residual stress, and have excellent moisture load life characteristics Is obtained.
【0014】本発明の請求項4に記載の発明は、請求項
1から3のいずれか一つに記載のBaSiO3に換え
て、BaO,SrO,CaO,MgO,ZnO,Na2
O,Li 2O,K2O,B2O3から選ばれる少なくとも1
種類以上の元素とSiO2,Al2O3で構成されるガラ
スフリットを0.5〜3.0wt%添加した請求項1に
記載の誘電体磁器組成物であり、焼結性を更に向上させ
ることができ、1250℃以下でかつ非酸化性雰囲気に
おいて強還元側で焼成することが可能となり、積層数が
多く、内部電極をニッケルで形成する積層セラミックコ
ンデンサにおいて半田ディップ実装時に発生しやすい熱
的クラックを防止する効果を有するものである。The invention described in claim 4 of the present invention is the invention
BaSiO according to any one of 1 to 3ThreeChange to
And BaO, SrO, CaO, MgO, ZnO, NaTwo
O, Li TwoO, KTwoO, BTwoOThreeAt least one selected from
More than kinds of elements and SiOTwo, AlTwoOThreeGala consisting of
The method according to claim 1, wherein 0.5 to 3.0 wt% of the frit is added.
The dielectric ceramic composition according to the above, further improving the sinterability
At 1250 ° C or lower and in a non-oxidizing atmosphere
It is possible to fire on the strong reduction side in
In many cases, multilayer ceramic cores with internal electrodes made of nickel
Heat generated during solder dip mounting on capacitors
This has the effect of preventing a target crack.
【0015】本発明の請求項5に記載の発明は、請求項
1から3のいずれか一つに記載の誘電体磁器組成物から
なるセラミック層とニッケル等の卑金属の内部電極を交
互に積層して構成した積層セラミックコンデンサであ
り、請求項1から3のいずれか一つに記載の誘電体磁器
組成物でセラミック層を構成することによって、非酸化
性雰囲気中の焼成においても絶縁抵抗が高く安定した誘
電体特性が得られるため、ニッケル等の卑金属を内部電
極に用いた積層セラミックコンデンサ素子を非酸化性雰
囲気中で焼成して、静電容量温度係数が小さく高温負荷
寿命特性や耐湿負荷寿命特性等の信頼性に優れた温度補
償用の積層セラミックコンデンサを得ることができると
いう効果を有するものである。According to a fifth aspect of the present invention, a ceramic layer comprising the dielectric ceramic composition according to any one of the first to third aspects and an internal electrode of a base metal such as nickel are alternately laminated. A multilayer ceramic capacitor having a ceramic layer formed of the dielectric ceramic composition according to any one of claims 1 to 3, having a high insulation resistance even when fired in a non-oxidizing atmosphere. Because of this, the multilayer ceramic capacitor element using a base metal such as nickel for the internal electrode is fired in a non-oxidizing atmosphere to obtain a low capacitance temperature coefficient and high temperature load life characteristics and humidity load life characteristics. Thus, it is possible to obtain a multilayer ceramic capacitor for temperature compensation having excellent reliability.
【0016】本発明の請求項6に記載の発明は、請求項
4に記載の誘電体磁器組成物からなるセラミック層とニ
ッケル等の卑金属の内部電極を交互に積層した積層セラ
ミックコンデンサであり、特に、セラミックグリーンシ
ートの厚みが10μm以下で積層数が50層以上の高積
層の積層セラミックコンデンサに適しており、熱的クラ
ックが発生しにくいため、実装性能に優れた温度補償用
の積層セラミックコンデンサを得ることができるという
効果を有するものである。According to a sixth aspect of the present invention, there is provided a multilayer ceramic capacitor in which a ceramic layer comprising the dielectric ceramic composition according to the fourth aspect and internal electrodes of a base metal such as nickel are alternately laminated. It is suitable for multi-layer ceramic capacitors with a ceramic green sheet thickness of 10 μm or less and a lamination number of 50 layers or more, and thermal cracks are less likely to occur. It has the effect that it can be obtained.
【0017】(実施の形態1)以下、実施の形態1を用
いて、本発明の特に請求項1と4に記載の発明について
説明する。(Embodiment 1) Hereinafter, the first embodiment of the present invention will be described with reference to the first embodiment.
【0018】図1は本発明の誘電体磁器組成物を示す3
元組成図であり、(表2)で示すa,b,c,d,eを
結ぶ直線で囲まれた組成範囲を示すものである。FIG. 1 shows a dielectric ceramic composition of the present invention.
It is an original composition diagram and shows a composition range surrounded by a straight line connecting a, b, c, d, and e shown in (Table 2).
【0019】先ず、出発原料として高純度のBaO,S
rO,CaO,ZrO2,TiO2,Mn3O4,Al
2O3,BaSiO3,V2O5の粉末を(表3)に示す組
成比になるように秤量し、湿式混合後、脱水乾燥を行
い、得られた混合材料を高純度アルナル質の坩堝に入
れ、空気中1170℃の温度で2時間仮焼を行う。First, as a starting material, high-purity BaO, S
rO, CaO, ZrO 2, TiO 2, Mn 3 O 4, Al
The powders of 2 O 3 , BaSiO 3 , and V 2 O 5 were weighed so as to have the composition ratios shown in (Table 3), wet-mixed, and dehydrated and dried. And calcined in air at a temperature of 1170 ° C. for 2 hours.
【0020】[0020]
【表3】 [Table 3]
【0021】次に、仮焼材料をゴム内張りのボールミル
の中に純水とジルコニアボールと共に入れ、湿式粉砕
後、脱水乾燥を行い温度補償用の誘電体材料を作製し
た。得られた温度補償用の誘電体材料に、有機バインダ
ーを加え造粒後、油圧プレスを用い、成形圧力1ton
/cm2で直径15mm、厚み0.4mmの円板を成形した。Next, the calcined material was put into a rubber-lined ball mill together with pure water and zirconia balls, wet-pulverized, dehydrated and dried to prepare a dielectric material for temperature compensation. An organic binder was added to the obtained dielectric material for temperature compensation, and after granulation, a molding pressure of 1 ton was applied using a hydraulic press.
A disk having a diameter of 15 mm and a thickness of 0.4 mm was formed at a thickness of 0.4 mm / cm 2 .
【0022】次いで、成形した円板をアルミナ質のサヤ
に入れ、空気中にて700℃で2時間脱脂した後、非酸
化雰囲気中にて1300℃で2時間焼成し、焼結体の円
板を得た。Next, the formed disk is placed in an alumina sheath, degreased in air at 700 ° C. for 2 hours, and then baked in a non-oxidizing atmosphere at 1300 ° C. for 2 hours to obtain a sintered disk. I got
【0023】得られた焼結体の両面に銅電極ペーストを
塗布した後、非酸化雰囲気において900℃の温度で焼
付けた後、誘電率、静電容量温度係数、絶縁抵抗の測定
を行い、その結果を(表4)に示した。尚、誘電率の測
定は温度20℃、測定電圧1.0Vrms、測定周波数
1MHzで行い、絶縁抵抗は電極間にDC50Vを1分間
印加した後の抵抗値より、また静電容量温度係数は20
℃と125℃における静電容量を測定し(数1)より求
めた。After applying a copper electrode paste on both surfaces of the obtained sintered body, baking at a temperature of 900 ° C. in a non-oxidizing atmosphere, the dielectric constant, the capacitance temperature coefficient, and the insulation resistance were measured. The results are shown in (Table 4). The measurement of the dielectric constant was performed at a temperature of 20 ° C., a measurement voltage of 1.0 Vrms, and a measurement frequency of 1 MHz. The insulation resistance was obtained from the resistance value after applying DC 50 V between the electrodes for 1 minute.
The capacitances at ° C and 125 ° C were measured and found from (Equation 1).
【0024】[0024]
【数1】 (Equation 1)
【0025】また、本発明で作製した誘電体組成の各粉
末に酢酸ブチル、ポリビニルブチラール、可塑剤からな
るビヒクルを加えて、公知のドクターブレード法により
厚さ28μmのセラミックグリーンシートを作製した。Further, a vehicle comprising butyl acetate, polyvinyl butyral, and a plasticizer was added to each powder of the dielectric composition prepared in the present invention, and a ceramic green sheet having a thickness of 28 μm was prepared by a known doctor blade method.
【0026】そして、得られたそれぞれの組成のセラミ
ックグリーンシートを用い、公知の積層セラミックコン
デンサの製造方法により、ニッケル金属からなる内部電
極とセラミックグリーンシートを交互に20層積層した
グリーン積層体を600kg/cm2の圧力で加圧圧着した
後、所定のチップ形状に切断を行いグリーンチップを得
た。Using the obtained ceramic green sheets of the respective compositions, 600 kg of a green laminate in which 20 internal electrodes made of nickel metal and 20 ceramic green sheets are alternately laminated by a known method of manufacturing a laminated ceramic capacitor. After pressure-compression bonding at a pressure of / cm 2, the resultant was cut into a predetermined chip shape to obtain a green chip.
【0027】さらに、グリーンチップをニッケルの平衡
酸素分圧以下にて400℃の温度で2時間脱脂した後、
非酸化雰囲気中にて、1300℃の焼成温度で2時間焼
成を行い焼結体を形成し、この焼結体の内部電極が露出
した端面に外部電極となる銅ペーストを塗布して非酸化
雰囲気中にて焼付けを行い、その後、電解メッキをして
積層セラミックコンデンサを完成させた。Further, after the green chip is degreased at a temperature of 400 ° C. for 2 hours or less under the equilibrium oxygen partial pressure of nickel,
In a non-oxidizing atmosphere, sintering is performed at a firing temperature of 1300 ° C. for 2 hours to form a sintered body, and a copper paste to be an external electrode is applied to an end surface of the sintered body where an internal electrode is exposed, and the non-oxidizing atmosphere is formed. Baking was performed inside, and thereafter, electrolytic plating was performed to complete a multilayer ceramic capacitor.
【0028】このとき、前記非酸化雰囲気中での焼付け
工程で素子表面が幾分還元され、電解メッキ工程におい
て積層セラミックコンデンサの表面に残留したメッキ液
や水分の吸着により絶縁抵抗が劣化し易いという問題を
有するが、本発明の誘電体磁器組成物により耐還元性を
向上できるために前記絶縁抵抗の劣化を防止できる。At this time, the surface of the element is somewhat reduced in the baking step in the non-oxidizing atmosphere, and the insulation resistance is liable to deteriorate due to adsorption of a plating solution or moisture remaining on the surface of the multilayer ceramic capacitor in the electrolytic plating step. Although having a problem, the dielectric ceramic composition of the present invention can improve the reduction resistance, so that the deterioration of the insulation resistance can be prevented.
【0029】そして、得られた各積層セラミックコンデ
ンサについて静電容量、Q、静電容量温度係数、絶縁抵
抗を測定し、その結果を(表4)に示した。尚、誘電率
の値は、35以上が好ましく、静電容量温度係数は0±
60ppm/℃が好ましい。The capacitance, Q, temperature coefficient of capacitance, and insulation resistance of each of the obtained multilayer ceramic capacitors were measured, and the results are shown in Table 4. The value of the dielectric constant is preferably 35 or more, and the capacitance temperature coefficient is 0 ±
60 ppm / ° C is preferred.
【0030】[0030]
【表4】 [Table 4]
【0031】(表4)の結果からわかるように、本発明
の範囲外の試料の内、No.1〜10は誘電率が32以
下と小さく、試料11,26は静電容量温度係数が0±
60ppm/℃から外れており、試料No.27,3
4,47は焼結せず、試料No.33,38,39,4
2,43,48,51は絶縁抵抗が1010Ω以下となり
実用的ではない。As can be seen from the results in Table 4, among the samples outside the scope of the present invention, Samples 1 to 10 have a small dielectric constant of 32 or less, and Samples 11 and 26 have a temperature coefficient of capacitance of 0 ±
60 ppm / ° C. 27,3
Sample Nos. 4 and 47 were not sintered. 33, 38, 39, 4
2, 43, 48 and 51 are not practical because the insulation resistance is 10 10 Ω or less.
【0032】これに対し、本発明の範囲内の試料No.
12〜25、28〜32、35〜37、40,41、4
4〜46、49,50は誘電率が35以上と高く、かつ
静電容量温度係数が全てNP0±60ppm/℃の範囲
内であり、絶縁抵抗も全て1010Ω以上となり極めて良
好な結果が得られている。On the other hand, the sample Nos.
12-25, 28-32, 35-37, 40, 41, 4
4~46,49,50 the high dielectric constant is 35 or more, and in a range temperature coefficient of capacitance of all NP0 ± 60 ppm / ° C., to obtain very good result is all also insulation resistance 10 10 Omega more Have been.
【0033】即ち、試料No.1から9はBaO,Sr
O,CaOから選ばれる1種もしくは2種で構成する組
成系から成り、本発明の(表2)で示すモル比の範囲外
であり、絶縁抵抗が1010Ω以下、又は誘電率が35以
下、又は静電容量温度係数が大きくなり好ましくない。That is, the sample No. 1 to 9 are BaO, Sr
It consists of a composition system composed of one or two selected from O and CaO, is outside the range of the molar ratio shown in (Table 2) of the present invention, and has an insulation resistance of 10 10 Ω or less or a dielectric constant of 35 or less. Or, the temperature coefficient of capacitance becomes large, which is not preferable.
【0034】これに対し、本発明の範囲内である試料N
o.12〜23の誘電体磁器組成物は、誘電率が35〜
43と大きく、静電容量温度係数も小さく、絶縁抵抗も
全て1010Ω以上となり良好な結果が得られており、モ
ル比x,y,zの範囲は、図1に示した(表2)のa,
b,c,d,eを直線で囲むモル比の範囲が有効であ
る。On the other hand, the sample N within the scope of the present invention
o. The dielectric ceramic compositions of 12 to 23 have a dielectric constant of 35 to
43, the temperature coefficient of capacitance was small, the insulation resistance was all 10 10 Ω or more, and good results were obtained. The range of the molar ratios x, y, and z was shown in FIG. 1 (Table 2). A,
The range of the molar ratio surrounding b, c, d, and e with a straight line is effective.
【0035】更に、試料No.26はモル比mが0.9
0であり、本発明のモル比mの範囲外であり、本発明の
範囲内の試料24,25と比較すると静電容量温度係数
がN250と大きく0±60ppm/℃の範囲を満足し
ないため好ましくない。従って、モル比mの値をm≧
0.95とするのが有効である。Further, the sample No. 26 has a molar ratio m of 0.9
0, which is outside the range of the molar ratio m of the present invention, and is preferable because the temperature coefficient of capacitance is as large as N250 as compared with the samples 24 and 25 within the range of the present invention and does not satisfy the range of 0 ± 60 ppm / ° C. Absent. Therefore, the value of the molar ratio m is defined as m ≧
It is effective to set it to 0.95.
【0036】また、試料No.27はモル比nを1.0
5、試料33はモル比nが0.60であり、それぞれ本
発明のモル比nの範囲外であり、本発明の範囲内の試料
No.28〜32と比較すると、試料27は焼結せず、
試料No.33は絶縁抵抗が109と低くなり好ましく
ない。従って、モル比nは0.80≦n≦1.04の範
囲が有効である。Sample No. 27 has a molar ratio n of 1.0
5, the sample 33 has a molar ratio n of 0.60, which is outside the range of the molar ratio n of the present invention. As compared with 28 to 32, the sample 27 did not sinter,
Sample No. No. 33 is not preferable because the insulation resistance is as low as 10 9 . Therefore, the molar ratio n is effective in the range of 0.80 ≦ n ≦ 1.04.
【0037】また、BaSiO3の添加量がゼロの場合
は、試料No.34のように焼結せず、添加量が3を越
える試料38のようにBaSiO3中のSiO2が還元さ
れやすく絶縁抵抗が1010Ω以下となり好ましくない。
これに対し、本発明の範囲内の試料No.35〜37は
絶縁抵抗が1010Ω以上であり、良好な結果が得られて
いる。従って、BaSiO3の添加範囲は0.5〜3.
0wt%が有効である。When the amount of BaSiO 3 added was zero, the sample No. As shown in sample 38, which does not sinter as in 34, and the amount of addition exceeds 3 , SiO 2 in BaSiO 3 is easily reduced, and the insulation resistance is not more than 10 10 Ω.
On the other hand, the sample Nos. In Nos. 35 to 37, the insulation resistance was 10 10 Ω or more, and good results were obtained. Therefore, the addition range of BaSiO 3 0.5-3.
0 wt% is effective.
【0038】また、Mn3O4の添加量がゼロの場合は、
試料No.39のように耐還元性がなく、添加量が0.
7を越えると試料42のように耐還元性の効果が低下し
絶縁抵抗が1010Ω以下となり好ましくない。これに対
し、本発明の範囲内の試料No.40,41は絶縁抵抗
が1010Ω以上であり、良好な結果が得られている。従
って、Mn3O4の添加範囲は0.1〜0.7wt%が有
効である。When the addition amount of Mn 3 O 4 is zero,
Sample No. As in No. 39, there is no reduction resistance, and the amount of addition is 0.3.
If it exceeds 7, the effect of reduction resistance is reduced as in Sample 42, and the insulation resistance is undesirably reduced to 10 10 Ω or less. On the other hand, the sample Nos. 40 and 41 have an insulation resistance of 10 10 Ω or more, and good results are obtained. Therefore, the effective range of addition of Mn 3 O 4 is 0.1 to 0.7 wt%.
【0039】また、V2O5の添加量がゼロの場合は、試
料No.43のように耐還元性がなく絶縁抵抗が1010
Ω以下となり、試料47のように添加量が0.07を越
えると焼結しなくなるため好ましくない。これに対し、
本発明の範囲内の試料No.44〜46は絶縁抵抗が1
010Ω以上であり、良好な結果が得られている。従っ
て、V2O5の添加範囲は0.01〜0.07wt%が有
効である。特に、V2O5の添加量を0.04〜0.07
wt%とすると絶縁抵抗が1012Ω以上でありより一層
好ましい。When the addition amount of V 2 O 5 was zero, the sample No. No reduction resistance and insulation resistance of 10 10 like 43
When the added amount exceeds 0.07 as in the case of sample 47, sintering is stopped, which is not preferable. In contrast,
Sample No. within the scope of the present invention. 44 to 46 have an insulation resistance of 1
0 10 Ω or more, and good results were obtained. Therefore, the effective range of V 2 O 5 is 0.01 to 0.07 wt%. Particularly, the added amount of V 2 O 5 is set to 0.04 to 0.07.
If it is set to wt%, the insulation resistance is more preferably 10 12 Ω or more, and it is more preferable.
【0040】Al2O3の添加量がゼロの場合は、試料N
o.48のように焼結性が悪く、添加量が0.3を越え
ると試料No.51のように焼結性が悪化して絶縁抵抗
が1010Ω以下となり好ましくない。これに対し、本発
明の範囲内の試料No.49,50は絶縁抵抗が1010
Ω以上となり良好な結果が得られている。従って、Al
2O3の添加範囲は0.05〜0.3wt%が有効であ
る。When the addition amount of Al 2 O 3 is zero, the sample N
o. As shown in Sample No. 48, the sinterability was poor. As shown by 51, the sinterability deteriorates and the insulation resistance becomes 10 10 Ω or less, which is not preferable. On the other hand, the sample Nos. 49 and 50 have insulation resistance of 10 10
Ω or more, and good results have been obtained. Therefore, Al
The effective range of addition of 2 O 3 is 0.05-0.3 wt%.
【0041】(実施の形態2)以下、実施の形態2を用
いて、本発明の特に請求項2と4に記載の発明について
説明する。(Embodiment 2) Hereinafter, a second embodiment of the present invention will be described with reference to Embodiment 2.
【0042】出発原料として実施の形態1で使用した粉
末及びY2O3を(表5)の示す組成比になるように秤量
した後、以降の工程を実施の形態1と同条件で処理し
て、誘電体磁器円板を作製した。次に作製した円板試料
について実施の形態1と同様に評価し、その結果を(表
6)に示した。After weighing the powder used in the first embodiment and Y 2 O 3 as the starting materials so as to have the composition ratio shown in (Table 5), the subsequent steps were processed under the same conditions as in the first embodiment. Thus, a dielectric porcelain disk was produced. Next, the prepared disk samples were evaluated in the same manner as in Embodiment 1, and the results are shown in (Table 6).
【0043】[0043]
【表5】 [Table 5]
【0044】[0044]
【表6】 [Table 6]
【0045】また、各誘電体粉末について実施の形態1
と同条件で厚さ11μmのセラミックグリーンシートを
成形して、得られたセラミックグリーンシートを用い、
実施の形態1と同様の方法でニッケル内部電極とセラミ
ックグリーンシートを交互に45層積層した積層セラミ
ックコンデンサを完成させた。Embodiment 1 for each dielectric powder
Under the same conditions as above, a ceramic green sheet having a thickness of 11 μm was formed, and the obtained ceramic green sheet was used.
In the same manner as in the first embodiment, a multilayer ceramic capacitor in which nickel internal electrodes and ceramic green sheets were alternately stacked in 45 layers was completed.
【0046】得られた各積層セラミックコンデンサにつ
いて静電容量、Q、静電容量温度係数、絶縁抵抗を同様
の方法で測定し、その結果を(表6)に示した。また高
温負荷での加速寿命試験として150℃の恒温槽中で3
00Vの直流電圧を積層セラミックコンデンサの外部電
極間に500時間連続印加を行い、その結果もあわせて
(表6)に示した。The capacitance, Q, capacitance temperature coefficient, and insulation resistance of each of the obtained multilayer ceramic capacitors were measured by the same method, and the results are shown in Table 6. In addition, as an accelerated life test under a high temperature load, 3
A DC voltage of 00 V was continuously applied between the external electrodes of the multilayer ceramic capacitor for 500 hours, and the results are also shown in Table 6.
【0047】(表6)の結果からわかるように、本発明
の範囲外の試料52は、Y2O3の添加量が少ないため
に、高温負荷での加速寿命試験に対する効果が得られ
ず、試料No.56は添加量が多くなるために焼結しな
い。これに対し、本発明の範囲内の試料53〜55は、
薄層高積層の製品においても高温負荷での加速寿命試験
による絶縁抵抗劣化が無く、良好な結果が得られている
ことが分かる。従って、Y 2O3の添加量範囲は、0.2
〜1.0wt%とする必要がある。本発明の範囲内でY
2O3を添加することにより、非酸化性雰囲気での焼成に
より発生しやすい酸素空孔が抑制され、高温負荷での絶
縁性の劣化が防止できる。尚、絶縁性の劣化は、試験後
の絶縁抵抗が109Ω以下に低下したものを不良として
カウントした。As can be seen from the results in Table 6, the present invention
Sample 52 outside the rangeTwoOThreeBecause the amount of
The effect on accelerated life test under high temperature load
Sample No. 56 does not sinter due to the large amount of addition
No. On the other hand, samples 53 to 55 within the scope of the present invention are:
Accelerated life test under high temperature load even for products with thin layers and high lamination
Good results are obtained without insulation resistance deterioration due to
You can see that. Therefore, Y TwoOThreeRange of 0.2
1.01.0 wt%. Y within the scope of the present invention
TwoOThreeFor firing in a non-oxidizing atmosphere
Oxygen vacancies that are more likely to be generated are suppressed,
Deterioration of the edge can be prevented. In addition, the deterioration of the insulation property
Insulation resistance of 109If the resistance drops below Ω,
Counted.
【0048】(実施の形態3)以下、実施の形態3を用
いて、本発明の特に請求項3と4に記載の発明について
説明する。(Embodiment 3) Hereinafter, a third embodiment of the present invention will be described with reference to Embodiment 3.
【0049】出発原料として実施の形態1で使用した粉
末及びNiO,MgOを(表7)の示す組成比になるよ
うに秤量した後、以降の工程を実施の形態1と同条件で
処理して、誘電体磁器円板を作製した。次に作製した円
板試料について実施の形態1と同様に評価し、その結果
を(表8)に示した。After weighing the powders used in Embodiment 1 and NiO and MgO as the starting materials so as to have the composition ratios shown in Table 7, the subsequent steps were processed under the same conditions as in Embodiment 1. Then, a dielectric porcelain disk was produced. Next, the fabricated disk samples were evaluated in the same manner as in Embodiment 1, and the results are shown in (Table 8).
【0050】[0050]
【表7】 [Table 7]
【0051】[0051]
【表8】 [Table 8]
【0052】また、各誘電体粉末について実施の形態1
と同条件で厚さ11μmのセラミックグリーンシートを
成形して、得られたセラミックグリーンシートを用い、
実施の形態1と同様の方法でニッケル内部電極とセラミ
ックグリーンシートを交互に45層積層した積層セラミ
ックコンデンサを完成させた。Embodiment 1 for each dielectric powder
Under the same conditions as above, a ceramic green sheet having a thickness of 11 μm was formed, and the obtained ceramic green sheet was used.
In the same manner as in the first embodiment, a multilayer ceramic capacitor in which nickel internal electrodes and ceramic green sheets were alternately stacked in 45 layers was completed.
【0053】得られた各積層セラミックコンデンサにつ
いて静電容量、Q、静電容量温度係数、絶縁抵抗を測定
し、その結果を(表8)に示した。また焼結後、n=1
00の内部クラック検査を実施し、さらに耐湿負荷での
加速寿命試験として121℃、100%RHの恒温恒湿
槽中において2気圧で24時間加圧する飽和型プレッシ
ャークッカー試験(PCT)を実施した後、85℃85
%RHの恒温恒湿槽中において50Vの直流電圧を積層
セラミックコンデンサの外部電極間に125時間連続印
加を行う複合耐湿加速試験を実施し、その結果もあわせ
て(表8)に示した。The capacitance, Q, capacitance temperature coefficient, and insulation resistance of each of the obtained multilayer ceramic capacitors were measured, and the results are shown in Table 8. After sintering, n = 1
After performing an internal crack inspection of 00 and further performing a saturated pressure cooker test (PCT) in which pressure is applied at 2 atm for 24 hours in a constant temperature and humidity chamber of 121 ° C. and 100% RH as an accelerated life test under a moisture resistance load. 85 ° C 85
A combined humidity resistance acceleration test was conducted in which a DC voltage of 50 V was continuously applied between the external electrodes of the multilayer ceramic capacitor for 125 hours in a constant temperature and humidity chamber of% RH, and the results are also shown in Table 8.
【0054】(表8)の結果からわかるように、本発明
の範囲外の試料No.57と62は、NiOとMgOの
添加量が少ないために、内部電極のニッケルとセラミッ
クの焼結収縮挙動差が大きく、焼成後焼結体の内部にク
ラックが発生しており、複合耐湿加速試験後もクラック
の発生個数が増加し、絶縁劣化が起きている。尚、絶縁
性の劣化は、試験後の絶縁抵抗が5×108Ω以下に低
下したものを不良としてカウントした。As can be seen from the results in Table 8, the sample Nos. In Nos. 57 and 62, since the addition amounts of NiO and MgO were small, the difference in sintering shrinkage behavior between nickel and ceramic of the internal electrode was large, and cracks occurred inside the sintered body after firing. Thereafter, the number of cracks increased and insulation deterioration occurred. The deterioration of the insulation was counted as a failure when the insulation resistance after the test was reduced to 5 × 10 8 Ω or less.
【0055】また、試料No.61は、NiOの添加量
が多くなるため、素体の耐還元性が悪化し、積層セラミ
ックコンデンサとした後の絶縁抵抗が1010Ω以下に劣
化するため適切ではない。試料66については、MgO
の添加量が多すぎるため、MgOと内部電極のニッケル
との間で反応が進み、MgNiO2の化合物ができやす
く、これにより内部電極のニッケルが消失するため、静
電容量バラツキが発生する。The sample No. No. 61 is not appropriate because the addition amount of NiO increases, so that the reduction resistance of the element body deteriorates, and the insulation resistance after forming a multilayer ceramic capacitor deteriorates to 10 10 Ω or less. For sample 66, MgO
Is excessive, the reaction proceeds between MgO and nickel of the internal electrode, and a compound of MgNiO 2 is likely to be formed. As a result, the nickel of the internal electrode disappears, causing a variation in capacitance.
【0056】これに対し、本発明の範囲内の試料No.
58〜60、63〜65は、内部電極のニッケルとセラ
ミックの焼結収縮挙動差が添加物のNiOやMgOによ
り緩和され、焼結後のクラックが無く、また、静電容量
のバラツキも無く、絶縁抵抗も1010Ω以上で、複合耐
湿加速試験後も絶縁抵抗劣化が発生せず極めて良好な結
果が得られていることが分かる。従って、NiOの添加
量範囲は、0.02〜0.5wt%、MgOの添加量範
囲は、0.2〜0.5wt%が有効である。On the other hand, the sample Nos.
58 to 60 and 63 to 65, the difference in sintering shrinkage behavior between nickel of the internal electrode and the ceramic is mitigated by the additive NiO or MgO, there is no crack after sintering, and there is no variation in capacitance, The insulation resistance was 10 10 Ω or more, and it can be seen that the insulation resistance did not deteriorate even after the composite moisture resistance acceleration test, and extremely good results were obtained. Therefore, the effective range of the amount of NiO added is 0.02 to 0.5 wt%, and the effective range of the MgO is 0.2 to 0.5 wt%.
【0057】(実施の形態4)以下、実施の形態4を用
いて、本発明の特に請求項5と6に記載の発明について
説明する。(Embodiment 4) Hereinafter, a fourth embodiment of the present invention will be described with reference to Embodiment 4.
【0058】出発原料として実施の形態1で使用した粉
末及び(表9)に示す各種のガラスフリットを(表1
0)の示す組成比になるように秤量した後、以降の工程
を実施の形態1と同条件で処理して、誘電体磁器円板を
作製した。但し焼成温度は1250℃とし、強還元の非
酸化性雰囲気で焼成した。次に作製した円板試料につい
て実施の形態1と同様に評価し、その結果を(表11)
に示した。The powders used in Embodiment 1 as starting materials and the various glass frits shown in Table 9 were used (Table 1).
After weighing so as to have the composition ratio shown in 0), the subsequent steps were processed under the same conditions as in Embodiment 1 to produce a dielectric ceramic disk. However, the firing temperature was 1250 ° C., and firing was performed in a strongly reduced non-oxidizing atmosphere. Next, the prepared disk samples were evaluated in the same manner as in Embodiment 1, and the results were obtained (Table 11).
It was shown to.
【0059】[0059]
【表9】 [Table 9]
【0060】[0060]
【表10】 [Table 10]
【0061】[0061]
【表11】 [Table 11]
【0062】また、各誘電体粉末について実施の形態1
と同条件で厚さ7μmのセラミックグリーンシートを成
形して、得られたセラミックグリーンシートを用い、実
施の形態1と同様の方法でニッケル内部電極とセラミッ
クグリーンシートを交互に100層積層した積層セラミ
ックコンデンサを完成させた。Embodiment 1 for each dielectric powder
A ceramic green sheet having a thickness of 7 μm was formed under the same conditions as described above, and the obtained ceramic green sheet was used, and in the same manner as in the first embodiment, nickel internal electrodes and ceramic green sheets were alternately laminated in 100 layers. The capacitor was completed.
【0063】得られた各積層セラミックコンデンサにつ
いて静電容量、Q、静電容量温度係数、絶縁抵抗を測定
し、その結果を(表11)に示した。また実装試験とし
て、n=100の半田ディップによる熱的クラック検査
を実施しその結果もあわせて(表11)に示した。半田
ディップ時の半田温度は330℃とし、浸漬時間は5秒
とした。The capacitance, Q, temperature coefficient of capacitance, and insulation resistance of each of the obtained multilayer ceramic capacitors were measured, and the results are shown in Table 11. In addition, as a mounting test, a thermal crack inspection using a solder dip of n = 100 was performed, and the results are also shown in Table 11. The solder temperature during the solder dip was 330 ° C., and the immersion time was 5 seconds.
【0064】(表11)の結果からわかるように、本発
明の範囲外の試料No.67は、ガラスフリットの添加
量が少ないため焼結が不足し、誘電体磁器内部に空孔が
多いことから強度不足による熱的クラックが発生してお
り、絶縁抵抗も低い。また試料No.79は、ガラスフ
リットの添加量が多すぎるため、誘電体磁器の耐還元性
が損なわれ、誘電体磁器強度の劣化による熱的クラック
が発生しており、絶縁抵抗も低い。As can be seen from the results shown in Table 11, the sample Nos. No. 67 has insufficient sintering due to the small amount of glass frit added, and has thermal cracks due to insufficient strength due to a large number of holes inside the dielectric ceramic, and has low insulation resistance. Sample No. In No. 79, the addition amount of the glass frit is too large, so that the reduction resistance of the dielectric porcelain is impaired, a thermal crack is generated due to the deterioration of the dielectric porcelain strength, and the insulation resistance is low.
【0065】これに対し、本発明の範囲内の試料No.
68〜78は、強還元雰囲気での低温焼成により、素体
内の残留応力が発生しにくく、熱的クラックの発生を防
止でき、絶縁抵抗が高く、静電容量の大きい積層セラミ
ックコンデンサを得ることが可能である。On the other hand, the sample Nos.
Nos. 68 to 78 show that low-temperature sintering in a strong reducing atmosphere hardly generates residual stress in the element body, can prevent the occurrence of thermal cracks, and can provide a multilayer ceramic capacitor having high insulation resistance and large capacitance. It is possible.
【0066】以上本発明の誘電体磁器組成物は、非酸化
性雰囲気中で焼成を行っても、誘電率35以上、静電容
量温度係数がNP0±60ppm/℃と静電容量温度変
化率の小さい優れた誘電体磁器の電気特性が得られる。As described above, the dielectric ceramic composition of the present invention has a dielectric constant of 35 or more, a capacitance temperature coefficient of NP0 ± 60 ppm / ° C., and a capacitance temperature change rate of NP0 ± 60 ppm / ° C. even when fired in a non-oxidizing atmosphere. Small and excellent electrical properties of dielectric porcelain can be obtained.
【0067】特に、本発明の誘電体磁器組成粉末を用い
て内部電極にニッケル等の卑金属を用いた積層セラミッ
クコンデンサを作製した場合、素体表面の還元による絶
縁抵抗劣化が無く、絶縁抵抗が1010Ω以上得られ、し
かもセラミック層を薄層、高積層化した場合でも、15
0℃300Vでの高温加速寿命試験500時間の連続電
圧印加や、耐湿負荷での加速寿命試験として121℃、
100%RHの恒温恒湿槽中で2気圧で24時間加圧す
る飽和型プレッシャークッカー試験(PCT)を実施し
た後、85℃85%RHの恒温恒湿槽中で50Vで12
5時間連続電圧印加する複合耐湿加速試験を実施しても
絶縁抵抗の劣化が無く、半田ディップによる実装性能に
おいても熱的クラックの発生しない、極めて信頼性の優
れた積層セラミックコンデンサを得ることができる。In particular, when a multilayer ceramic capacitor using a base metal such as nickel for the internal electrode is manufactured using the dielectric ceramic composition powder of the present invention, the insulation resistance is not degraded due to the reduction of the element surface, and the insulation resistance is 10%. 10 Ω or more, and even when ceramic layers are thin and highly laminated,
High temperature accelerated life test at 0 ° C. 300 V Continuous voltage application for 500 hours, and accelerated life test under a moisture resistant load at 121 ° C.
After performing a saturated pressure cooker test (PCT) in which pressure is applied at 2 atm for 24 hours in a constant temperature and humidity chamber of 100% RH, the temperature is adjusted to 12 at 50 V in a constant temperature and humidity chamber of 85 ° C. and 85% RH.
It is possible to obtain an extremely reliable multilayer ceramic capacitor which has no deterioration in insulation resistance even when a composite moisture resistance acceleration test in which a voltage is continuously applied for 5 hours is performed and does not generate thermal cracks even in mounting performance by solder dip. .
【0068】尚、本発明の実施の形態1から4におい
て、誘電体材料の作製にはBaO,SrO,CaO,Z
rO2,TiO2,Al2O3,BaSiO3,Mn3O4,
V2O5,MgO,Y2O3,NiOの粉末、またBaO,
SrO,CaO,MgO,ZnO,Na2O,Li2O,
K2O,B2O3から選ばれる少なくとも1種類以上の元
素とSiO2,Al2O3で構成されるガラスフリットの
粉末を使用したが、Ba−Sr−Ca−Ti−Zr−O
の化合物、あるいはBa,Sr,Ca,Ti,Zrの炭
酸塩、水酸化物等を本発明の組成となるように用いて
も、また、Al2O3,BaSiO3や各種のガラスフリ
ット一部、Mn3O4,V2O5,MgO,Y2O 3,NiO
は、主成分をあらかじめ仮焼した後に、添加物として添
加しても同程度の特性を得ることができる。In Embodiments 1 to 4 of the present invention,
Therefore, BaO, SrO, CaO, Z
rOTwo, TiOTwo, AlTwoOThree, BaSiOThree, MnThreeOFour,
VTwoOFive, MgO, YTwoOThree, NiO powder and BaO,
SrO, CaO, MgO, ZnO, NaTwoO, LiTwoO,
KTwoO, BTwoOThreeAt least one element selected from
Element and SiOTwo, AlTwoOThreeComposed of glass frit
Although powder was used, Ba-Sr-Ca-Ti-Zr-O
Or Ba, Sr, Ca, Ti, Zr charcoal
Acid salts, hydroxides, etc., to form the composition of the present invention.
Also AlTwoOThree, BaSiOThreeAnd various glass free
Part, MnThreeOFour, VTwoOFive, MgO, YTwoO Three, NiO
Is added as an additive after the main component is calcined in advance.
Even if added, similar characteristics can be obtained.
【0069】[0069]
【発明の効果】以上のように本発明は、絶縁抵抗が高く
安定した電気特性を有する誘電体磁器組成物とこれを用
いた積層セラミックコンデンサを得ることができる。特
に、内部電極にニッケル等の卑金属を用いて非酸化性雰
囲気中の焼成を行う温度補償用の積層セラミックコンデ
ンサにおいて有効である。As described above, according to the present invention, it is possible to obtain a dielectric ceramic composition having a high insulation resistance and stable electric characteristics, and a multilayer ceramic capacitor using the same. In particular, the present invention is effective for a multilayer ceramic capacitor for temperature compensation in which firing is performed in a non-oxidizing atmosphere using a base metal such as nickel for the internal electrodes.
【図1】本発明の誘電体磁器組成物の組成範囲を示した
3元組成図FIG. 1 is a ternary composition diagram showing the composition range of a dielectric ceramic composition of the present invention.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01B 3/12 338 H01G 4/12 358 H01G 4/12 358 361 361 C04B 35/00 J ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H01B 3/12 338 H01G 4/12 358 H01G 4/12 358 361 361 C04B 35/00 E
Claims (6)
aOz)(ZrmTi1- m)O2(但し、x+y+z=1、
x,y,z,m,nはモル比を示す)で表わされる組成
系において、x,y,zが、(表1)に示すa,b,
c,d,eを直線で囲む範囲で、m≧0.95、0.8
≦n≦1.04となる範囲の組成物を主成分として、こ
の主成分100wt%に対し、添加物としてMn3O4を
0.1〜0.7wt%、BaSiO3を0.5〜3.0
wt%、V2O5を0.01〜0.07wt%、さらにA
l2O3を0.05〜0.30wt%添加した誘電体磁器
組成物。 【表1】 [Claim 1] n (BaO x -SrO y -C
aO z) (Zr m Ti 1- m) O 2 ( where, x + y + z = 1 ,
x, y, z, m, and n represent molar ratios), and x, y, and z are a, b, and
m ≧ 0.95, 0.8 within a range surrounding c, d, and e by a straight line
≦ n ≦ 1.04 as a main component, and 0.1 to 0.7 wt% of Mn 3 O 4 and 0.5 to 3 of BaSiO 3 as additives with respect to 100 wt% of the main component. .0
wt%, V 2 O 5 the 0.01~0.07wt%, further A
The dielectric ceramic composition obtained by adding 0.05~0.30Wt% of l 2 O 3. [Table 1]
0wt%添加した請求項1に記載の誘電体磁器組成物。The method according to claim 1, further Y 2 O 3 as an additive 0.2.
The dielectric ceramic composition according to claim 1, wherein 0 wt% is added.
0.5wt%、もしくはMgOを0.1〜0.5wt%
添加した請求項1に記載の誘電体磁器組成物。3. NiO is added as an additive in an amount of 0.02-
0.5wt% or 0.1-0.5wt% MgO
The dielectric ceramic composition according to claim 1, which is added.
BaSiO3に換えて、BaO,SrO,CaO,Mg
O,ZnO,Na2O,Li2O,K2O,B2O 3から選
ばれる少なくとも1種類以上の元素とSiO2,Al2O
3で構成されるガラスフリットを0.5〜3.0wt%
添加した請求項1に記載の誘電体磁器組成物。4. The method according to claim 1, wherein
BaSiOThreeInstead of BaO, SrO, CaO, Mg
O, ZnO, NaTwoO, LiTwoO, KTwoO, BTwoO ThreeChoose from
At least one kind of element and SiOTwo, AlTwoO
Three0.5 to 3.0 wt% of glass frit composed of
The dielectric ceramic composition according to claim 1, which is added.
誘電体磁器組成物からなるセラミック層とニッケル等の
卑金属の内部電極を交互に積層した積層セラミックコン
デンサ。5. A multilayer ceramic capacitor in which ceramic layers made of the dielectric ceramic composition according to claim 1 and internal electrodes of a base metal such as nickel are alternately stacked.
なるセラミック層とニッケル等の卑金属の内部電極を交
互に積層した積層セラミックコンデンサ。6. A multilayer ceramic capacitor in which ceramic layers made of the dielectric ceramic composition according to claim 4 and internal electrodes of a base metal such as nickel are alternately laminated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001033447A JP3642282B2 (en) | 2000-02-09 | 2001-02-09 | Dielectric ceramic composition and multilayer ceramic capacitor using the same |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000031411 | 2000-02-09 | ||
| JP2000-31411 | 2000-02-09 | ||
| JP2001033447A JP3642282B2 (en) | 2000-02-09 | 2001-02-09 | Dielectric ceramic composition and multilayer ceramic capacitor using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001294481A true JP2001294481A (en) | 2001-10-23 |
| JP3642282B2 JP3642282B2 (en) | 2005-04-27 |
Family
ID=26585081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001033447A Expired - Fee Related JP3642282B2 (en) | 2000-02-09 | 2001-02-09 | Dielectric ceramic composition and multilayer ceramic capacitor using the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3642282B2 (en) |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002338343A (en) * | 2001-05-17 | 2002-11-27 | Tdk Corp | Method for producing dielectric ceramic composition and method for producing electronic parts |
| WO2004071992A1 (en) * | 2003-02-17 | 2004-08-26 | Tdk Corporation | Dielectric porcelain composition and electronic part |
| JP2006108189A (en) * | 2004-09-30 | 2006-04-20 | Nippon Chemicon Corp | Laminated ceramic capacitor manufacturing method |
| JP2006327840A (en) * | 2005-05-23 | 2006-12-07 | Tdk Corp | Ceramic electronic component and manufacturing method thereof |
| JP2007055835A (en) * | 2005-08-23 | 2007-03-08 | Tdk Corp | Dielectric porcelain composition and electronic component |
| JP2007119274A (en) * | 2005-10-26 | 2007-05-17 | Kyocera Corp | Dielectric porcelain |
| US7968486B2 (en) | 2007-01-29 | 2011-06-28 | Kyocera Corporation | Dielectric ceramics and capacitor |
| JP2011195347A (en) * | 2010-03-17 | 2011-10-06 | Murata Mfg Co Ltd | Dielectric ceramic composition and laminated capacitor for temperature compensation |
| US8097552B2 (en) | 2007-03-16 | 2012-01-17 | Kyocera Corporation | Dielectric ceramics and capacitor |
| US8107219B2 (en) | 2006-11-29 | 2012-01-31 | Kyocera Corporation | Dielectric ceramic and capacitor |
| US8116065B2 (en) | 2008-07-18 | 2012-02-14 | Murata Manufacturing Co., Ltd. | Dielectric ceramic material and monolithic ceramic capacitor |
| US8184428B2 (en) | 2007-06-26 | 2012-05-22 | Kyocera Corporation | Dielectric ceramic and capacitor |
| US8305732B2 (en) | 2008-06-04 | 2012-11-06 | Kyocera Corporation | Dielectric ceramic and capacitor |
| KR20150036335A (en) | 2012-08-09 | 2015-04-07 | 가부시키가이샤 무라타 세이사쿠쇼 | Multilayer ceramic capacitor and method for manufacturing same |
| JP2017028254A (en) * | 2015-07-17 | 2017-02-02 | 株式会社村田製作所 | Multilayer ceramic capacitor |
| KR20180011162A (en) * | 2015-07-23 | 2018-01-31 | 페로 코포레이션 | The seedless dielectric composition used for the nickel electrode |
| CN111029142A (en) * | 2018-10-10 | 2020-04-17 | 三星电机株式会社 | Multilayer ceramic electronic component and dielectric ceramic composition |
-
2001
- 2001-02-09 JP JP2001033447A patent/JP3642282B2/en not_active Expired - Fee Related
Cited By (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002338343A (en) * | 2001-05-17 | 2002-11-27 | Tdk Corp | Method for producing dielectric ceramic composition and method for producing electronic parts |
| WO2004071992A1 (en) * | 2003-02-17 | 2004-08-26 | Tdk Corporation | Dielectric porcelain composition and electronic part |
| US7265072B2 (en) | 2003-02-17 | 2007-09-04 | Tdk Corporation | Dielectric ceramic composition and electronic device |
| CN100371295C (en) * | 2003-02-17 | 2008-02-27 | Tdk株式会社 | Dielectric ceramic composition and electronic device |
| JP2006108189A (en) * | 2004-09-30 | 2006-04-20 | Nippon Chemicon Corp | Laminated ceramic capacitor manufacturing method |
| JP2006327840A (en) * | 2005-05-23 | 2006-12-07 | Tdk Corp | Ceramic electronic component and manufacturing method thereof |
| JP2007055835A (en) * | 2005-08-23 | 2007-03-08 | Tdk Corp | Dielectric porcelain composition and electronic component |
| JP2007119274A (en) * | 2005-10-26 | 2007-05-17 | Kyocera Corp | Dielectric porcelain |
| US8107219B2 (en) | 2006-11-29 | 2012-01-31 | Kyocera Corporation | Dielectric ceramic and capacitor |
| US7968486B2 (en) | 2007-01-29 | 2011-06-28 | Kyocera Corporation | Dielectric ceramics and capacitor |
| US8097552B2 (en) | 2007-03-16 | 2012-01-17 | Kyocera Corporation | Dielectric ceramics and capacitor |
| US8184428B2 (en) | 2007-06-26 | 2012-05-22 | Kyocera Corporation | Dielectric ceramic and capacitor |
| US8305732B2 (en) | 2008-06-04 | 2012-11-06 | Kyocera Corporation | Dielectric ceramic and capacitor |
| US8116065B2 (en) | 2008-07-18 | 2012-02-14 | Murata Manufacturing Co., Ltd. | Dielectric ceramic material and monolithic ceramic capacitor |
| JP2011195347A (en) * | 2010-03-17 | 2011-10-06 | Murata Mfg Co Ltd | Dielectric ceramic composition and laminated capacitor for temperature compensation |
| US8472161B2 (en) | 2010-03-17 | 2013-06-25 | Murata Manufacturing Co., Ltd. | Dielectric ceramic composition and temperature compensation laminated capacitor |
| KR20150036335A (en) | 2012-08-09 | 2015-04-07 | 가부시키가이샤 무라타 세이사쿠쇼 | Multilayer ceramic capacitor and method for manufacturing same |
| US9312069B2 (en) | 2012-08-09 | 2016-04-12 | Murata Manufacturing Co., Ltd. | Laminated ceramic capacitor and manufacturing method therefor |
| JP2017028254A (en) * | 2015-07-17 | 2017-02-02 | 株式会社村田製作所 | Multilayer ceramic capacitor |
| KR20180011162A (en) * | 2015-07-23 | 2018-01-31 | 페로 코포레이션 | The seedless dielectric composition used for the nickel electrode |
| CN107848893A (en) * | 2015-07-23 | 2018-03-27 | 费罗公司 | With the COG dielectric combinations that nickel electrode is used together |
| JP2018529608A (en) * | 2015-07-23 | 2018-10-11 | フエロ コーポレーション | COG dielectric composition for nickel electrodes |
| EP3268329A4 (en) * | 2015-07-23 | 2019-01-09 | Ferro Corporation | Cog dielectric composition for use with nickel electrodes |
| KR102024028B1 (en) | 2015-07-23 | 2019-09-23 | 페로 코포레이션 | OJ dielectric composition used for nickel electrode |
| CN111029142A (en) * | 2018-10-10 | 2020-04-17 | 三星电机株式会社 | Multilayer ceramic electronic component and dielectric ceramic composition |
| CN111029142B (en) * | 2018-10-10 | 2023-02-03 | 三星电机株式会社 | Multilayer ceramic electronic component and dielectric ceramic composition |
| US11784001B2 (en) | 2018-10-10 | 2023-10-10 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic electronic component |
| US12334264B2 (en) | 2018-10-10 | 2025-06-17 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic electronic component |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3642282B2 (en) | 2005-04-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3918372B2 (en) | Dielectric ceramic composition and multilayer ceramic capacitor | |
| JP2998639B2 (en) | Multilayer ceramic capacitors | |
| KR100272424B1 (en) | Monolithic ceramic capacitor and producing method thereof | |
| JP5315856B2 (en) | Multilayer ceramic electronic components | |
| JP3039397B2 (en) | Dielectric ceramic composition and multilayer ceramic capacitor using the same | |
| JP3282520B2 (en) | Multilayer ceramic capacitors | |
| JP3024537B2 (en) | Multilayer ceramic capacitors | |
| JP5077393B2 (en) | Ceramic electronic component and manufacturing method thereof | |
| JP3642282B2 (en) | Dielectric ceramic composition and multilayer ceramic capacitor using the same | |
| JP2018182128A (en) | Multilayer ceramic capacitor and method of manufacturing the same | |
| JP7544627B2 (en) | Ceramic Electronic Components | |
| JP4682426B2 (en) | Electronic component and manufacturing method thereof | |
| JP7587445B2 (en) | Ceramic Electronic Components | |
| JP7193918B2 (en) | Multilayer ceramic capacitor and manufacturing method thereof | |
| JP2002270458A (en) | Ceramic layered capacitor | |
| JP2007331958A (en) | Electronic component, dielectric ceramic composition and method for producing the same | |
| JP2023063887A (en) | ceramic electronic components | |
| JP2018098386A (en) | Multilayer electronic component | |
| JP5349807B2 (en) | Multilayer ceramic capacitor and manufacturing method thereof | |
| JP5087938B2 (en) | Dielectric ceramic composition and multilayer ceramic capacitor | |
| JP2011071162A (en) | Multilayer ceramic electronic component | |
| KR20140002030A (en) | Layered ceramic capacitor and method for producing layered ceramic capacitor | |
| JPWO2012023406A1 (en) | Multilayer ceramic electronic components | |
| JP6781065B2 (en) | Capacitor | |
| JP3783403B2 (en) | Dielectric ceramic composition and multilayer ceramic capacitor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20040914 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20041104 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20050105 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20050118 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080204 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090204 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100204 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100204 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110204 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120204 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130204 Year of fee payment: 8 |
|
| LAPS | Cancellation because of no payment of annual fees |