JP2001284770A - Circuit-patten formation method and wiring board formed thereby - Google Patents
Circuit-patten formation method and wiring board formed therebyInfo
- Publication number
- JP2001284770A JP2001284770A JP2000091729A JP2000091729A JP2001284770A JP 2001284770 A JP2001284770 A JP 2001284770A JP 2000091729 A JP2000091729 A JP 2000091729A JP 2000091729 A JP2000091729 A JP 2000091729A JP 2001284770 A JP2001284770 A JP 2001284770A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- forming
- powder
- circuit pattern
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 50
- 230000015572 biosynthetic process Effects 0.000 title claims abstract description 20
- 239000000843 powder Substances 0.000 claims abstract description 83
- 239000000919 ceramic Substances 0.000 claims abstract description 40
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 25
- 229910045601 alloy Inorganic materials 0.000 claims description 8
- 239000000956 alloy Substances 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 6
- 108091008695 photoreceptors Proteins 0.000 abstract description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 14
- 239000000758 substrate Substances 0.000 description 7
- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 6
- 239000002245 particle Substances 0.000 description 6
- 238000007639 printing Methods 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910000859 α-Fe Inorganic materials 0.000 description 4
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009396 hybridization Methods 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229920005792 styrene-acrylic resin Polymers 0.000 description 2
- 229920005992 thermoplastic resin Polymers 0.000 description 2
- KTZVZZJJVJQZHV-UHFFFAOYSA-N 1-chloro-4-ethenylbenzene Chemical compound ClC1=CC=C(C=C)C=C1 KTZVZZJJVJQZHV-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000379 polymerizing effect Effects 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229920002102 polyvinyl toluene Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、回路パターン形成
方法及びそれによって形成された配線基板に関し、特に
セラミックグリーンシート上に回路パターンを形成する
にあたって電子写真法により印刷を行なう回路パターン
形成方法及びそれによって形成された配線基板に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a circuit pattern and a wiring board formed by the method, and more particularly, to a method for forming a circuit pattern on a ceramic green sheet by electrophotographic printing and a method for forming the circuit pattern. And a wiring board formed by the method.
【0002】[0002]
【従来の技術】従来から、セラミックグリーンシート上
への回路パターンの形成方法としては、金属粉末を含む
印刷ペーストを使用したスクリーン印刷法があった。し
かしながら、スクリーン印刷法は、回路パターン毎にス
クリーンを製版しなければならず、少量多品種生産にな
ることの多い配線基板の場合にはスクリーンの種類が増
えて製造効率及びコストの面で不利になったり、回路パ
ターンの部分的変更でもスクリーンを再製版しなければ
ならずフレキシブルな対応ができなかったりする欠点が
あった。そこで近年では、回路形成用荷電性粉末を静電
力によってセラミックグリーンシート上に印刷する電子
写真法が実用化されつつある。2. Description of the Related Art Conventionally, as a method of forming a circuit pattern on a ceramic green sheet, there has been a screen printing method using a printing paste containing a metal powder. However, in the screen printing method, a screen must be made for each circuit pattern. In the case of a wiring board that often produces a small number of products, the number of screens increases, which is disadvantageous in terms of manufacturing efficiency and cost. In addition, there is a disadvantage that the screen must be re-produced even if the circuit pattern is partially changed, and a flexible response cannot be performed. Therefore, in recent years, an electrophotographic method of printing a chargeable powder for forming a circuit on a ceramic green sheet by electrostatic force has been put into practical use.
【0003】回路形成用荷電性粉末は、導電性金属粉末
と熱可塑性樹脂とを主体材料としており、これらを所定
の重量比で混合し、この混合物をニーダで熱溶融混練し
てから、カッターミルによる粗粉砕、ジェットミルによ
る微粉砕を経て例えば平均粒径20μm以下の回路形成
用荷電性粉末に調整し、分級する工程により製造されて
いる。そして、このようにして製造された回路形成用荷
電性粉末を電子写真法によりセラミックグリーンシート
上に印刷し、このセラミックグリーンシートを還元雰囲
気中で1000℃の加熱をし、セラミックグリーンシー
トおよび回路パターンを焼結することにより、セラミッ
ク基板上に形成された回路パターンが得られる。The chargeable powder for forming a circuit is mainly composed of a conductive metal powder and a thermoplastic resin. These are mixed at a predetermined weight ratio, and the mixture is melted and kneaded with a kneader. And then finely pulverized by a jet mill to adjust to, for example, a chargeable powder for forming a circuit having an average particle diameter of 20 μm or less, and to classify the powder. Then, the chargeable powder for forming a circuit thus manufactured is printed on a ceramic green sheet by electrophotography, and the ceramic green sheet is heated at 1000 ° C. in a reducing atmosphere to obtain a ceramic green sheet and a circuit pattern. By sintering, a circuit pattern formed on the ceramic substrate is obtained.
【0004】特開平11−193402号公報や特開平
11−233365号公報は、銅やニッケルなどの導電
性金属粉末(金属粒)の表面を熱可塑性樹脂(熱可塑性
絶縁物)で被覆して絶縁した回路形成用荷電性粉末(絶
縁化表面処理金属粒子)、及び鉄粉系またはフェライト
系のキャリア粉末(キャリア粒子)からなる二成分現像
剤(電子写真用現像剤)を用いる技術が開示されてい
る。この技術によれば、現像工程において、キャリア粉
末の表面に回路形成用荷電性粉末が静電吸着された状態
の二成分現像剤は現像スリーブに磁力によって保持さ
れ、二成分現像剤のうち回路形成用荷電性粉末のみが感
光体に形成された静電的な潜像パターンに向けて移動す
る。JP-A-11-193402 and JP-A-11-233365 disclose that a surface of a conductive metal powder (metal particles) such as copper or nickel is covered with a thermoplastic resin (thermoplastic insulator). Using a two-component developer (electrophotographic developer) composed of a chargeable powder for circuit formation (insulated surface-treated metal particles) and a carrier powder (carrier particles) of iron powder or ferrite. I have. According to this technique, in the developing step, the two-component developer in a state where the chargeable powder for forming a circuit is electrostatically adsorbed on the surface of the carrier powder is held by the developing sleeve by magnetic force, and the two-component developer is used for forming the circuit among the two-component developer. Only the chargeable powder moves toward the electrostatic latent image pattern formed on the photoconductor.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、電子写
真法によってセラミックグリーンシート上に回路パター
ンを印刷する場合に従来の二成分現像剤を使用すると、
現像工程で静電気的バランスや磁気的バランスが崩れた
際に、回路形成用荷電性粉末とともキャリア粉末も感光
体に形成された静電的な潜像パターンに移動してしまう
キャリア現像と呼ばれる現象が生じる。このように、キ
ャリア粉末が感光体上の潜像パターンに移動し、転写工
程においてキャリア粉末がセラミックグリーンシート上
へ転写され、回路パターン上に付着すると、回路パター
ンの電気抵抗が増大するという問題がある。すなわち、
鉄粉系のキャリア粉末は表面が酸化鉄で被われ、フェラ
イト系のキャリア粉末は酸化鉄との化合物であるため、
還元雰囲気中において約1000℃で行われる焼成で
は、酸化鉄成分は還元されることなくそのまま回路パタ
ーンに残り、その結果、その部分の電気抵抗がかなり増
大し、場合によってはほとんど断線したような状態にな
る。However, when a conventional two-component developer is used to print a circuit pattern on a ceramic green sheet by electrophotography,
A phenomenon called carrier development in which when the electrostatic or magnetic balance is lost during the development process, both the chargeable powder for circuit formation and the carrier powder move to the electrostatic latent image pattern formed on the photoreceptor. Occurs. As described above, when the carrier powder moves to the latent image pattern on the photoconductor and the carrier powder is transferred onto the ceramic green sheet in the transfer step and adheres to the circuit pattern, there is a problem that the electric resistance of the circuit pattern increases. is there. That is,
Iron powder-based carrier powder is covered with iron oxide, and ferrite-based carrier powder is a compound with iron oxide.
In the calcination performed at about 1000 ° C. in a reducing atmosphere, the iron oxide component remains in the circuit pattern without being reduced, and as a result, the electrical resistance of the portion is considerably increased, and in some cases, almost broken. become.
【0006】本発明は、このような問題点を解消するた
めになされたものであり、電子写真法によって形成され
た回路パターンの電気抵抗の増大を防ぐことができる回
路パターン形成方法及びそれによって形成された配線基
板を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and a circuit pattern forming method capable of preventing an increase in electric resistance of a circuit pattern formed by electrophotography, and a circuit pattern forming method using the method. It is an object of the present invention to provide a finished wiring board.
【0007】[0007]
【課題を解決するための手段】上述する問題点を解決す
るため、本発明の回路パターン形成方法は、感光体の表
面を帯電する帯電工程と、前記感光体に静電的な潜像パ
ターンを形成する露光工程と、キャリア粉末及び回路形
成用荷電性粉末からなる二成分現像剤から前記回路形成
用荷電性粉末のみを取り出し、前記回路形成用荷電性粉
末を前記潜像パターン上へ静電力により付着させる現像
工程と、前記潜像パターン上の前記回路形成用荷電性粉
末を前記セラミックグリーンシート上へ転写する転写工
程と、前記セラミックグリーンシート上へ転写された前
記回路形成用荷電性粉末を定着させる定着工程とを含む
回路パターン形成方法であって、前記二成分現像剤をな
すキャリア粉末が、回路形成用金属、並びに該回路形成
用金属の合金及び化合物のうち1種または2種以上を合
計で50重量%以上含有し、表面が絶縁性被膜で覆われ
たものであることを特徴とする。In order to solve the above-mentioned problems, a circuit pattern forming method according to the present invention comprises a charging step of charging a surface of a photoreceptor, and an electrostatic latent image pattern formed on the photoreceptor. Exposure step to form, take out only the circuit forming chargeable powder from a two-component developer consisting of carrier powder and circuit formation chargeable powder, and electrostatically force the circuit formation chargeable powder onto the latent image pattern A developing step of adhering, a transfer step of transferring the chargeable powder for circuit formation on the latent image pattern onto the ceramic green sheet, and fixing the chargeable powder for circuit formation transferred to the ceramic green sheet. A fixing step, wherein the carrier powder forming the two-component developer comprises: a circuit-forming metal; and an alloy of the circuit-forming metal. Containing more than 50% by weight of one or two or more in total of Gobutsu, surface is characterized in that which has been covered with an insulating coating.
【0008】本発明の配線基板は、上記の回路パターン
形成方法によって、前記回路パターンが印刷された前記
セラミックグリーンシートを焼成してなることを特徴と
する。[0008] A wiring board according to the present invention is characterized in that the ceramic green sheet on which the circuit pattern is printed is fired by the circuit pattern forming method described above.
【0009】また、本発明の配線基板は、上記の回路パ
ターン形成方法によって、前記回路パターンが印刷され
た前記セラミックグリーンシートを積層し、焼成してな
ることを特徴とする。Further, a wiring board according to the present invention is characterized in that the ceramic green sheets on which the circuit patterns are printed are laminated and fired by the circuit pattern forming method described above.
【0010】本発明の回路パターン形成方法によれば、
回路形成用金属、並びに該回路形成用金属の合金及び化
合物のうち1種または2種以上を合計で50重量%以上
含有し、表面を絶縁性被膜で被われたキャリア粉末を含
む二成分現像剤を用いているため、キャリア粉末が回路
パターン上に付着しても、回路パターンの電気抵抗の増
大を防ぐことができる。According to the circuit pattern forming method of the present invention,
Two-component developer containing a metal for forming a circuit, and a carrier powder containing at least 50% by weight in total of one or more of alloys and compounds of the metal for forming a circuit and having a surface covered with an insulating film Is used, it is possible to prevent the electric resistance of the circuit pattern from increasing even if the carrier powder adheres to the circuit pattern.
【0011】本発明の配線基板によれば、回路形成用金
属、並びに回路形成用金属の合金及び化合物のうち1種
または2種以上を合計で50重量%以上含有し、表面を
絶縁性被膜で被われたキャリア粉末を含む二成分現像剤
を用いて、電子写真法によって回路パターンをセラミッ
クグリーンシートに印刷し、その後、それらのセラミッ
クグリーンシートを焼成して配線基板を形成するため、
電気抵抗の低い回路パターンを備えた配線基板を容易に
作製することができる。According to the wiring board of the present invention, a metal for forming a circuit and one or more of alloys and compounds of the metal for forming a circuit are contained in a total of 50% by weight or more, and the surface is formed of an insulating film. Using a two-component developer containing the covered carrier powder, the circuit pattern is printed on the ceramic green sheets by electrophotography, and then the ceramic green sheets are fired to form a wiring board.
A wiring substrate having a circuit pattern with low electric resistance can be easily manufactured.
【0012】[0012]
【発明の実施の形態】以下、図面を参照して本発明の実
施例を説明する。図1は、本発明の回路パターン形成方
法に係る一実施例に用いる電子写真システムの構成図で
ある。セラミックグリーンシート上の回路パターン形成
方法は、コロナ帯電器11により感光体12の表面を帯
電する帯電工程、感光体12の表面にレーザ光13を照
射して所望の潜像パターン(図示せず)を形成する露光
工程、供給手段14に充填された二成分現像剤15から
回路形成用荷電性粉末16のみを取り出し、回路形成用
荷電性粉末16を感光体12の表面の潜像パターンに静
電吸着させる現像工程、セラミックグリーンシート17
の背面から転写器18により、セラミックグリーンシー
ト17に回路形成用荷電性粉末16と逆極性の電荷を与
え、潜像パターン上に現像された回路形成用荷電性粉末
16をセラミックグリーンシート17上へ転写する転写
工程、フラッシュランプ19の照射によりセラミックグ
リーンシート17上に転写された回路形成用荷電性粉末
16を定着させ、セラミックグリーンシート17上に回
路パターン(図示せず)を形成する定着工程で構成され
る。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of an electrophotographic system used in an embodiment according to a circuit pattern forming method of the present invention. The circuit pattern forming method on the ceramic green sheet includes a charging step of charging the surface of the photoreceptor 12 by the corona charger 11, and irradiating the surface of the photoreceptor 12 with a laser beam 13 to obtain a desired latent image pattern (not shown). In the exposure step of forming the toner, only the chargeable powder for circuit formation 16 is taken out from the two-component developer 15 filled in the supply means 14, and the chargeable powder for circuit formation 16 is electrostatically applied to the latent image pattern on the surface of the photoconductor 12 Developing process for adsorption, ceramic green sheet 17
From the back surface of the substrate, a transfer device 18 applies a charge having a polarity opposite to that of the chargeable powder 16 for circuit formation to the ceramic green sheet 17 and transfers the chargeable powder 16 for circuit formation developed on the latent image pattern onto the ceramic green sheet 17. In the transfer step of transferring, the circuit forming chargeable powder 16 transferred onto the ceramic green sheet 17 by irradiation of the flash lamp 19 is fixed, and a circuit pattern (not shown) is formed on the ceramic green sheet 17. Be composed.
【0013】図2は、図1の回路パターン形成方法に用
いられる二成分現像剤の断面図である。二成分現像剤1
5は、回路形成用荷電性粉末16とキャリア粉末21と
からなり、回路形成用荷電性粉末16はキャリア粉末2
1の表面に静電吸着されている。この場合、回路形成用
荷電性粉末16とキャリア粉末21との混合重量比は、
10:90〜30:70とすることが望ましい。FIG. 2 is a sectional view of the two-component developer used in the circuit pattern forming method of FIG. Two-component developer 1
5 is composed of a chargeable powder 16 for forming a circuit and a carrier powder 21;
1 is electrostatically adsorbed on the surface of the substrate 1. In this case, the mixing weight ratio between the circuit-forming chargeable powder 16 and the carrier powder 21 is as follows:
It is desirable to set 10:90 to 30:70.
【0014】なお、キャリア粉末21の混合重量比が9
0%を超えると、回路形成用荷電性粉末16とともキャ
リア粉末21も感光体12に形成された潜像パターンに
移動してしまうキャリア現像が著しくなって精密な回路
パターンを形成することが困難となる。When the mixing weight ratio of the carrier powder 21 is 9
If it exceeds 0%, the carrier powder 21 together with the chargeable powder 16 for forming a circuit move to the latent image pattern formed on the photoreceptor 12, so that the carrier development becomes remarkable and it is difficult to form a precise circuit pattern. Becomes
【0015】一方、キャリア粉末21の混合重量比が7
0%を下回ると、回路形成用荷電性粉末16による地カ
ブリが発生しやすくなる。On the other hand, when the mixing weight ratio of the carrier powder 21 is 7
If it is less than 0%, ground fog due to the chargeable powder 16 for forming a circuit is likely to occur.
【0016】キャリア粉末21は、銅、ニッケル、クロ
ムなどからなる回路形成用金属22を含み、その回路形
成用金属22の表面がポリスチレン、ポリ−p−クロル
スチレン、ポリビニルトルエンなどからなる絶縁性被膜
23で被われたものである。The carrier powder 21 contains a circuit-forming metal 22 made of copper, nickel, chromium or the like, and the surface of the circuit-forming metal 22 is made of an insulating film made of polystyrene, poly-p-chlorostyrene, polyvinyl toluene, or the like. 23.
【0017】絶縁性被膜23の形成方法としては、回路
形成用金属22の表面に絶縁性被膜23を衝突させて機
械的に固着させるハイブリダイゼーションやメカフュー
ジョンといった方法、あるいは回路形成用金属22の表
面に絶縁性被膜23を重合させる方法などがある。The insulating film 23 may be formed by a method such as hybridization or mechanical fusion in which the insulating film 23 is caused to collide with the surface of the circuit-forming metal 22 and mechanically fixed thereto, or the surface of the circuit-forming metal 22 is formed. And a method of polymerizing the insulating film 23.
【0018】なお、絶縁性被膜23の厚さは、回路形成
用荷電性粉末16を現像する際の現像特性に合わせて調
整される。回路形成用荷電性粉末16がキャリア粉末2
1から離脱して感光体12(図1)側へ移動する際の抵
抗(キャリア抵抗)を大きくしたい場合には厚くし、小
さくしたい場合には薄くする。 [実施例1] 1−1.キャリア粉末の作製 まず、平均粒径が43μmの球状のニッケル粉末と、ス
チレンアクリル樹脂とを重量比で60:40で混合し、
奈良機械製作所製のハイブリダイゼーションシステムに
投入し、4000rpmで3分間処理する。これによっ
て、回路形成用金属22であるニッケル粉末の表面に絶
縁性被膜23であるスチレンアクリル樹脂が固着したキ
ャリア粉末21を得る。 1−2.二成分現像剤の作製 回路形成用荷電性粉末16と1−1の方法で得られたキ
ャリア粉末21とを重量比15:85で混合し、二成分
現像剤15とした。回路形成用荷電性粉末16は、銅粉
末と絶縁性樹脂との重量比を90:10とし、球状の銅
粉末の表面を絶縁性樹脂で被った平均粒径が7.3μm
のものを用いた。 1−3.回路パターンの作製 1−2の方法で得られた二成分現像剤15を用いて、図
1に示した電子写真法により回路パターンを印刷したセ
ラミックグリーンシートを還元雰囲気中で1000℃の
加熱をし、セラミックグリーンシートおよび回路パター
ンを焼結してセラミック基板上に回路パターンを形成し
た。The thickness of the insulating film 23 is adjusted in accordance with the developing characteristics when the chargeable powder 16 for forming a circuit is developed. The chargeable powder 16 for forming a circuit is the carrier powder 2
If it is desired to increase the resistance (carrier resistance) when moving away from 1 and moving toward the photoreceptor 12 (FIG. 1), the thickness is increased. [Example 1] 1-1. Preparation of Carrier Powder First, spherical nickel powder having an average particle diameter of 43 μm and styrene acrylic resin were mixed at a weight ratio of 60:40,
The mixture is put into a hybridization system manufactured by Nara Machinery Co., Ltd. and treated at 4000 rpm for 3 minutes. As a result, a carrier powder 21 in which a styrene acrylic resin as an insulating film 23 is adhered to the surface of a nickel powder as a metal 22 for forming a circuit is obtained. 1-2. Preparation of Two-Component Developer The chargeable powder 16 for forming a circuit and the carrier powder 21 obtained by the method 1-1 were mixed at a weight ratio of 15:85 to obtain a two-component developer 15. The chargeable powder 16 for forming a circuit has a weight ratio of copper powder to insulating resin of 90:10, and the average particle diameter of the surface of the spherical copper powder covered with the insulating resin is 7.3 μm.
Was used. 1-3. Preparation of Circuit Pattern Using the two-component developer 15 obtained by the method 1-2, the ceramic green sheet on which the circuit pattern is printed by the electrophotographic method shown in FIG. 1 is heated at 1000 ° C. in a reducing atmosphere. Then, the ceramic green sheet and the circuit pattern were sintered to form a circuit pattern on the ceramic substrate.
【0019】このような回路パターンの印刷を1000
回行った後の回路パターンを観察したところ、幅75μ
mのラインにキャリア粉末が付着しているのを確認し
た。キャリア粉末が付着していない正常なラインとキャ
リア粉末が付着しているラインとの電気抵抗を測定した
ところ、それぞれ2.3mΩ/□であった。 [比較例]キャリア粉末として平均粒径40μmのフェ
ライトを用いた以外は実施例1と同じ条件で二成分現像
剤を作製し、実施例1と同じ条件で1000回の印刷を
行った。次いで、キャリア粉末が付着しているラインの
電気抵抗を測定したところ、3.8mΩ/□であった。The printing of such a circuit pattern is performed for 1000 times.
After observing the circuit pattern after performing the process for 75 times,
It was confirmed that the carrier powder was attached to the m line. The electrical resistance of the normal line to which the carrier powder was not attached and the electrical resistance of the line to which the carrier powder was attached were measured, and were 2.3 mΩ / □, respectively. Comparative Example A two-component developer was prepared under the same conditions as in Example 1 except that ferrite having an average particle size of 40 μm was used as the carrier powder, and printing was performed 1,000 times under the same conditions as in Example 1. Next, when the electric resistance of the line to which the carrier powder was attached was measured, it was 3.8 mΩ / □.
【0020】以上のように、キャリア粉末が付着した
際、フェライトのキャリア粉末を用いた場合には電気抵
抗がかなり悪化するが、本発明のキャリア粉末を用いた
場合には電気抵抗はほとんど変化しない。 [実施例2]キャリア粉末のニッケル粒子を鉄−ニッケ
ル合金とし、ニッケル含有量を30〜70重量%の間で
段階的に変化させた以外は実施例1と同じ条件で二成分
現像剤を作製した。As described above, when the carrier powder adheres, the electric resistance is considerably deteriorated when the ferrite carrier powder is used, but the electric resistance hardly changes when the carrier powder of the present invention is used. . Example 2 A two-component developer was prepared under the same conditions as in Example 1 except that the nickel particles of the carrier powder were made of an iron-nickel alloy and the nickel content was changed stepwise between 30 and 70% by weight. did.
【0021】次いで、実施例1と同じ条件で1000回
の印刷を行い、キャリア粉末が付着していない正常なラ
インとキャリア粉末が付着しているラインとの電気抵抗
を測定した。その結果を表1に示す。Next, printing was performed 1,000 times under the same conditions as in Example 1, and the electrical resistance between the normal line where the carrier powder was not attached and the line where the carrier powder was attached was measured. Table 1 shows the results.
【0022】[0022]
【表1】 [Table 1]
【0023】表1から、キャリア粉末におけるニッケル
の含有量が50重量%未満ではラインの電気抵抗が高
く、しかも導通しない場合もあったが、50重量%以上
の場合には、ラインの電気抵抗が低く良好な値を示すこ
とがわかる。From Table 1, it can be seen that when the nickel content in the carrier powder is less than 50% by weight, the electrical resistance of the line is high and the line does not conduct in some cases. It turns out that it shows a low and favorable value.
【0024】上述の実施例の回路パターン形成方法によ
れば、回路形成用金属であるニッケル粉末や回路形成用
金属の合金である鉄−ニッケル合金を50重量%以上含
有し、表面を絶縁性被膜で被われたキャリア粉末を含む
二成分現像剤を用いているため、キャリア粉末が回路パ
ターン上に付着しても、回路パターンの電気抵抗の増大
を防ぐことができる。すなわち、電気抵抗の低い回路パ
ターンを容易に形成できる。According to the circuit pattern forming method of the above-described embodiment, nickel powder as a metal for forming a circuit and iron-nickel alloy as an alloy of the metal for forming a circuit are contained in an amount of 50% by weight or more, and the surface is formed of an insulating film. Since the two-component developer containing the carrier powder covered by the above is used, even if the carrier powder adheres to the circuit pattern, it is possible to prevent the electric resistance of the circuit pattern from increasing. That is, a circuit pattern with low electric resistance can be easily formed.
【0025】図3は、本発明の配線基板に係る第1の実
施例の断面図である。配線基板30は、セラミックグリ
ーンシート31を備える。そして、セラミックグリーン
シート31上に、上述の実施例1及び実施例2の回路形
成用荷電性粉末を使用して、電子写真法によって回路パ
ターン32を印刷した後、還元雰囲気中において約10
00℃で焼成する。FIG. 3 is a sectional view of a first embodiment according to the wiring board of the present invention. The wiring board 30 includes a ceramic green sheet 31. Then, after the circuit pattern 32 is printed on the ceramic green sheet 31 by electrophotography using the chargeable powder for forming a circuit of the above-described Example 1 and Example 2, about 10% is printed in a reducing atmosphere.
Bake at 00 ° C.
【0026】図4は、本発明の配線基板に係る第2の実
施例の断面図である。配線基板40は、第1〜第3のセ
ラミックグリーンシート41a〜41cを備える。そし
て、第2及び第3のセラミックグリーンシート41b,
41c上に、上述の実施例1及び実施例2の回路形成用
荷電性粉末を使用して、電子写真法によって回路パター
ン42a,42bを印刷する。次いで、第1〜第3のセ
ラミックグリーンシート41a〜41cを積層して圧力
をかけ、一体成形した後、還元雰囲気中において約10
00℃で焼成する。FIG. 4 is a sectional view of a second embodiment according to the wiring board of the present invention. The wiring board 40 includes first to third ceramic green sheets 41a to 41c. Then, the second and third ceramic green sheets 41b,
The circuit patterns 42a and 42b are printed on the surface 41c by electrophotography using the chargeable powder for forming a circuit of the first and second embodiments. Next, after laminating the first to third ceramic green sheets 41a to 41c, applying pressure, and integrally forming the green sheets, about 10% in a reducing atmosphere.
Bake at 00 ° C.
【0027】なお、第2及び第3のセラミックグリーン
シート41b,41c上の回路パターン42a,42b
は、ビアホール43により接続されるが、このビアホー
ル43は既存の技術で形成される。例えば、導体描画装
置を用いてビアホールごとに導体を圧入していく方法な
どがある。この場合には、回路パターンを42a,42
bを電子写真法で形成した後、ビアホール43を形成す
ると粉体が描画機のノズルを傷める可能性があるため、
回路パターン42a,42bを形成する前にビアホール
43を形成しておくことが好ましい。The circuit patterns 42a and 42b on the second and third ceramic green sheets 41b and 41c, respectively.
Are connected by a via hole 43, which is formed by an existing technology. For example, there is a method of press-fitting a conductor into each via hole using a conductor drawing apparatus. In this case, the circuit patterns 42a, 42
If b is formed by electrophotography and then the via hole 43 is formed, the powder may damage the nozzle of the drawing machine.
It is preferable to form the via hole 43 before forming the circuit patterns 42a and 42b.
【0028】上述の実施例の配線基板によれば、回路形
成用金属であるニッケル粉末や回路形成用金属の合金で
ある鉄−ニッケル合金を50重量%以上含有し、表面を
絶縁性被膜で被われたキャリア粉末を含む二成分現像剤
を用いて、電子写真法によって回路パターンをセラミッ
クグリーンシートに印刷し、その後、それらのセラミッ
クグリーンシートを焼成して配線基板を形成するため、
電気抵抗の低い回路パターンを備えた配線基板を容易に
作製することができる。According to the wiring board of the above-described embodiment, nickel powder as a metal for forming a circuit and iron-nickel alloy as an alloy of the metal for forming a circuit are contained in an amount of 50% by weight or more, and the surface is coated with an insulating film. Using a two-component developer containing separated carrier powder, a circuit pattern is printed on ceramic green sheets by electrophotography, and then the ceramic green sheets are fired to form a wiring board.
A wiring substrate having a circuit pattern with low electric resistance can be easily manufactured.
【0029】[0029]
【発明の効果】本発明の回路パターン形成方法によれ
ば、回路形成用金属、並びに該回路形成用金属の合金及
び化合物のうち1種または2種以上を合計で50重量%
以上含有し、表面を絶縁性被膜で被われたキャリア粉末
を含む二成分現像剤を用いているため、キャリア粉末が
回路パターン上に付着しても、回路パターンの電気抵抗
の増大を防ぐことができる。すなわち、電気抵抗の低い
回路パターンを容易に形成できる。According to the method for forming a circuit pattern of the present invention, a total of 50% by weight of a metal for forming a circuit and one or more of an alloy and a compound of the metal for forming a circuit is used.
Since a two-component developer containing a carrier powder whose surface is covered with an insulating film is used, even if the carrier powder adheres to the circuit pattern, it is possible to prevent an increase in electric resistance of the circuit pattern. it can. That is, a circuit pattern with low electric resistance can be easily formed.
【0030】本発明の配線基板によれば、回路形成用金
属、並びに回路形成用金属の合金及び化合物のうち1種
または2種以上を合計で50重量%以上含有し、表面を
絶縁性被膜で被われたキャリア粉末を含む二成分現像剤
を用いて、電子写真法によって回路パターンをセラミッ
クグリーンシートに印刷し、その後、それらのセラミッ
クグリーンシートを焼成して配線基板を形成するため、
電気抵抗の低い回路パターンを備えた配線基板を容易に
作製することができる。According to the wiring board of the present invention, a metal for forming a circuit, and one or more of alloys and compounds of the metal for forming a circuit are contained in a total of 50% by weight or more, and the surface is formed of an insulating film. Using a two-component developer containing the covered carrier powder, the circuit pattern is printed on the ceramic green sheets by electrophotography, and then the ceramic green sheets are fired to form a wiring board.
A wiring substrate having a circuit pattern with low electric resistance can be easily manufactured.
【図1】本発明の回路パターン形成方法に係る一実施例
に用いる電子写真システムの構成図である。FIG. 1 is a configuration diagram of an electrophotographic system used in an embodiment according to a circuit pattern forming method of the present invention.
【図2】図1の回路パターン形成方法に用いられる二成
分現像剤の断面図である。FIG. 2 is a cross-sectional view of a two-component developer used in the circuit pattern forming method of FIG.
【図3】本発明の配線基板に係る第1の実施例の断面図
である。FIG. 3 is a sectional view of a first embodiment of the wiring board according to the present invention;
【図4】本発明の配線基板に係る第2の実施例の断面図
である。FIG. 4 is a sectional view of a second embodiment according to the wiring board of the present invention.
12 感光体 15 二成分現像剤 16 回路形成用荷電性粉末 17,31,41a〜41c セラミックグリーン
シート 21 キャリア粉末 22 回路形成用金属 23 絶縁性被膜 30,40 配線基板 32,42a,42b 回路パターンDESCRIPTION OF SYMBOLS 12 Photoreceptor 15 Two-component developer 16 Chargeable powder for circuit formation 17, 31, 41a-41c Ceramic green sheet 21 Carrier powder 22 Metal for circuit formation 23 Insulating coating 30, 40 Wiring board 32, 42a, 42b Circuit pattern
Claims (3)
記感光体に静電的な潜像パターンを形成する露光工程
と、キャリア粉末及び回路形成用荷電性粉末からなる二
成分現像剤から前記回路形成用荷電性粉末のみを取り出
し、前記回路形成用荷電性粉末を前記潜像パターン上へ
静電力により付着させる現像工程と、前記潜像パターン
上の前記回路形成用荷電性粉末を前記セラミックグリー
ンシート上へ転写する転写工程と、前記セラミックグリ
ーンシート上へ転写された前記回路形成用荷電性粉末を
定着させる定着工程とを含む回路パターン形成方法であ
って、 前記二成分現像剤をなすキャリア粉末が、回路形成用金
属、並びに該回路形成用金属の合金及び化合物のうち1
種または2種以上を合計で50重量%以上含有し、表面
が絶縁性被膜で覆われたものであることを特徴とする回
路パターン形成方法。1. A charging process for charging a surface of a photoconductor, an exposure process for forming an electrostatic latent image pattern on the photoconductor, and a two-component developer comprising a carrier powder and a chargeable powder for forming a circuit. Taking out only the chargeable powder for circuit formation, developing the chargeable powder for circuit formation on the latent image pattern by electrostatic force, and charging the chargeable powder for circuit formation on the latent image pattern with the ceramic A method of forming a circuit pattern, comprising: a transfer step of transferring onto a green sheet; and a fixing step of fixing the chargeable powder for forming a circuit transferred onto the ceramic green sheet, wherein the carrier forming the two-component developer is provided. The powder is one of the metal for forming a circuit, and an alloy and a compound of the metal for forming a circuit.
A method for forming a circuit pattern, comprising a total of 50% by weight or more of a kind or two or more kinds and a surface covered with an insulating film.
によって、前記回路パターンが印刷された前記セラミッ
クグリーンシートを焼成してなることを特徴とする配線
基板。2. A wiring board, wherein the ceramic green sheet on which the circuit pattern is printed is fired by the circuit pattern forming method according to claim 1.
によって、前記回路パターンが印刷された前記セラミッ
クグリーンシートを積層し、焼成してなることを特徴と
する配線基板。3. A wiring board, wherein the ceramic green sheets on which the circuit patterns are printed are laminated and fired by the circuit pattern forming method according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000091729A JP2001284770A (en) | 2000-03-29 | 2000-03-29 | Circuit-patten formation method and wiring board formed thereby |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000091729A JP2001284770A (en) | 2000-03-29 | 2000-03-29 | Circuit-patten formation method and wiring board formed thereby |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001284770A true JP2001284770A (en) | 2001-10-12 |
Family
ID=18607158
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000091729A Pending JP2001284770A (en) | 2000-03-29 | 2000-03-29 | Circuit-patten formation method and wiring board formed thereby |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001284770A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8088545B2 (en) | 2007-10-12 | 2012-01-03 | Fuji Xerox Co., Ltd. | Production apparatus and production method of wired member using electrophotographic method |
-
2000
- 2000-03-29 JP JP2000091729A patent/JP2001284770A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8088545B2 (en) | 2007-10-12 | 2012-01-03 | Fuji Xerox Co., Ltd. | Production apparatus and production method of wired member using electrophotographic method |
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