JP2001267558A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent scattering and diffusion of a refractory metal in a MOS transistor having a gate electrode having a refractory metal silicide film such as polycide. SOLUTION: After depositing a polycrystalline silicon film 4, a refractory metal silicide film 5, and a silicon oxide film 6, the silicon oxide film 6 and the refractory metal silicide film 5 are processed by etching. Subsequently, an insulating film 7 is deposited and etched to form first spacers 8 on the side walls of the silicon oxide film 6a and the refractory metal silicide film 5a. Next, the polycrystalline silicon film 4 is etched to form low concentration source / drain regions 9. Further, after depositing a silicon oxide film, the second spacer 10 is formed by performing etching. Finally, a high concentration source / drain region 11 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor, and more particularly, to a method of covering a high melting metal silicide film with an insulating film in a field effect transistor having a high melting metal silicide film such as polycide in a gate electrode. Accordingly, the present invention relates to a method of manufacturing a semiconductor device capable of preventing scattering and diffusion of a high melting point metal.

[0002]

2. Description of the Related Art FIGS. 3 and 4 are process sectional views showing a conventional method for manufacturing a semiconductor device.

First, as shown in FIG. 3A, a buried silicon oxide film 2 is formed on a P-type silicon semiconductor substrate 1.
A gate oxide film 3 is formed. Next, on the gate oxide film 3,
Polycrystalline silicon film 4a, tungsten silicide film 5
a and a silicon oxide film 6a are formed. These laminated films are formed by sequentially depositing a polycrystalline silicon film, a tungsten silicide film as a refractory metal silicide film, and a silicon oxide film, masking with a photoresist, and patterning by anisotropic etching. Gate oxide film 3 is left on P-type silicon semiconductor substrate 1.

Subsequently, as shown in FIG. 3 (b), after forming a low concentration source / drain diffusion layer 9 by ion implantation, a silicon oxide film 20 is deposited as shown in FIG. 3 (c). By performing anisotropic etching, FIG.
The spacer 10 is formed as shown in FIG. Subsequently, a high concentration source / drain diffusion layer 11 is formed by using an ion implantation method. Finally, as shown in FIG. 4, an interlayer insulating film 12 is deposited, and a contact hole 17 and a wiring layer 18 are formed.

[0005]

However, in the conventional method, the tungsten silicide film 5a, which is a refractory metal silicide film serving as a gate electrode, is exposed, and this tungsten is used for patterning by anisotropic etching or for subsequent patterning. There is a problem that in the cleaning process, the semiconductor is scattered and diffused, and then diffused in the subsequent thermal process to the PN junction of the high-concentration source / drain diffusion layer 11 forming the source / drain region, thereby increasing leakage current.

The present invention solves the above-mentioned conventional problems. In a field effect transistor having a gate electrode having a refractory metal silicide film such as polycide, the refractory metal silicide film is covered with an insulating film. It is another object of the present invention to provide a method of manufacturing a semiconductor device capable of preventing scattering and diffusion of a high melting point metal.

[0007]

In order to achieve this object, a method of manufacturing a semiconductor device according to the present invention comprises forming a gate oxide film in an active region on the surface of a semiconductor substrate, and then forming a polycrystalline silicon film and a high melting point film. A metal silicide film and a silicon oxide film are deposited. Next, after patterning to a predetermined size using a photoresist, the silicon oxide film and the refractory metal silicide film are processed by anisotropic etching. Subsequently, an insulating film is deposited, a second anisotropic etching is performed,
A first spacer is formed on a side wall of the silicon oxide film and the refractory metal silicide film. This first spacer can prevent tungsten from being taken into the semiconductor substrate. Next, the polycrystalline silicon film is etched by performing third anisotropic etching using the first spacer and the silicon oxide film as a mask. Next, a low-concentration source / drain region is formed by ion implantation, a second silicon oxide film is deposited, and then a fourth anisotropic etching is performed to form the second silicon oxide film. Form a second spacer. Next, high-concentration source / drain regions are formed by ion implantation.

By forming the first spacer as described above, the exposure of the refractory metal can be prevented, and the refractory metal can be prevented from being taken into the semiconductor substrate. With this configuration, the refractory metal is deposited on the gate oxide film and low-concentration source
It can be prevented from being taken into the rain area.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. 1 and 2 are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

First, as shown in FIG. 1A, an oxide film 2 having a buried structure is formed on the surface of a P-type silicon semiconductor substrate 1 to divide an active region and an isolation region.
A gate oxide film 3 of nm is formed. Next, a polycrystalline polysilicon film 4 containing phosphorus having a thickness of 30 to 100 nm is deposited by a chemical vapor deposition method, and a thickness of 20 to 100 nm is further deposited by a chemical vapor deposition method.
200 nm tungsten silicide film 5 and thickness 20 to
A 200 nm silicon oxide film 6 is deposited.

Next, as shown in FIG. 1B, the silicon oxide film 6 and the tungsten silicide film 5 are patterned by anisotropic dry etching using a photoresist 19 patterned to a predetermined size. At this time, the silicon oxide film 6 is first etched by using CHF3 and O2 gas to form a silicon oxide film 6a, and then the tungsten silicide film 5 is etched by Cl2 gas to form a tungsten silicide film 5a.

Next, after removing the photoresist 19 used for patterning with a mixed solution of sulfuric acid and hydrogen peroxide,
As shown in FIG. 1C, a thickness of 10 to 2
A 0 nm silicon nitride film 7 is deposited.

Next, as shown in FIG. 1D, the silicon nitride film 7 is etched with a mixed gas of CHF3 and O2, and spacers 8 made of a silicon nitride film are formed on the side walls of the silicon oxide film 6a and the tungsten silicide film 5a. leave. The spacer 8 formed here prevents tungsten from being taken into the diffusion layer region of the semiconductor substrate from the tungsten silicide film 5a. Then, using the spacer 8 and the silicon oxide film 6a as a mask, the polycrystalline silicon film 4 is
Etching is performed using a mixed gas of Br and He to form a polycrystalline silicon film 4a, thereby completing a gate electrode. Furthermore,
Phosphorus ions at an energy of 20 to 40 keV and a dose of 5 ×
The N-diffusion layer 9 is formed by implantation at 10 @ 12 to 5.times.10@13.

Next, 100-150 n by a chemical vapor method.
After depositing a silicon oxide film having a thickness of m, anisotropic etching is performed with a mixed gas of CHF3 and O2 to form a spacer 10 as shown in FIG. 2A, and a spacer 8 is formed so as to cover the tungsten silicide film 5a. The side wall of the formed gate electrode is further covered. At this time, the gate oxide film 3 existing in the region other than the gate electrode is removed. Next, arsenic ions are supplied with an energy of 5 to 20 keV and a dose of 1 × 1015 to
Implantation is performed at 5 × 10 15 to form a high concentration source / drain diffusion layer 11.

Next, as shown in FIG.
After depositing the interlayer insulating film 12 of 1000 nm BPSG, a heat treatment of 750 to 800 degrees is performed. Further, a contact hole 17 connecting the high-concentration source / drain diffusion layer 11 forming the transistor source / drain region and the wiring is formed by using a general method. Finally, a wiring layer 18 made of aluminum or the like is formed.

In this manner, a MOS transistor can be formed without the tungsten from the gate electrode being diffused into the source / drain and the diffusion layer in the element isolation region. Thereby, the leakage current of the PN junction of the MOS transistor is suppressed. In the above embodiment, a silicon nitride film is used as the spacer 8, but a silicon oxide film may be used.

In the above embodiment, the formation of an N-channel MOS transistor has been described. However, it is apparent that the present invention can be applied to a P-channel MOS transistor.

[0018]

According to the present invention, when forming a MOS transistor used for a gate electrode including a refractory metal silicide film, the refractory metal coming out of the refractory metal silicide is converted to a gate oxide film or a low concentration source drain / rain. The incorporation into the region can be prevented by forming a spacer of an insulating film on the side wall of the refractory metal silicide film. This can prevent the refractory metal from diffusing into the junction between the source / drain regions and suppress the leakage current at the junction.

[Brief description of the drawings]

FIG. 1 is a process cross-sectional view showing a former part of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

FIG. 2 is a process sectional view showing a latter part of the method of manufacturing the semiconductor device in FIG. 1;

FIG. 3 is a process cross-sectional view showing a former part of a conventional semiconductor device manufacturing method.

FIG. 4 is a process sectional view showing a latter part of the method of manufacturing the semiconductor device in FIG. 3;

[Brief description of reference numerals]

 DESCRIPTION OF SYMBOLS 1 P-type silicon semiconductor substrate 2 Buried silicon oxide film 3, 3a Gate oxide film 4, 4a Polycrystalline silicon film 5, 5a Tungsten silicide film 6, 6a Silicon oxide film 7 Silicon nitride film 8 Spacer 9 Low concentration source / drain diffusion Layer 10, 10a Spacer 11 High-concentration source / drain diffusion layer 12 Interlayer insulating film 17 Contact hole 18 Wiring layer 19 Photoresist 20 Silicon oxide film

Claims (1)

[Claims] 1. After forming a gate oxide film in an active region on the surface of a semiconductor substrate, a polycrystalline silicon film, a refractory metal silicide film, and a silicon oxide film are sequentially deposited, and a photoresist is used on those films. After patterning, the silicon oxide film and the refractory metal silicide film are anisotropically etched, an insulating film is deposited, and a second anisotropic etching is performed to form the silicon oxide film and the refractory metal silicide film. Forming a first spacer on the side wall of the metal silicide film; performing a third anisotropic etching on the polycrystalline silicon film using the first spacer and the silicon oxide film as a mask to form a gate electrode; A low-concentration source using the ion implantation method in the semiconductor substrate;
After forming a drain region and depositing a second silicon oxide film, a fourth anisotropic etching is performed to form a second spacer on the side wall of the first spacer and the polycrystalline silicon film. A high-concentration source using the ion implantation method in the semiconductor substrate;
A method for manufacturing a semiconductor device, comprising forming a drain region.