JP2001119010A - Multi-output solid-state imaging device - Google Patents

Abstract

(57) Abstract: Provided is a multi-output solid-state imaging device which secures a space for providing a separation register without arranging an intermediate register and without increasing a chip area. A plurality of photoelectric conversion units that are arranged at a predetermined pitch in the horizontal and vertical directions and generate charges according to incident light,
A vertical transfer unit that transfers charges generated in the photoelectric conversion unit in a vertical direction for each column, and a horizontal transfer unit that transfers charges transferred from the vertical transfer unit in a horizontal direction, wherein the horizontal transfer unit The block is divided into a plurality of blocks each having an output portion, and the block has a plurality of transfer electrodes arranged on a semiconductor region via an insulating film, and the charge is sequentially applied to the transfer electrodes by applying a driving pulse to the transfer electrodes. At least one of the transfer electrodes transferred to the output unit has a longer pitch on the side in contact with the vertical transfer unit than on the opposite side.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a multi-output solid-state imaging device in which a horizontal transfer section is divided into a plurality of blocks and outputs electric charge for each block.

[0002]

2. Description of the Related Art Conventionally, a CCD (charge couple device) has been used.
e) has been widely used as a charge transfer section of a solid-state imaging device. When a CCD is used in a solid-state imaging device, the same number of vertical CCDs and one horizontal CCD as the number of horizontal pixels are arranged, and electric charges are transferred from the photoelectric conversion units arranged in each pixel to the vertical CCs.
D, horizontal CCD, and transferred to the output unit.

In recent years, the number of pixels has tended to increase in order to improve the image resolution of solid-state imaging devices.
However, when the number of pixels is increased, the reading time naturally increases. The charge is transferred from the pixel to the horizontal C through the vertical CCD.
Comparing the time for transferring to the CD and the time for transferring the charges transferred to the horizontal CCD to the output unit via the horizontal CCD, the latter is overwhelmingly longer. That is, the time required to read out the charges of all the pixels is limited by the transfer speed of the horizontal CCD.

[0004] Therefore, conventionally, there has been a proposal to use a horizontal CCD as a multi-output for the purpose of high-speed image reading. By dividing the horizontal CCD into a plurality of parts and outputting a plurality of outputs in parallel, the apparent data rate is improved. FIG. 3 is a plan view showing a conventional multi-output solid-state imaging device 31. This is a frame transfer type CCD multi-output solid-state imaging device 31 including a photosensitive region 32 having a photoelectric conversion unit and a non-photosensitive region 33. A reading diode (not shown) for converting a charge into a voltage is arranged at the final portion of each of the divided horizontal CCDs (34a to 34z). MOS transistors (35a to 35a) for resetting the reading diode
z) and an amplifier (36a-36z) for outputting the voltage of the reading diode to the outside of the chip are horizontal CCDs.
Are located out of line.

In this conventional example, since a plurality of output units are arranged on the horizontal CCD, the apparent data rate is improved. However, this configuration has a problem called initial pixel droop. That is, there is a problem of non-uniform response in the first effective pixel clock read by each output unit. This is not a problem limited to the multi-output type CCD, but also occurs in a single-output solid-state imaging device in which only one horizontal CCD is arranged. In the single output solid-state imaging device, the problem is solved by disposing a plurality of dummy CCD electrodes at the last stage of the CCD and discarding the dummy signal. However, in the above-described multi-output solid-state imaging device, initial pixel doping occurs because there is no space for disposing the dummy CCD electrode.

FIG. 4 is a plan view showing a conventional multi-output solid-state imaging device 41 with improved initial pixel doping. An intermediate register 43 is provided between the vertical CCD 42 and the horizontal CCD 44. The intermediate register 43 is a vertical CCD
42 is extended and narrowed on the horizontal CCD side. Functionally, it is the same as the vertical CCD. Since the intermediate register 43 is arranged, the separation register 4
5 and the reading diode 46 are connected to each divided horizontal CC.
It is possible to arrange between D44. Also,
A separation register 45 is arranged between the horizontal CCD 44 and the reading diode 46. This separation register 45
Corresponds to the aforementioned dummy CCD electrode, and by providing this, it is possible to prevent initial pixel droop.

[0007]

In the multi-output solid-state imaging device shown in FIG. 4, a space for providing the separation register 45 is secured by providing the intermediate register 43 to prevent an initial pixel droop. However, there is a problem that the chip area is increased by the provision of the intermediate register 43, the yield is reduced, and the chip unit price is increased. The present invention has been made in view of such a problem, and an object of the present invention is to provide a multi-output solid-state imaging device having a space for disposing a separation register without increasing a chip area.

[0008]

According to a first aspect of the present invention, there is provided a multi-output solid-state imaging device, comprising: a plurality of photoelectric conversion units which are arranged at a predetermined pitch in a horizontal and vertical direction and generate electric charges according to incident light; A vertical transfer unit for transferring the charges generated in the unit in a vertical direction for each column, and a horizontal transfer unit for transferring the charges transferred from the vertical transfer unit in a horizontal direction, wherein each of the horizontal transfer units is an output unit. Is divided into a plurality of blocks having a plurality of transfer electrodes disposed on a semiconductor region via an insulating film, and the charge is applied to the output section by sequentially applying a drive pulse to the transfer electrodes. And at least one of the transfer electrodes has a longer pitch on the side in contact with the vertical transfer section than the pitch on the opposite side.

If the shape of the transfer electrodes of the horizontal transfer section is made in this manner, there is an area between the blocks where the transfer electrodes of the horizontal transfer section are not arranged. Therefore, there is a space for disposing the separation register without increasing the chip area by disposing the intermediate register. According to a second aspect of the present invention, in the multi-output solid-state imaging device according to the first aspect, the output unit includes a separation register disposed between the blocks, and a reading diode connected to the separation register. It is characterized by the following. The output unit includes at least a separation register and a reading diode. Further, the space between the blocks generated by the above configuration is preferably a space sufficient for arranging the entire separation register.

According to a third aspect of the present invention, in the multi-output solid-state imaging device according to any one of the first and second aspects, the at least one transfer electrode has a length in contact with a vertical transfer portion on the opposite side. It has a trapezoidal shape longer than its length. This configuration further restricts the shapes of the transfer electrodes having different pitches on the opposing sides, and is the configuration that is easiest to design.

According to a fourth aspect of the present invention, in the multi-output solid-state imaging device according to any one of the first to third aspects, the vertical transfer unit is a CCD or a CSD.

[0012]

(First Embodiment) FIG. 1 is a plan view of a multi-output solid-state imaging device according to a first embodiment of the present invention. The arrows in the figure indicate the direction in which signal charges are transferred. The present device 1 is a full frame transfer type CCD image sensor in which a vertical CCD 2 also serves as a light receiving unit. That is, one pixel (for example, reference numeral 3) has a light receiving unit disposed in the semiconductor region and a CCD electrode disposed on the light receiving unit via an insulating film. Normally, an image sensor has several hundred thousand pixels, but for simplicity of description, it is assumed here that there are 24 pixels in the horizontal direction and 6 pixels in the vertical direction, for a total of 144 pixels.

The pixels in one column form a vertical CCD,
Each vertical CCD is connected to a corresponding horizontal CCD 4 pixel (eg, 5). The horizontal CCD 4 includes a semiconductor region and a plurality of Cs arranged thereon via an insulating film.
It consists of a CD electrode and is divided into a plurality of blocks 4a, 4b, 4c. Therefore, the vertical CCD 2 is
2a, 2b, 2c corresponding to each block 4a, 4b, 4c
b, 2c.

Each pixel of the horizontal CCD 4 is substantially C
The area is defined by the shape of the CD electrode (transfer electrode).
As for the pitch of the horizontal CCD electrode, the pitch on the side in contact with the vertical CCD is equal to the horizontal pitch (d1) of the vertical CCD, and the pitch (d2) on the opposite side of the horizontal CCD electrode is shorter than the pitch. Each transfer electrode of the horizontal CCD 4 in the present device 1 has a trapezoidal planar shape as shown in FIG. A triangular space is formed between the blocks according to the pitch and shape of the CCD electrodes, and separation registers 6a, 6b, and 6c are arranged in the space. The separation register has a configuration in which CCD electrodes are arranged on a semiconductor region. Therefore, it is possible to secure a space for disposing the separation register without disposing the intermediate register and without increasing the chip area.

Read diodes 7a, 7b, 7c are arranged adjacent to the separation registers 6a, 6b, 6c. Furthermore, reset MOS transistors 8a, 8b, 8c and output amplifiers 9a, 9b, 9c are connected to the reading diodes 7a, 7b, 7c. Next, the operation of the present device 1 will be described. First, each pixel (for example, reference numeral 3) is in an integration mode, and light incident on a light receiving unit (here, a pixel) is photoelectrically converted to generate signal charges.
Stored.

In the transfer mode, a driving pulse signal is applied to each vertical CCD electrode, and the signal charges accumulated in each pixel flow through the vertical CCD 2 from above to below in the figure and are transferred to the horizontal CCD 4. At this time, the signal charges generated in the area 2a are transferred to the horizontal CCD in the block 4a. Similarly, the signal charges generated in 2b and 2c are 4
The data is transferred to the horizontal CCDs of the blocks b and 4c.

The horizontal CCDs 4a, 4b, 4c of each block
Is transferred from the left side to the right side of the drawing by applying a drive pulse signal to the horizontal CCD electrodes. The signal charges transferred to the right side of the horizontal CCDs 4a, 4b, 4c in each block are transferred to separation registers 6a, 6b, 6c arranged in each block.
The signal charges transferred to the separation registers 6a, 6b, 6c are transferred to the reading diodes 7a, 7b, 7c by applying a drive pulse to the transfer electrodes of the separation registers, and change their voltages. This voltage change is output to the outside of the chip of the image sensor by the output amplifiers 9a, 9b, 9c.

The reset MOS transistor 8
a, 8b and 8c are turned on to reset the reading diode. The device 1 is a full frame transfer type CCD image sensor. However, the present invention is not limited to this, as long as the horizontal transfer unit has a configuration in which the horizontal transfer unit is divided into a plurality of blocks and a separation register is arranged between the blocks. For example, the present invention is also applied to an interline image sensor.
In that case, the vertical transfer section is replaced by a CSD (char
If it is replaced with a ge sweeped device, the width of the vertical transfer unit can be narrowed, so that there is also an effect that the aperture ratio is improved or the number of pixels is improved.

Although the horizontal CCD and the separation register are CCDs here, the invention is not limited to this. For example, a configuration in which a CSD (charge sweeped device) is replaced can also achieve the object of the present invention and is within the scope of the present invention. . In the present apparatus 1, the final stage of the horizontal CCD has a general configuration.
A technique such as narrowing down the width of D may be applied. (Second Embodiment) FIG. 2 is a plan view of a multi-output solid-state imaging device according to a second embodiment of the present invention. The difference from the device 1 of the first embodiment is that in the device 1 described above, the pitch d2 of the horizontal CCD electrodes is the same for all pixels, whereas the multi-output solid-state imaging device 11 of the second embodiment is different. , The horizontal CCD electrode pitch is horizontal CC
This is different depending on the D pixel. For example, horizontal C
In the pixel 12a of the CD, the pitch of the transfer electrodes on the vertical CCD side is d3, and the pitch on the opposite side is d4, which is narrower.
The CCD electrode of this pixel has a trapezoidal shape, and is similar to the device 1. However, pixel 12b is a vertical CCD
Pitch d5 on the opposite side and pitch d6 on the opposite side are the same and CC
The D electrode is rectangular.

As described above, in the device 11 of the present embodiment, only some of the electrodes of the horizontal CCD have a trapezoidal shape. Even with such a configuration, a triangular space is formed between the blocks, and the separation registers 6a, 6b, and 6c can be arranged in the space. Therefore, it is possible to secure a space for disposing the separation register without disposing the intermediate register and without increasing the chip area.

In the above embodiment, the horizontal C
The trapezoidal CCD electrodes are arranged in each block of the CD. However, if they are arranged in at least one block, the effect of the present invention is produced. The other points are the same as those of the first embodiment, and the description is omitted.

[0022]

As described above, the vertical CC of the horizontal CCD electrode is
Since the pitch on the D side is longer than the pitch on the opposite side,
Even if the output of the horizontal CCD is multiplied, the separation register can be arranged between the horizontal CCD and the reading diode without providing an intermediate register as in the related art.

Also, various devices related to the conventional driving of the CCD, such as pinning a vertical CCD by a frame transfer method to reduce dark current, using an area sensor as a linear sensor in a binning operation, and using a shutter. The operation or the like can be applied to the present invention. Although the horizontal CCD of the present invention is arranged on only one side of the vertical CCD, it can be arranged on both sides for bidirectional operation.

Since the present invention is not related to the incident direction of light, the present invention can be applied to a general front-illuminated CCD and vice versa.

[Brief description of the drawings]

FIG. 1 is a plan view of a multi-output solid-state imaging device according to a first embodiment of the present invention.

FIG. 2 is a plan view of a multi-output solid-state imaging device according to a second embodiment of the present invention.

FIG. 3 is a plan view showing a conventional multi-output solid-state imaging device.

FIG. 4 is a plan view showing a conventional multi-output solid-state imaging device with improved initial pixel doping.

[Explanation of symbols]

 1, 11: Multi-output solid-state imaging device of the present invention 2, 42: Vertical CCD 3: Pixel (vertical CCD) 4, 34, 44: Horizontal CCD 5, 12: Pixel (horizontal) 6, 45: Separation register 7, 46: Reading diode 8, 35: Reset MOS transistor 9, 36: Output amplifier 31, 41: Conventional multi-output solid-state imaging device 32 ..Sensitive area 33 ... Non-sensitive area 43 ... Intermediate register

Claims (4)

[Claims] 1. A plurality of photoelectric conversion units that are arranged at a predetermined pitch in the horizontal and vertical directions and generate electric charges according to incident light, and a vertical unit that transfers electric charges generated by the photoelectric conversion units in a vertical direction for each column. A transfer unit; and a horizontal transfer unit configured to transfer the charges transferred from the vertical transfer unit in a horizontal direction. The horizontal transfer unit is divided into a plurality of blocks each having an output unit. A plurality of transfer electrodes disposed on the region with an insulating film interposed therebetween, and the charge is transferred to the output unit by sequentially applying a drive pulse to the transfer electrodes; at least one of the transfer electrodes is A multi-output solid-state imaging device, wherein a pitch on a side in contact with a transfer unit is longer than a pitch on an opposite side. 2. The multi-output solid-state imaging device according to claim 1, wherein the output unit includes a separation register disposed between the blocks, and a reading diode connected to the separation register. 3. The device according to claim 1, wherein the at least one transfer electrode has a trapezoidal shape in which a length in contact with the vertical transfer portion is longer than a length in the opposite side. 20. The multi-output solid-state imaging device according to claim 20. 4. The multi-output solid-state imaging device according to claim 1, wherein the vertical transfer unit is a CCD or a CSD.