JP2001102750A - Multilayer printed wiring board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board superior in heat cycle resistance characteristics and the manufacturing method thereof. SOLUTION: This multilayer printed wiring board comprises a layer insulation resin material for electrically insulating conductor circuits 4 formed on a core board 1, a resin insulating material for burying recesses defined by the core board surface and the side faces of the conductor circuits, and the same resin material for filling through-holes 9 as the resin insulating material. It is made by forming the through-holes through the core board, forming the conductor circuits on both sides of the apertured board, forming a roughened layer 11 on the surface and side faces of the conductor circuits and through-hole inner walls, pasting resin films on both sides of the core board having the roughened layer, and filling and curing the softened resin film in the recesses between the core board and the conductor circuits and the through-holes in prescribed heating and pressing conditions.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method for manufacturing the same, and more particularly, to a multilayer printed wiring board having excellent heat cycle resistance.

[0002]

2. Description of the Related Art In recent years, so-called build-up multilayer wiring boards have been receiving attention due to a demand for higher density of the multilayer wiring boards. This build-up multilayer wiring board is manufactured by a method disclosed in, for example, Japanese Patent Publication No. 4-55555. That is, on the core substrate, an insulating material made of a photosensitive electroless plating adhesive is applied, and dried and then exposed and developed to form an interlayer insulating material layer having a via hole opening, After roughening the surface of the interlayer insulating material layer by treatment with an oxidizing agent or the like, a plating resist is provided on the roughened surface, and then electroless plating is performed on a non-resist forming portion to form a via hole and a conductor circuit. By forming and repeating such steps a plurality of times, a multilayered build-up wiring board can be obtained. In such a multilayer printed wiring board, further multilayering can be achieved by providing through holes in the core substrate and connecting the conductor circuits in the inner layers. In this type of multilayer printed wiring board having a through hole in a core substrate, first, an inner layer conductor circuit including the through hole is formed in the core substrate, and then the inner wall surface of the through hole and the surface of the inner layer conductor circuit are roughened by oxidation-reduction treatment. After the passivation layer is provided, the through holes are filled with a resin filler and the recesses between the inner conductor circuits are also filled with the resin filler, and the surface of the substrate is flattened by polishing. Rough plating such as an alloy plating made of copper-nickel-phosphorus manufactured by Nissan Co., Ltd. is performed, and a resin insulating agent is applied on the roughened plating or bonded in a sheet shape to form an interlayer resin insulating layer.

However, in such a method, the resin filling in the through-hole, the resin filling in the recess between the inner conductor circuits and the formation of the interlayer resin insulating layer are different from each other. Since it was performed in separate processes using materials, the number of manufacturing processes increased by that much, and complicated management such as the viscosity of each resin insulating material to be filled was necessary, and eventually the manufactured multilayer printed wiring board was This was driving up costs. In addition, due to a heat cycle test or thermal shock, at the interface between each resin filler and the interlayer resin insulation layer, peeling or cracking occurs due to a difference in thermal expansion coefficient between each resin insulation material and the interlayer resin insulation material. There were also problems. Further, in such a method, after embedding the resin filler, a part of the inner conductor circuit is removed by a polishing process performed for flattening the resin surface, or a cutting stress during the polishing process is reduced. There is also a problem that cracks are more likely to be generated due to the residue of the steel. The present invention has been made in order to solve the above-described problems of the prior art, and the object is to
An object of the present invention is to propose a multilayer printed wiring board in which peeling or cracking caused by a difference in thermal expansion coefficient between a resin filler and an interlayer resin insulating material under conditions such as a heat cycle is prevented, and a method of manufacturing the same.

Means for Solving the Problems The inventors of the present invention have conducted intensive studies to achieve the above-mentioned object, and as a result, have found that a resin filler filled in the through-hole and a resin filler filled in the recess between the inner conductor circuits are formed. It has been found that if the same resin material is used for the interlayer resin insulating layer, it is possible to prevent the occurrence of peeling and cracks due to the difference in thermal expansion coefficient, and to complete the present invention having the following configuration as a summary configuration. Reached. (1) That is, according to the present invention, a conductor circuit of an outer layer is formed on a conductor circuit formed on both sides of a core substrate via a resin insulating layer, and an electric connection between the conductor circuits located on both sides of the core substrate is provided. In the multilayer printed wiring board in which the electrical connection is performed by through holes formed in the core substrate, the resin insulating layer is formed of the same resin material, and
A through hole defined by a concave portion defined by the core substrate surface and a side surface of the conductor circuit and an inner wall of the through hole is filled. In the multilayer printed wiring board, the resin insulating layer is desirably formed from a resin film that softens under predetermined heating conditions, and the resin film is mainly made of a thermosetting polyolefin resin or epoxy resin. It is desirable to be formed from a resin as a component. (2) Further, according to the present invention, a conductor circuit of an outer layer is formed on a conductor circuit formed on both surfaces of a core substrate via a resin insulating layer, and a conductor circuit disposed on both sides of the core substrate is provided. In the method for manufacturing a multilayer printed wiring board in which electrical connection is performed by through holes formed in the core substrate, at least the following steps (a) to (d), that is, (a) a through hole penetrating the core substrate A step of forming a hole, (b) a step of forming a conductor circuit on each side of the core substrate where the through hole is opened, and (c) forming a roughened layer on the surface and side surfaces of the conductor circuit and on the inner wall surface of the through hole. Step, (d) pasting a resin film on both surfaces of the core substrate on which the roughened layer is formed, softening under predetermined heating conditions, or simultaneously after softening, pressing with a predetermined pressure, the core substrate Surface and inner conductor A method for manufacturing a multilayer printed wiring board, comprising: a step of filling a softened resin film into a through-hole defined by an inner wall surface of a recess and a through-hole defined by a side surface of a circuit, and curing the resin film. is there. The resin film in the step (d) includes:
It is preferably formed from a resin containing a thermosetting polyolefin resin or an epoxy resin as a main component. In the step (d), the hot pressing of the resin film containing a polyolefin resin as a main component is performed at a temperature of 50 to 2.
50 ° C., pressure 1-50 kgf / cm ² , press time 1-12
It is preferable to carry out under the condition of 0 minutes. Further, in the step (d), the heating press of the resin film containing an epoxy resin as a main component is performed at a temperature of 50 to 200 ° C. and a pressure of 1 to 200 ° C.
It is preferable to carry out under the conditions of 50 kgf / cm ² and a press time of 1 to 70 minutes. In the method for manufacturing a multilayer printed wiring board, the formation of the roughened layer in the step (c) is preferably performed by the same type of roughening treatment, and in particular, oxidation-reduction treatment, plating treatment (interplate),
It is preferable to perform the etching by any one of the etching processes (CZ process). Further, the heating press in the step (d) is preferably performed by pressing a metal plate or a metal roll while heating the resin film.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The multilayer printed wiring board according to the present invention is characterized in that the interlayer resin insulating layer is formed of the same resin material, and the recesses and through holes defined by the surface of the core substrate and the side surfaces of the inner conductor circuit. Is to fill the through hole defined by the inner wall surface. That is, it is defined by the resin material covering the inner layer conductor circuit provided on the core substrate and the outer layer conductor circuit formed outside thereof, and the concave portion between the inner layer conductor circuits, that is, by the core substrate surface and the side surface of the inner layer conductor circuit. The resin material filled in the concave portion and the resin material filled in the through hole defined by the inner wall of the through hole are made of the same type of resin. According to such a configuration, at the interface between the filler filled in the recess between the inner conductor circuits and the interlayer resin insulating layer, and at the interface between the filler filled into the through hole of the through hole and the interlayer resin insulating layer. Peeling and generation of cracks can be prevented. The resin insulation layer is
It is desirable that the resin film be formed from a resin film that softens under predetermined heating conditions, for example, a resin film containing a thermosetting polyolefin resin or an epoxy resin as a main component. As the polyolefin resin, a cycloolefin resin as one of them can be used. Since the cycloolefin resin has a low dielectric constant and a low dielectric loss tangent, even when a high-frequency signal in a GHz band is used, signal propagation delay and error hardly occur.
This is because they have excellent mechanical properties such as rigidity. The cycloolefin resin is preferably a homopolymer or copolymer of a monomer composed of 2-norbornene, 5-ethylidene-2-nobornene or a derivative thereof.
Examples of the derivative include a derivative in which an amino acid residue for forming a crosslink or a maleic acid-modified derivative is bonded to a cycloolefin such as 2-norbornene. Examples of monomers for synthesizing the copolymer include ethylene and propylene. Among them, a thermosetting cycloolefin resin is preferable.
This is because, by performing the heating to form the crosslinks, the rigidity is increased and the mechanical properties are improved. A resin film containing such a polyolefin-based resin as a main component,
It is a preferred embodiment to form by hot pressing at a temperature of 50 to 250 ° C., a pressure of 1 to 50 kgf / cm ² , and a pressing time of 1 to 120 minutes. Furthermore, the thickness of the resin film is determined in consideration of the thickness of the inner layer conductor circuit, the aspect ratio of the through hole, curing shrinkage, etc., and the resin material softened by the hot press almost completely fills the through hole of the through hole. It is desirable to select a range that can be filled. Hereinafter, a method for manufacturing a multilayer printed wiring board according to the present invention will be specifically described with reference to an example. (1) Formation of Through Hole and Inner Layer Conductor Circuit First, a substrate having a metal layer formed on both surfaces is prepared, and a through hole is drilled in the substrate. This is performed by performing electrolytic plating. Here, as the substrate, a resin substrate such as a glass epoxy substrate, a polyimide substrate, a bismaleimide-triazine resin substrate, a fluororesin substrate, or a copper-clad laminate, a ceramic substrate, or a metal substrate of these resin substrates is used. Can be. In particular, when the dielectric constant is considered, it is preferable to use a double-sided copper-clad fluororesin substrate. This substrate is obtained by thermocompression bonding a copper foil having one surface roughened to a fluororesin substrate such as polytetrafluoroethylene. As the electroless plating, copper plating is preferred. In the case of a substrate such as a fluororesin substrate, which has poor plating coverage, a surface treatment such as a pretreatment agent (manufactured by Junko Co., trade name: Tetra etch) made of organometallic sodium or plasma treatment is performed. Next, electrolytic plating is performed for thickening. As this electrolytic plating, copper plating is preferable. The surface of the substrate on which the electroless plating and the electrolytic plating are formed is etched in a pattern according to a conventional method to form an inner conductor circuit and a through-hole land, thereby obtaining a core substrate. As the etchant, an aqueous solution of sulfuric acid-hydrogen peroxide, an aqueous solution of persulfate such as ammonium persulfate, sodium persulfate, or potassium persulfate, or an aqueous solution of ferric chloride or cupric chloride is preferable. (2) Formation of Roughened Layer The same type of roughened layer is formed on the inner wall of the through hole of the through hole of the core substrate, the upper surface and the side surface of the through hole land, and the upper surface and the side surface of the inner conductor circuit. Examples of such a roughened layer include a roughened layer formed by an oxidation-reduction treatment, a roughened layer formed by processing with an etching solution called “MEC etch bond” manufactured by MEC, or an alloy plating made of copper-nickel-phosphorus. There is a roughened layer (for example, an Interplate manufactured by EBARA Uzilite). The roughened layer formed by the oxidation-reduction treatment may be, for example, NaOH (20 g / l) as an oxidation bath,
NaClO ₂ (50 g / l), aqueous solution of Na ₃ PO ₄ (15.0 g / l),
NaOH (2.7 g / l), NaBH ₄ (1.0 g /
It is formed using the aqueous solution of 1). The solution composition of the plating aqueous solution of the copper-nickel-phosphorus needle-shaped alloy has a copper ion concentration, a nickel ion concentration, and a hypophosphite ion concentration of 2.2 × 10 ^{−2 to} 4.1 × 10 ⁻² mol / l, respectively. , 2.2 ×
It is desirably 10 ⁻³ to 4.1 × 10 ⁻³ mol / l and 0.20 to 0.25 mol / l. This is because the crystalline structure of the film deposited in this range has a needle-like structure, and thus has an excellent anchor effect. In addition, a complexing agent or an additive may be added to the electroless plating bath in addition to the above compounds. Further, the roughened layer by the etching treatment is formed using a mixed aqueous solution of a cupric complex and an organic acid.
For example, an aqueous solution is prepared by mixing 10 parts by weight of an imidazole copper (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride. In the present invention, since the upper and side surfaces of the inner conductor circuit including the through hole land and the inner wall surface of the through hole of the through hole are simultaneously roughened, the manufacturing process of the multilayer printed wiring board can be shortened, and the manufacturing cost can be reduced. At the same time, it is possible to prevent the occurrence of cracks caused by the difference in the roughening mode. (3) Formation of interlayer resin insulation layer A resin film for forming an interlayer resin insulation layer is stuck on the substrate roughened in (2) above. As this resin insulating material, a film-like resin having a predetermined thickness, which is mainly composed of a thermosetting polyolefin resin or epoxy resin, is used. As described above, the thickness of the resin film is determined in consideration of the thickness of the inner conductor circuit, the aspect ratio of the through hole, the curing shrinkage, and the like, and is 10 to 100 μm. Next, the resin film stuck on the substrate is pressed while heating using a metal plate or a metal roll (heating press).
Then, the resin material is softened. The metal plate and metal roll used here are preferably made of stainless steel. The reason is that it has excellent corrosion resistance. The heating press is performed by sandwiching the substrate on which the resin film is affixed with a metal plate or a metal roll, and pressing in a heating atmosphere. This heating press softens the resin insulating material, and the softened resin material passes through. The resin flows into the recesses between the inner conductor circuits including the hole lands and the through holes of the through holes, and is almost completely filled, and the surface of the resin insulating material layer is flattened. Note that this heating press step is preferably performed under reduced pressure. The heating temperature, the pressing pressure, and the pressing time in the above-mentioned hot pressing step differ depending on the resin contained in the resin insulating material. For example, when using a resin film containing a polyolefin-based resin as a main component, the heating temperature:
It is desirable that the temperature is 50 to 250 ° C., the pressing pressure is 1 to 50 kgf / cm ² , and the pressing time is 1 to 120 minutes. The reason for adding the above-mentioned limitation to the heating press conditions is that when the heating temperature is less than 50 ° C., the pressing pressure is less than 1 kgf / cm ² , and the pressing time is less than 1 minute, the fluidized resin is This is because the through-holes are not sufficiently filled. On the other hand, if the heating temperature exceeds 250 ° C., the core material is damaged. If the pressing pressure exceeds 50 kgf / cm ² , the resin will protrude. This is because if the pressing time exceeds 120 minutes, there is a problem in productivity. When a resin containing an epoxy resin as a main component is used, the heating temperature is 50 to 200 ° C., and the pressing pressure is 1 to 1.
It is preferable that the heating time is 50 kgf / cm ² and the heating time is 1 to 70 minutes. The reason why such heating press conditions are limited is the same as in the case of a resin film containing a polyolefin resin as a main component. . In this embodiment, the resin material is pressed while being heated to soften the resin material. However, it is also possible to first apply a predetermined pressure to the resin film and then heat it to soften it. Then, the resin insulating material whose surface is flattened by the heat press is cured to form an interlayer resin insulating layer. (4) Formation of Via Hole and Outer Layer Conductor Circuit In the interlayer resin insulating layer formed in the above (3), between the inner layer conductor circuit and the outer layer conductor circuit (to be formed later) or the outer layer conductor circuit and the through hole land An opening for forming a via hole is provided in order to secure electrical connection with the substrate. The opening for forming the via hole is formed by laser beam irradiation. At this time, as a laser beam to be used, a carbon dioxide gas laser, an ultraviolet laser, an excimer laser, or the like is used, but processing by a carbon dioxide gas laser is preferable.
The irradiation condition of the carbon dioxide laser is such that the pulse energy is 0.5 to 200 mJ and the pulse width is 10 ⁻⁸ to 10 ^−3.
μs, pulse interval 0.1 ms or more, shot number 1
Desirably, it is 100. After the opening is formed by such laser beam irradiation, a desmear process is performed. This desmear treatment can be performed using an oxidizing agent composed of an aqueous solution such as chromic acid or permanganate, or may be performed using oxygen plasma or the like. Next, in the opening for via hole formation and on the surface of the interlayer resin insulation layer, by plating or sputtering, etc.
A thin conductor layer is formed. In the case of forming by plating, first, a catalyst nucleus for electroless plating is applied to the interlayer resin insulating layer. Generally, the catalyst core is a palladium-tin colloid, and the substrate is immersed in this solution, dried, and heat-treated to fix the catalyst core on the resin surface. Further, a metal nucleus can be used as a catalyst nucleus by being driven into the resin surface by CVD, sputtering, or plasma. In this case, a metal nucleus is embedded in the resin surface, and plating is deposited around the metal nucleus to form a conductor circuit, so that adhesion can be ensured.
The metal nucleus is preferably at least one selected from palladium, silver, gold, platinum, titanium, copper and nickel. The amount of metal nuclei is preferably 20 μg / cm ² or less. If the amount exceeds this amount, metal nuclei must be removed. Then, electroless plating or sputtering is performed to form a thin electroless plating film or sputtered film in the via hole forming opening and on the surface of the interlayer resin insulating layer. At this time, the thickness of the electroless plating film or the sputtered film is 0.1 to 5 μm, more preferably 0.5 to 5 μm.
2.0 μm. Next, a plating resist is formed on the electroless plating film or the sputtered film. As the plating resist composition, it is particularly desirable to use a composition comprising an acrylate of a cresol novolak type epoxy resin or an acrylate of a phenol novolak type epoxy resin and an imidazole curing agent. Alternatively, a commercially available dry film may be used. Next, the substrate on which the electroless plating film was formed was
Rinse with water at 5 ° C, preferably 15-30 ° C. The reason is that if the washing temperature exceeds 35 ° C., water evaporates, the surface of the electroless plating film is dried and oxidized, and the electrolytic plating film does not deposit. For this reason, the electroless plating film is dissolved by the etching process, and a portion where no conductor exists is generated. On the other hand, if the temperature is lower than 10 ° C., the solubility of the contaminant in water decreases, and the detergency decreases. In particular, when the diameter of the land of the via hole is 200 μm or less, the plating resist repels water, so that water is easily volatilized, and the problem that electrolytic plating is not deposited easily occurs. In addition, various surfactants, acids, and alkalis may be added to the washing water. After the cleaning, the substrate may be washed with an acid such as sulfuric acid. Next, electrolytic plating is performed on the non-formed portions of the plating resist to provide an outer conductor circuit and a conductor layer serving as a via hole. Here, it is desirable to use copper plating as the electrolytic plating, and its thickness is preferably 10 to 20 μm. Furthermore, after removing the plating resist, an electroless plating film or a sputtered film under the plating resist is dissolved and removed with an etching solution comprising a mixed solution of sulfuric acid and hydrogen peroxide or an aqueous solution of sodium persulfate, ammonium persulfate, etc.
Electroless plating film or sputtering film and electrolytic plating film 2
An independent outer conductor circuit composed of layers and via holes are obtained. (5) Multilayering of Wiring Board After forming a roughened layer on the surface of the outer conductor circuit formed in the above (4), the above steps (3) and (4) are repeated to further provide an outer conductor circuit. Thus, a predetermined multilayer printed wiring board is manufactured.

[Electroless plating aqueous solution]

EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l [Electroless plating conditions] 30 minutes at a liquid temperature of 70 ° C. (6) A commercially available photosensitive dry film is stuck on the electroless plating film 12 formed in the above (5), a mask is placed, exposed at 100 mJ / cm ² , developed with 0.8% sodium carbonate, A plating resist 3 having a thickness of 15 μm was provided (FIG. 1).
0). (7) Then, the substrate is washed with water at 50 ° C., degreased, washed with water at 25 ° C., further washed with sulfuric acid, and then subjected to electrolytic copper plating under the following conditions to obtain a 20 μm thick electrolytic copper. Plating film 13
Was formed (see FIG. 11). (7) After the plating resist 3 is peeled off with a 5% KOH aqueous solution, the electroless copper plating film 12 under the plating resist is dissolved and removed by etching treatment with a mixed solution of sulfuric acid and hydrogen peroxide, and the electroless copper plating is performed. 18 μm-thick outer conductor circuit (including via holes) consisting of film 12 and electrolytic copper plating film 13
5 was formed (see FIG. 12). (8) The substrate on which the outer conductor circuit 5 is formed is made of copper sulfate 8 g /
1, 0.6 g / l of nickel sulfate, 15 g / l of citric acid, 29 g / l of sodium hypophosphite, 31 g / l of boric acid, 0.1 g / l of surfactant (Sufinol 465, manufactured by Nissin Chemical Industry Co., Ltd.)
Immersed in an electroless plating solution of pH = 9 consisting of an aqueous solution of
A roughened layer 11 made of copper-nickel-phosphorus having a thickness of 3 μm was formed on the surface of the conductor circuit (see FIG. 13). At this time, when the formed roughened layer was analyzed by EPMA (X-ray fluorescence spectrometer), Cu: 98 mol%, Ni: 1.5 mol%, P:
The composition ratio was 0.5 mol%. (9) By repeating the above steps (3) to (8), a conductor circuit of an outer layer was further formed to obtain a multilayer wiring board. (See FIGS. 14 to 19). (10) On the other hand, 60% by weight of cresol novolac type epoxy resin (manufactured by Nippon Kayaku) dissolved in DMDG, 50% of epoxy groups
Of photosensitizing oligomers (molecular weight 400
0) was dissolved in 46.67 parts by weight of methyl ethyl ketone
15.0 parts by weight of 0 wt% bisphenol A type epoxy resin (manufactured by Yuka Shell, Epicoat 1001), 1.6 parts by weight of imidazole curing agent (manufactured by Shikoku Chemicals, 2E4MZ-CN), polyacrylic monomer which is a photosensitive monomer (Nippon Kayaku) Made, R604) 3
Parts by weight, similarly polyvalent acrylic monomer (manufactured by Kyoeisha Chemical,
DPE6A) 1.5 parts by weight, dispersion antifoaming agent (manufactured by San Nopco,
S-65) 0.71 part by weight was mixed, and benzophenone (manufactured by Kanto Chemical Co., Ltd.) as a photoinitiator was added to the mixture.
By adding 0.2 parts by weight of Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer, a solder resist composition was obtained. (11) The solder resist composition was applied to both sides of the multilayer wiring board obtained in (9) in a thickness of 20 μm. Next, after performing a drying process at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, a 5 mm-thick soda lime glass substrate on which a circular pattern (mask pattern) of a solder resist opening is drawn by a chromium layer is placed on a chrome layer. The side on which the layer was formed was brought into close contact with the solder resist layer, exposed to ultraviolet light of 1000 mJ / cm ² , and subjected to a DMTG development treatment. In addition, at 80 ° C for 1 hour, 100 ° C
For 1 hour, 120 ° C for 1 hour, and 150 ° C for 3 hours to form a solder resist pattern layer (thickness: 20 μm) 14 with openings (opening diameter: 200 μm) on the upper surface of the solder pad, via holes and lands. did. (12) Next, the substrate having the solder resist pattern layer formed thereon was treated with 30 g / l of nickel chloride and 10 g of sodium hypophosphite.
g / l, and immersed in an electroless nickel plating solution of pH 5 consisting of an aqueous solution of sodium citrate 10 g / l for 20 minutes,
A nickel plating layer 15 having a thickness of 5 μm was formed in the opening. Further, the substrate was treated with 2 g of potassium potassium cyanide /
l, ammonium chloride 75 g / l, sodium citrate 50
A gold plating layer 16 having a thickness of 0.03 μm was formed on the nickel plating layer by immersing it in an electroless gold plating solution composed of an aqueous solution of g / l and sodium hypophosphite 10 g / l at 93 ° C. for 23 seconds. . (13) Then, a solder paste is printed on the opening of the solder resist pattern layer and reflowed at 200 ° C. to form a solder bump (solder body), thereby manufacturing a multilayer printed wiring board having the solder bump 17 ( See FIG. 20). (Example 2) When forming an interlayer resin insulation layer, a thickness of 25 μm made of a resin insulation material containing 80% by weight of an epoxy resin.
After adhering the resin film of
Pressurize at kgf / cm ² and heat at 100 ° C in
A four-layer wiring board was manufactured in the same manner as in Example 1 except that the heating and pressing were performed for one minute. (Comparative Example 1) (1) A copper-clad laminate obtained by laminating a copper foil 8 of 18 μm on both sides of a substrate 1 made of BT (bismaleimide triazine) resin having a thickness of 0.8 mm was used as a starting material (FIG. 21).
reference). First, the copper-clad laminate was drilled, subjected to electroless plating, and etched in a pattern to form inner layer conductor circuits 4 and through holes 9 on both surfaces of the substrate 1. The surfaces of the inner conductor circuit 4 and the through hole 9 are oxidized (blackened) and reduced to roughen the surface (see FIG. 22).
After filling bisphenol F type epoxy resin as the filling resin 20 between the conductor circuits and in the through holes (see FIG. 23), the substrate surface is polished until the conductor circuit surface and the land surface of the through hole are exposed and flattened. (See FIG. 24). (2) After the substrate subjected to the treatment of (1) is washed with water and dried, the substrate is acid-degreased and soft-etched,
Then, the catalyst is treated with a catalyst solution comprising palladium chloride and an organic acid to give a palladium catalyst, and after activating the catalyst, copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g / l, and Sodium phosphite 29g / l, boric acid
Plating is performed in an electroless plating bath consisting of 31 g / l, surfactant 0.1 g / l, and pH = 9, and the exposed surface of the copper conductor circuit is made of a Cu-Ni-P alloy and roughened to a thickness of 2.5 μm. Layer 11
1 (uneven layer) was formed. In addition, the substrate is
/ L tin borofluoride-1.0 mol / l immersion in an electroless tin displacement plating bath consisting of a thiourea solution at 50 ° C for 1 hour to form a 0.3 μm thick tin displacement plating layer on the surface of the roughened layer 11. (See FIG. 25, but the tin layer is not shown). (3) A thermosetting polyolefin resin sheet having a thickness of 40 μm is laminated on both sides of the substrate by heating and pressing at a pressure of 10 kg / cm ² while raising the temperature to 120 ° C., and an interlayer resin made of polyolefin resin. An insulating layer 22 was provided (FIG. 26).
reference). (4) Using a carbon dioxide gas laser having a wavelength of 10.4 μm, under the irradiation conditions of pulse energy of 1.5 mJ, pulse width of 10 ⁻⁵ μs, pulse interval of 0.1 ms or more, and shot number of 6, polyolefin-based Resin insulation layer 2 made of resin
2 was provided with a via hole opening 6 having a diameter of 60 μm (FIG. 2).
7). Thereafter, the same processing as in the above (5) to (13) of Example 1 was performed to manufacture a four-layer wiring board. Thus, the multilayer printed wiring boards manufactured according to Example 1, Example 2 and Comparative Example 1 were subjected to 1000-1000C at -55 to 125 ° C.
The heat cycle test was performed twice, and the presence or absence of cracks in the interlayer resin insulating layer was confirmed by an optical microscope. As a result, no cracks were observed in Examples 1 and 2, and cracks were observed in Comparative Example 1.

As described above, according to the present invention, the insulating material that fills the through hole of the through hole, the insulating material that fills the recess between the conductor circuits, and the insulating material that forms the interlayer resin insulating layer are the same. Since it is formed of resin, it is necessary to effectively prevent the occurrence of cracks due to the difference in the coefficient of thermal expansion of the resin material at the interface between the conductive circuit including the through-hole lands and the interlayer resin insulating layer as in the related art. Can also be
Since the step of forming the interlayer resin insulating layer is significantly simplified, the manufacturing cost is greatly reduced.

[Brief description of the drawings]

FIG. 1 is a first embodiment of a multilayer printed wiring board according to the present invention.
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 2 is a first embodiment of a multilayer printed wiring board according to the present invention;
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 3 is a first embodiment of a multilayer printed wiring board according to the present invention;
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 4 is a first embodiment of a multilayer printed wiring board according to the present invention;
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 5 is a first embodiment of a multilayer printed wiring board according to the present invention;
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 6 is a first embodiment of a multilayer printed wiring board according to the present invention;
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 7 is a first embodiment of a multilayer printed wiring board according to the present invention.
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 8 is a first embodiment of a multilayer printed wiring board according to the present invention.
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 9 is a first embodiment of a multilayer printed wiring board according to the present invention.
FIG. 7 is a view showing a part of the manufacturing process.

FIG. 10 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 11 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 12 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 13 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 14 is a diagram illustrating a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention;

FIG. 15 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 16 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 17 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 18 is a diagram illustrating a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention;

FIG. 19 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 20 is a diagram showing a part of the manufacturing process of the multilayer printed wiring board according to the first embodiment of the present invention.

FIG. 21 is a diagram illustrating a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

FIG. 22 is a diagram showing a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

FIG. 23 is a diagram showing a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

FIG. 24 is a diagram showing a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

FIG. 25 is a diagram showing a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

FIG. 26 is a diagram showing a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

FIG. 27 is a diagram showing a part of the manufacturing process of Comparative Example 1 of the multilayer printed wiring board according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Resin insulating layer 3 Etching resist 4 Inner layer conductor circuit 5 Outer layer conductor circuit 6 Via hole formation opening 7 Via hole 8 Copper foil 9 Through hole 10 Through hole land 11 Roughened layer 12 Electroless copper plating film 13 Electrolytic copper plating film 14 Solder resist layer 15 Nickel plating layer 16 Gold plating layer 17 Solder bump 19 Press plate

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Koji Sekine 1-1, Ibigawa-cho, Ibi-gun, Gifu Prefecture Ibiden Co., Ltd. Ogaki-Kita Plant F-term (reference) 5E346 AA06 AA12 AA15 AA25 AA26 AA32 AA38 AA43 BB01 BB16 CC08 CC09 CC31 CC32 CC37 CC38 CC40 DD02 DD22 DD33 DD47 EE33 EE35 EE38 FF03 FF12 GG15 GG17 GG23 GG25 GG27 GG28 HH11 HH18 HH32

Claims (10)

[Claims] An outer conductor circuit is formed on a conductor circuit formed on both sides of a core substrate via a resin insulating layer, and electrical connection between the conductor circuits disposed on both sides of the core substrate is established. In a multilayer printed wiring board formed by through holes formed in a core substrate, the resin insulating layer is formed of the same type of resin material,
And a through hole defined by a recess defined by a side surface of the inner conductor circuit including the through hole land and a surface of the core substrate and a through hole defined by an inner wall of the through hole. 2. The multilayer printed wiring board according to claim 1, wherein the resin insulating layer is formed of a resin film that softens under a predetermined heating condition. 3. The multilayer printed wiring board according to claim 2, wherein the resin insulating layer is formed from a resin film containing a thermosetting polyolefin resin or an epoxy resin as a main component. 4. An outer layer conductor circuit is formed on a conductor circuit formed on both surfaces of the core substrate via a resin insulating layer, and electrical connection between the conductor circuits disposed on both sides of the core substrate is established. In a method of manufacturing a multilayer printed wiring board as performed by through holes formed in a core substrate, at least the following steps (a) to (d),
(a) forming a through hole through the core substrate,
(b) a step of forming an inner-layer conductor circuit on each side of the core substrate where the through-hole is opened, and (c) roughening the upper and side surfaces of the inner-layer conductor circuit including the through-hole lands and the inner wall surface of the through-hole. Forming a layer, (d) pasting a resin film on the surface of the core substrate on which the roughened layer is formed, softening the resin film under predetermined heating conditions, or simultaneously with or after softening, a predetermined pressure. And filled with a softened resin film in a recess defined by the side surface of the inner layer conductor circuit including the through hole land and the substrate surface, and a through hole defined by the inner wall surface of the through hole, and cured. A method for manufacturing a multilayer printed wiring board, comprising: 5. The method according to claim 4, wherein the resin film in the step (d) is formed mainly of a thermosetting polyolefin resin or epoxy resin. Method. 6. The heating press of the resin film containing a polyolefin resin as a main component in the step (d) is performed at a temperature of 5 ° C.
0-250 ° C, pressure 1-50kgf / cm ² , press time 1
6. The method according to claim 5, wherein the step is performed under a condition of about 120 minutes.
3. The method for producing a multilayer printed wiring board according to item 1. 7. The heating press of the resin film containing an epoxy resin as a main component in the step (d) is carried out at a temperature of 50 to 50.
200 ° C, pressure 1-50kgf / cm ² , press time 1-7
The method according to claim 5, wherein the method is performed under a condition of 0 minute. 8. The method for manufacturing a multilayer printed wiring board according to claim 4, wherein the formation of the roughened layer in the step (c) is performed by the same type of roughening treatment. Method. 9. The multilayer printed wiring board according to claim 8, wherein the formation of the roughened layer in the step (c) is performed by any one of an oxidation-reduction treatment, a plating treatment and an etching treatment. Manufacturing method. 10. The production of a multilayer printed wiring board according to claim 4, wherein the step (d) is performed by pressing a metal plate or a metal roll while heating the resin film. Method.