JP2001168808A - Optical receiver - Google Patents

Abstract

(57) Abstract: In a data / clock recovery unit of an optical receiver, when input data patterns are 0, 1, 0, 1 patterns, the clock speed frequency of the input data may deviate from the pull-in range, There is a problem that when 0, 1, 0, 1 patterns are transmitted in a transmission test or the like at the time of system operation, a cycle cannot be established, and data and a clock synchronized with input data cannot be reproduced. SOLUTION: A pulse generating circuit is provided, and a pulse signal is generated from the pulse generating circuit at a timing when synchronization is necessary such as when an optical signal is detected, and the pulse signal is input to a VCO in a data / clock reproducing unit. The pull-in range is expanded by superimposing it on the control voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical receiver used in optical fiber communication.

[0002]

2. Description of the Related Art With the advance of advanced information technology, the amount of information communication has rapidly increased, and information contents have been diversified, such as telephones, faxes, data, images, and the like. I have. However, an existing communication network mainly using a metallic cable cannot sufficiently cope with a large amount of various information communication needs, and thus a high-speed broadband communication network using an optical fiber cable is being constructed. In optical fiber communications, transmission speeds of tens of Mbps in the early 1980s have already been increased to 10 Gb / s.
It has been put to practical use as a high-speed system of ps. In the future, the transmission speed will be increased in order to cope with the further increase in the amount of information communication, and accordingly, the optical transceiver, which is a main component of the optical fiber communication network, will also be accelerated.

FIG. 13 is a block diagram showing a configuration example of a conventional optical receiver. Reference numeral 1 denotes an optical / electrical conversion unit for converting a received optical signal into an electric signal, and reference numeral 2 denotes a signal from the optical / electrical conversion unit 1. A data / clock reproducing unit for reproducing data and a clock from an optical / electrical converting unit 1 and a data / clock reproducing unit 2
And a control unit for monitoring the operation state of other devices in the optical receiver and performing necessary control, a power supply unit for converting a power supply supplied from outside to a required voltage in the optical receiver, and a light source unit for optical control. An optical receiver composed of a / electric conversion unit 1, a data / clock recovery unit 2, a control unit 3, and a power supply unit 4, and 6 is an optical fiber. FIG. 14 is a block diagram showing the internal configuration of the data / clock recovery unit 2 of the optical receiver 5 shown in FIG. 13, where 7 is a flip-flop for retiming the input data, and 8 is the input data and the flip-flop 7. A comparator 9 compares the retimed data with the phase difference. A low-pass filter (LP) 9 smoothes an output signal of the comparator 8.
F) and 10 are voltage controlled oscillators (VCOs) that vary the oscillation frequency by the control voltage from the LPF 9. FIG.
14 is a diagram showing the relationship between the LPF output voltage and the pull-in frequency when a random pattern is input and 0, 1, 0, and 1 patterns are input in the data / clock recovery unit 2 in FIG.
11 is an input voltage-output frequency characteristic curve of the VCO 10,
12 is a pull-in range when a random pattern is input, 13
Is a pull-in range when 0, 1, 0, 1 pattern is input.

Next, the operation will be described. Optical fiber 6
Is converted into an electric signal by the optical / electrical conversion unit 1. The data / clock reproducing unit 2 divides the input electric signal into two data signals, one of which is input to the flip-flop 7 and the other is input to the comparator 8. In the flip-flop 7, the input data signal is retimed by the clock signal input from the VCO 10 and input to the comparator 8. The comparator 8 compares the phase of the directly input data signal with the phase of the data signal retimed by the flip-flop 7, and outputs a difference signal to the LPF 9. The LPF 9 smoothes the input difference signal and
Output to CO10. The VCO 10 oscillates a clock signal having a frequency corresponding to the input voltage. When the phase difference between the directly input data signal and the data signal retimed by the flip-flop 7 becomes 0 in the comparator 8,
The difference signal becomes 0. At this time, the VCO output voltage becomes constant, the VCO output frequency is fixed, synchronization is completed,
The data and clock synchronized with the input data are reproduced.

[0005] Here, the data /
The difference in the pull-in range between the 0, 1, 0, 1 pattern and the random pattern in the clock reproducing unit will be described. For the 0, 1, 0, 1 pattern, the data frequency is half the clock speed. On the other hand, in the case of a random pattern, the occurrence probability of 0 or 1 is １ ／, but 0 may be continuous for several bits or 1 may be continuous for several bits, and the frequency components of the data are 0, 1, 0, Compared to one pattern, the number of low frequency components increases. Therefore, the comparator 8
The output of the comparator 8 varies depending on the data pattern even if the phase difference between the data signal directly input to the flip-flop 7 and the data signal input after retiming by the flip-flop 7 is the same. Therefore, the pull-in range 12 in the random pattern is different from the pull-in range 13 in the 0, 1, 0, 1 pattern as shown in FIG. At the time of actual data transmission, since the data pattern becomes close to a random pattern due to scrambling or the like, tuning of the pull-in range is performed with a random pattern.

[0006]

The data / clock recovery section 2 of the conventional optical receiver is configured as described above, and the pull-in range is tuned by a random pattern used in actual data transmission. As shown in the figure, the pull-in range at the time of the random pattern and 0, 1, 0, 1
The pull-in range for the pattern is out of alignment. For this reason,
The frequency of the clock speed of the transmitted data is 0,
In some cases, the pull-in range may be out of the 1, 0, 1 pattern.
When a pattern is transmitted, there is a problem that synchronization cannot be established, and data and a clock synchronized with input data cannot be reproduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to provide an optical receiver in which a pull-in range of a data / clock recovery unit is extended.

[0008]

According to a first aspect of the present invention, an optical receiver converts an optical signal into an electric signal and outputs an optical signal level of the optical signal. Oscillating means for changing the oscillating frequency, data reproducing means for retiming the output signal from the optical / electrical converting means with the output signal of the oscillating means, output signal from the optical / electrical converting means and the clock reproducing means. A data / clock reproducing unit having a control voltage generation unit for comparing the phase with an output signal and generating the control voltage corresponding to the difference; and an optical signal level from the optical / electrical conversion unit, wherein a reference level is set in advance. A pulse generating means for outputting a pulse having a predetermined time width when the value becomes equal to or more than the value, and superimposing the pulse on the control voltage of the control voltage generating means.

According to a second aspect of the present invention, an optical receiver converts an optical signal into an electrical signal and outputs an optical signal level of the optical signal, and changes an oscillation frequency according to a control voltage. Oscillating means, data reproducing means for retiming the output signal from the optical / electrical converting means with the output signal of the oscillating means, phase comparison between the output signal from the optical / electrical converting means and the output signal of the clock reproducing means A data / clock reproducing unit having a control voltage generating unit for generating the control voltage corresponding to the difference, an optical signal level from the optical / electrical converting unit being equal to or higher than a predetermined reference value, and When the power supply voltage supplied to each component in the optical receiver reaches a desired voltage, a pulse having a predetermined time width is output, and the pulse is superimposed on the control voltage of the control voltage generation means. To those provided with the pulse generating means.

According to a third aspect of the present invention, there is provided an optical receiver for converting an optical signal into an electrical signal, a first oscillator for changing an oscillation frequency in accordance with a control voltage, and the optical / electrical converter. Data regenerating means for retiming an output signal from the first oscillating means with the output signal of the first oscillating means, comparing the phase of the output signal from the optical / electrical conversion means with the output signal of the clock regenerating means, and corresponding to the difference Data / clock reproducing means having a control voltage generating means for generating the control voltage, a detuning signal detecting means for monitoring an output signal of the data / clock reproducing means and detecting a loss of synchronization, and the detuning signal. A second oscillating means driven by an output signal of the detecting means, and a pulse having a predetermined time width is output by an output signal of the second oscillating means, and the pulse is controlled by the control voltage generating means. It is obtained; and a pulse generating means for superimposing on the voltage.

According to a fourth aspect of the present invention, there is provided an optical receiver for converting an optical signal into an electrical signal, a first oscillator for changing an oscillation frequency according to a control voltage, and the optical / electrical converter. Data reproducing means for retiming an output signal from the oscillating means with an output signal of the oscillating means, a phase comparison between an output signal from the optical / electrical conversion means and an output signal of the clock reproducing means, and the control corresponding to a difference therebetween. A data / clock regenerating means having control voltage generating means for generating a voltage, a detuning signal detecting means for monitoring an output signal of the data / clock regenerating means and detecting an out-of-synchronization;
A switching means for turning on / off by an output signal of the detuning signal detecting means and outputting an output signal of the second oscillating means; and a switching means for outputting the output signal of the second oscillating means. A pulse generating means for outputting a pulse having a predetermined time width according to the output signal and superimposing the pulse on the control voltage of the control voltage generating means.

According to a fifth aspect of the present invention, an optical receiver converts an optical signal into an electric signal and outputs an optical signal level of the optical signal, and changes an oscillation frequency according to a control voltage. A first oscillating means, a data reproducing means for retiming an output signal from the optical / electrical converting means with an output signal from the oscillating means, an output signal from the optical / electrical converting means and an output signal from the clock reproducing means. And a control voltage generating means for generating the control voltage corresponding to the difference, and a detuning for monitoring an output signal of the data / clock reproducing means and detecting a loss of synchronization. Signal detection means, second oscillation means driven by an output signal of the detuning signal detection means,
An optical signal detecting means for outputting a predetermined signal when an optical signal level from the optical / electrical converting means is equal to or higher than a preset reference value, and outputting a pulse having a predetermined time width;
A pulse generating means for superimposing the pulse on the control voltage of the control voltage generating means, and an optical signal of the optical / electrical converting means is monitored, and when the optical signal is not inputted, an output signal of the optical signal detecting means is outputted. Output to the pulse generation means,
When the optical signal is being input, one of the optical signal detecting means and the second oscillating means is connected to the pulse generating means so as to output the output signal of the second oscillating means to the pulse generating means. Switching connection means.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a configuration diagram of an optical receiver according to Embodiment 1 of the present invention. FIG. 2 is a diagram illustrating a data / clock recovery unit, an optical signal detection circuit, and a pulse generation circuit of the optical receiver according to Embodiment 1 of the present invention. FIG. 3 is a timing chart for explaining the operation of the data / clock recovery unit, the optical signal detection circuit, and the pulse generation circuit according to the first embodiment of the present invention, and FIG. FIG. 3 is a diagram illustrating a relationship between a VCO input voltage and a pull-in frequency according to the first embodiment of the present invention.

In FIG. 1, reference numeral 14 denotes a light for changing the logic of an output signal from 0 to 1 when an optical signal level higher than a preset value is input from the optical signal level detected by the optical / electrical converter 1. A signal detection circuit 15 is a pulse generation circuit that generates a pulse having a predetermined time width when the logic of the output signal of the optical signal detection circuit 14 changes from 0 to 1, and 16 is a light / electric conversion unit 1 that detects the pulse. Reference numeral 17 denotes an output signal of the optical signal detection circuit, and reference numeral 18 denotes an output signal of the pulse generation circuit. In FIG. 1, the same numbers as those in the other drawings are the same or the same.

In FIG. 3, reference numeral 19 denotes an input voltage to the VCO 10, reference numeral 20 denotes a change in the output frequency of the VCO 10, and reference numeral 21 denotes a pull-in state for pulling in synchronization in the data / clock recovery unit 2. In FIG. 3, the same numbers as those in the other drawings are the same or the same.

In FIG. 4, reference numeral 22 denotes a pull-in range when the random pattern extended by the pulse generating circuit output signal 18 is input, and 23 denotes a 0, 1, 0, 1 pattern extended by the pulse generating circuit output signal 18 when input. It is a pull-in range. In FIG. 4, the same numbers as those in the other figures are the same or the same.

Next, the operation will be described. An optical signal input in the same manner as described in the background art is converted into an electrical signal by the optical / electrical conversion unit 1 and input to the data / clock recovery unit 2. At this time, the optical / electrical converter 1 detects the optical signal level 16 of the input optical signal and inputs the optical signal level to the optical signal detection circuit 14. The optical signal detection circuit 14 changes the logic of the optical signal detection circuit output 17 from 0 to 1 if the input optical signal level 16 is equal to or greater than a preset value. When the pulse generation circuit 15 detects that the logic of the optical signal detection circuit output 17 has changed from 0 to 1, it outputs a pulse generation circuit output 18 having a preset time width. The input voltage of the VCO 10 changes like the VCO input voltage 19 because the pulse generator output 18 is superimposed on the control voltage from the LPF 9. This allows VCO at pull-in
10, the change width of the output frequency is increased, and the pull-in range is extended as shown in FIG. The comparator 8 always compares the phase of the directly input data signal with the phase of the data signal retimed by the flip-flop 7 as in the prior art. Becomes 0. At this time, the VCO output voltage becomes constant, the VCO output frequency is fixed, the lock state is established, and the data and clock synchronized with the input data are reproduced.

As described above, by forcibly shaking the VCO input voltage 19 at the time of detecting an optical signal, as shown in FIG.
The pull-in range 23 can be expanded in 1, 0, 1 pattern, and even if the pull-in range of the data / clock reproducing unit 2 is tuned by a random pattern, the frequency of the clock speed of the input data is set to 0, 1, 0. Since it is possible to enter within the pull-in range of one pattern, synchronization can be established even when the 0, 1, 0, 1 pattern is transmitted in a transmission test or the like during system operation, and data synchronized with the input data can be established. There is an effect that the clock can be reproduced.

In this embodiment, for convenience of explanation,
Although the logic of the signal is fixed, the same effect can be obtained by inverting the logic.

Embodiment 2 FIG. 5 is a configuration diagram of an optical receiver according to Embodiment 2 of the present invention, and FIG. 6 is a timing chart for explaining an operation according to Embodiment 2 of the present invention.

In FIG. 5, reference numeral 24 denotes a voltage detection circuit for changing the logic of an output signal from 0 to 1 when the power supply voltage becomes a predetermined value or more, and 25 denotes a logic of both input signals of 1
, A gate circuit for setting the logic of the output signal to 1 only, 26 is a voltage detection circuit output signal, and 27 is a gate circuit output signal. In FIG. 5, the same numbers as those in the other figures are the same or the same.

Next, the operation will be described. Embodiment 1
When an optical signal is input, the optical signal level 16 is output from the optical / electrical converter 1 and the logic of the optical signal detection circuit output 17 changes from 0 to 1. The voltage detection circuit 24 monitors the power supply unit 4 and changes the logic of the voltage detection circuit output 26 from 0 to 1 when the power supply voltages of all the devices in the optical receiver 5 become higher than a preset value. . The gate circuit 25 includes an optical signal detection circuit output 17 and a voltage detection circuit output 26.
The logic of the gate circuit output 27 is set to 1 only when both of the logics are 1. For example, the power of the optical receiver 5 is turned on while the optical signal is already input, and the optical / electrical conversion unit 1 is turned on.
Is started before the data / clock recovery unit 2,
The logic of the optical signal detection circuit output 17 changes from 0 to 1 immediately, but the logic of the voltage detection circuit output 26 remains 0 and the gate circuit output 27 The logic remains at 0, the pulse generator output 18 does not change and does not enter the pull-in state. Thereafter, the power supply voltages of all the devices in the optical receiver 5 become equal to or higher than a preset value, and the data / clock reproducing unit 2
Is also activated, the logic of the voltage detection circuit output 26 becomes 0
From 1 to 1. At this time, the gate circuit 25 changes the logic of the gate circuit output 27 from 0 to 1 since the logic of the optical signal detection circuit output 17 is already 1;
The pulse generating circuit output 18 is generated from the pulse generating circuit 15, and the data / clock reproducing unit 2 is brought into a pull-in state.
The pull-in operation from the pull-in state to the locked state is the same as in the first embodiment.

By operating as described above, the same effect as in the first embodiment can be obtained, and the output 2 of the voltage detection circuit can be obtained.
The use of 6 makes it possible to perform a more stable operation even when the power of the optical receiver 5 is turned on in a state where an optical signal is input in advance.

In this embodiment, for convenience of explanation,
Although the logic of the signal is fixed, the same effect can be obtained by inverting the logic.

Embodiment 3 FIG. 7 is a configuration diagram of an optical receiver according to Embodiment 3 of the present invention, and FIG. 8 is a timing chart for explaining an operation according to Embodiment 3 of the present invention.

In FIG. 7, reference numeral 28 denotes a control unit 3 which monitors a data / clock reproducing unit, which is out of synchronization (hereinafter referred to as "out of synchronization").
Detuning signal output upon detection of
Is a detuning signal detection circuit that changes the output logic from 0 to 1 when the detuning signal 28 is detected, and 30 oscillates a signal of a preset cycle when the input signal logic changes from 0 to 1. The reference numeral 31 denotes an output signal of the detuning signal detection circuit 28, and 32 denotes an output signal of the oscillation circuit 29. FIG.
In the drawings, the same reference numerals as those in the other drawings are the same or the same.

Next, the operation will be described. The control unit 3 constantly monitors the data / clock reproduction unit 2 and outputs a detuning signal 28 when detuning occurs. When the detuning signal 28 is input from the control unit 3, the detuning signal detection circuit 29 changes the logic of the output 31 of the detuning signal detection circuit from 0 to 1.
When the oscillation circuit 30 detects that the logic of the detuning signal detection circuit output 31 has changed from 0 to 1, it outputs an oscillation circuit output 32 having a preset cycle. When the logic of the input signal changes from 0 to 1, the pulse generating circuit 15 outputs a pulse generating circuit output 18 having a preset time width. When the pulse generation circuit output 18 is input, the data / clock recovery unit 2 enters a pull-in state. The pull-in operation from the pull-in state to the lock state
This is the same as in the first embodiment. When the control unit 3 detects the locked state of the data / clock reproduction unit 2, the detuning signal 2
8 is released, the logic of the detuning signal detection circuit output 31 changes from 1 to 0, the oscillation operation of the oscillation circuit 30 is stopped, and the oscillation circuit output 32 is not output. When detuning is detected by the control unit 3 during operation, the detuning signal 28 is output, the operation is performed as described above, and the state returns to the locked state via the pull-in state again.

By operating as described above, the same effects as those of the first embodiment can be obtained, and when detuning occurs during operation, an external system is not affected and the optical receiver 5 can immediately operate. It is possible to return from the pull-in state to the locked state.

In this embodiment, for convenience of explanation,
Although the logic of the signal is fixed, the same effect can be obtained by inverting the logic.

Embodiment 4 FIG. 9 is a configuration diagram of an optical receiver according to Embodiment 4 of the present invention, and FIG. 10 is a timing chart for describing an operation according to Embodiment 4 of the present invention.

In FIG. 9, reference numeral 33 denotes an oscillation circuit for transmitting a signal having a preset cycle at the same time when the power is turned on.
4 is a switch that is turned on when the logic of the detuning signal detection circuit output signal 31 is 1, 35 is an output signal of the oscillation circuit 33,
6 is an output signal of the switch 34. In FIG. 9, the same numbers as those in the other drawings are the same or the same.

Next, the operation will be described. When the power of the optical receiver 5 is turned on, the operation of the oscillating circuit 33 starts, and the oscillating circuit output 35 having a preset cycle is continuously output. The switch 34 is turned off when the logic of the input detuning signal detection circuit output 31 is 0, and turned off when the logic is 1.
N. As in the third embodiment, the control unit 3 constantly monitors the data / clock reproducing unit 2, and outputs a detuning signal 28 when detuning occurs. When the detuning signal 28 is input from the control unit 3, the detuning signal detection circuit 29 changes the logic of the output 31 of the detuning signal detection circuit from 0 to 1. At this time, the switch 34 is turned on, and the switch output 36 becomes the oscillation circuit output 35. Therefore, the pulse generation circuit output 18 is output from the pulse generation circuit 15, and the data / clock reproducing unit 2 enters the locked state via the pull-in state. . The pull-in operation from the pull-in state to the locked state is the same as in the first embodiment. When the data / clock reproducing unit 2 is in the locked state, the detuning signal from the control unit 3 is released, so that the logic of the detuning signal detection circuit output 31 changes from 1 to 0, the switch 34 is turned off, and the pulse The generator output 18 stops. Thereafter, when detuning is detected by the control unit 3, the logic of the detuning signal detection circuit output 31 changes from 0 to 1, the switch 34 is turned on, and again enters the locked state via the pull-in state.

By operating as described above, the same effect as in the first embodiment can be obtained, and when detuning occurs during the operation as in the third embodiment, the external system is not affected. It is possible to immediately return from the pull-in state to the locked state inside the optical receiver 5.

In this embodiment, for convenience of explanation,
Although the logic of the signal is fixed, the same effect can be obtained by inverting the logic.

Embodiment 5 FIG. FIG. 11 is a configuration diagram of an optical receiver according to Embodiment 5 of the present invention, and FIG. 12 is a timing chart for explaining an operation according to Embodiment 5 of the present invention.

In FIG. 11, reference numeral 37 denotes a switching circuit for switching an input signal in accordance with an output signal from the control signal 3;
Is an output signal of the switching circuit 37, and 39 is a switching signal for instructing switching from the control unit 3 to the switching circuit 37. In FIG. 11, the same numbers as those in the other figures are the same or the same.

Next, the operation will be described. Embodiment 1
When an optical signal is input, the optical signal level 16 is output from the optical / electrical converter 1 and the logic of the optical signal detection circuit output 17 changes from 0 to 1. Further, similarly to the third embodiment, the control unit 3 constantly monitors the data / clock reproducing unit 2 and outputs a detuning signal 28 when detuning occurs. When the detuning signal 28 is input from the control unit 3, the detuning signal detection circuit 29 changes the logic of the detuning signal detection circuit output 31 from 0 to 1.
To change. The oscillation circuit 30 outputs the detuning signal detection circuit output 3.
When detecting that the logic of 1 has changed from 0 to 1, it outputs an oscillation circuit output 32 of a preset cycle. Further, the control unit 3 monitors the optical / electrical conversion unit 1, and when no optical signal is input, controls the switching circuit 37 to connect the optical signal detection circuit 14 and the pulse generation circuit 15 and When a signal is input, the oscillation circuit 30
Switching signal 39 to connect the
Is output.

The operation timing will be described with reference to FIG.
When an optical signal is not input, the optical signal detection circuit output 1
The logic of 7 is 0. Since the lock state is not established, the detuning signal 28 is output from the control unit 3, the logic of the detuning signal detection circuit output 31 is 1, and the oscillation circuit 30 outputs the oscillation circuit output 32 of a preset cycle. Is output by the switching circuit 37.
Since 5 is connected to the optical signal detection circuit 14 side, nothing is output to the switching circuit output signal 38. In this state,
When an optical signal is input, the logic of the optical signal detection circuit output 17 changes from 0 to 1, a switching circuit output signal 38 is output, the pulse generation circuit output 18 is generated from the pulse generation circuit 15, and the data / clock The playback unit 2 enters the locked state via the pull-in state. After that, the switching circuit 37 is switched by the switching signal 39 from the control unit 3, and the pulse generation circuit 15 is connected to the oscillation circuit 30 side. Further, since the logic of the output 31 of the detuning signal detection circuit changes from 1 to 0, the oscillation circuit 30 stops. The pull-in operation from the pull-in state to the locked state is the same as in the first embodiment. When detuning is detected by the control unit 3, the detuning signal detection circuit output 31
Changes from 0 to 1, the oscillation circuit 30 starts oscillating again, the oscillation circuit output 32 is input to the pulse generation circuit 15, the pulse generation circuit output 18 is output, and the data / clock reproduction unit 2 The lock state is established again through the pull-in state.

By operating as described above, the same effects as in the first embodiment can be obtained, and when detuning occurs during operation as in the third and fourth embodiments, the external system , And can immediately return from the pull-in state to the locked state inside the optical receiver 5.

In this embodiment, for convenience of explanation,
Although the logic of the signal is fixed, the same effect can be obtained by inverting the logic.

[0041]

According to the first aspect of the present invention, the pull-in range in the random pattern and the pull-in range in the 0, 1, 0, 1 pattern can be expanded, and the pull-in range of the data / clock reproducing unit can be changed to the random pattern. Even if tuning is performed in step (1), the frequency of the clock speed of the transmitted data can be within the pull-in range of 0, 1, 0, and 1 patterns. , 0, and 1 patterns, synchronization can be established, and data and a clock synchronized with the input data can be reproduced.

According to the second invention, in addition to the effect of the first invention, and by using the output of the voltage detection circuit, the power of the optical receiver can be changed in a state where the optical signal is input in advance. , A more stable operation can be performed.

According to the third, fourth and fifth aspects of the present invention, in addition to the effects of the first aspect of the invention, if detuning occurs during operation, the external system is not affected, It is possible to immediately return from the pull-in state to the locked state inside the optical receiver.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an optical receiver according to Embodiment 1 of the present invention.

FIG. 2 is a block diagram showing a connection between a data / clock recovery unit, an optical signal detection circuit, and a pulse generation circuit of the optical receiver according to the first embodiment of the present invention.

FIG. 3 is a timing chart for explaining operations of a data / clock recovery unit, an optical signal detection circuit, and a pulse generation circuit according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a relationship between a VCO input voltage and a pull-in frequency according to the first embodiment of the present invention.

FIG. 5 is a configuration diagram of an optical receiver according to Embodiment 2 of the present invention.

FIG. 6 is a timing chart for explaining an operation according to the second embodiment of the present invention.

FIG. 7 is a configuration diagram of an optical receiver according to Embodiment 3 of the present invention.

FIG. 8 is a timing chart for explaining an operation in the third embodiment of the present invention.

FIG. 9 is a configuration diagram of an optical receiver according to Embodiment 4 of the present invention.

FIG. 10 is a timing chart for explaining an operation according to the fourth embodiment of the present invention.

FIG. 11 is a configuration diagram of an optical receiver according to Embodiment 5 of the present invention.

FIG. 12 is a timing chart for describing an operation according to the fifth embodiment of the present invention.

FIG. 13 is a block diagram illustrating a configuration example of a conventional optical receiver.

FIG. 14 is a block diagram showing an internal configuration of a data / clock recovery unit of a conventional optical receiver.

FIG. 15 is a diagram illustrating a relationship between a VCO input voltage and a pull-in frequency of a conventional optical receiver.

[Explanation of symbols]

1 optical / electrical conversion unit, 2 data / clock recovery unit, 3
Control unit, 4 power supply unit, 5 optical receiver, 6 optical fiber, 7 flip-flop, 8 comparator, 9 LPF, 1
0 VCO, 14 optical signal detection circuit, 15 pulse generation circuit, 24 voltage detection circuit, 25 gate circuit, 29 detuning signal detection circuit, 30 oscillation circuit, 33 oscillation circuit, 3
4 switches, 37 switching circuits.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H03L 7/08 7/083 H04B 10/00 H04L 7/033

Claims (5)

[Claims] 1. An optical / electrical converter for converting an optical signal into an electrical signal and outputting an optical signal level of the optical signal, an oscillator for changing an oscillation frequency according to a control voltage, and the optical / electrical converter. Data reproducing means for retiming the output signal from the means by the output signal of the oscillating means;
A data / clock reproducing unit having control voltage generating means for comparing the phase of the output signal from the electric converting means with the output signal of the clock reproducing means and generating the control voltage corresponding to the difference; Pulse generating means for outputting a pulse having a predetermined time width when the optical signal level from the converting means becomes equal to or higher than a preset reference value, and superimposing the pulse on the control voltage of the control voltage generating means. An optical receiver, comprising: 2. An optical / electrical conversion means for converting an optical signal into an electric signal and outputting an optical signal level of the optical signal, an oscillating means for changing an oscillation frequency according to a control voltage, and the optical / electrical conversion. Data reproducing means for retiming the output signal from the means by the output signal of the oscillating means;
A data / clock reproducing unit having control voltage generating means for comparing the phase of the output signal from the electric converting means with the output signal of the clock reproducing means and generating the control voltage corresponding to the difference; When the optical signal level from the conversion means is equal to or higher than a preset reference value, and the power supply voltage supplied to each component in the optical receiver becomes a desired voltage, a pulse having a predetermined time width is generated. A pulse generating means for outputting the pulse and superimposing the pulse on the control voltage of the control voltage generating means. 3. An optical / electrical converter for converting an optical signal into an electric signal, a first oscillator for changing an oscillation frequency according to a control voltage, and an output signal from the optical / electrical converter for the first Data reproducing means for performing retiming by an output signal of the oscillating means, a control for comparing phases of an output signal from the optical / electrical converting means and an output signal of the clock reproducing means, and generating the control voltage corresponding to the difference Data / clock reproducing means having voltage generating means, detuning signal detecting means for monitoring an output signal of the data / clock reproducing means and detecting out-of-synchronization, and driven by an output signal of the detuning signal detecting means. A second oscillating means, and a pulse for outputting a pulse having a predetermined time width based on an output signal of the second oscillating means, and superimposing the pulse on a control voltage of the control voltage generating means. An optical receiver comprising: a generator. 4. An optical / electrical converter for converting an optical signal into an electric signal, a first oscillator for changing an oscillation frequency according to a control voltage, and an oscillator for outputting an output signal from the optical / electrical converter. Data reproducing means for performing retiming according to the output signal of the above, a control voltage generating means for comparing the phases of the output signal from the optical / electrical converting means and the output signal of the clock reproducing means and generating the control voltage corresponding to the difference A detuning signal detecting means for monitoring an output signal of the data / clock reproducing means and detecting an out-of-synchronization, a second oscillating means, and an output of the detuning signal detecting means. A switching unit that is turned on / off by a signal and outputs an output signal of the second oscillating unit, and a switching unit that outputs an output signal of the second oscillating unit output from the switching unit. A pulse generating means for outputting a pulse having a predetermined time width and superimposing the pulse on the control voltage of the control voltage generating means. 5. An optical / electrical converter for converting an optical signal into an electric signal and outputting an optical signal level of the optical signal, a first oscillator for changing an oscillation frequency according to a control voltage, Data reproducing means for retiming an output signal from the electric converting means with an output signal of the oscillating means;
A data / clock reproducing unit having a control voltage generating unit for comparing the phase of the output signal from the optical / electrical converting unit with the output signal of the clock reproducing unit and generating the control voltage corresponding to the difference; Detuning signal detecting means for monitoring an output signal of the data / clock reproducing means and detecting loss of synchronization; second oscillating means driven by an output signal of the detuning signal detecting means; An optical signal detecting means for outputting a predetermined signal when an optical signal level from the optical signal becomes equal to or higher than a preset reference value, and a pulse having a predetermined time width, and outputting the pulse to the control voltage of the control voltage generating means. Pulse generating means for superimposing on
The optical signal of the optical / electrical conversion unit is monitored, and when the optical signal is not input, the output signal of the optical signal detection unit is output to the pulse generation unit. When the optical signal is input, Means for switching and connecting any one of the second oscillating means to the pulse generating means so as to output the output signal of the second oscillating means to the pulse generating means. Characteristic optical receiver.