JP2001160543A - Method and apparatus for planarizing semiconductor substrate - Google Patents

Abstract

(57) [Problem] To flatten and remove a metal film for wiring by using an etching solution mainly composed of a chemical action, thereby causing burial of scratches and fine particles on a metal surface after polishing. In addition, the metal film is flattened uniformly without causing etching unevenness. SOLUTION: A polishing pad 4 having a smaller diameter than the substrate 1 is brought close to or in contact with the surface of the substrate 1 such as a wafer, so that the polishing pad 4 and the substrate 1 are relatively moved in a direction along the substrate surface, and a chemical action is mainly performed. Is supplied to a region where the substrate 1 and the polishing pad 4 are in contact with each other, and the metal film on the substrate 1 is planarized by an etching action. At the same time, an etching reaction inhibitor 9 such as pure water is supplied to the periphery of the polishing pad 4 on the substrate 1 so as to suppress the etching action of the etching solution 7 in a region other than the contact region between the substrate 1 and the polishing pad 4,
The entire surface is uniformly flattened without etching unevenness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for flattening a semiconductor substrate, and more particularly, to flattening or removing a wiring material film formed on an insulating film of a semiconductor element in a semiconductor integrated circuit manufacturing process. And a device for flattening a semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, the fineness and multilayer structure of internal wiring have been advanced due to the high integration of semiconductor integrated circuits, and accordingly, planarization technology has become an important issue. Polishing (CMP) has attracted attention.

Conventionally, this type of polishing apparatus called a chemical mechanical polishing (CMP) apparatus, as shown in FIG. 5, allows a substrate 101 such as a wafer to be detachably mounted with its surface to be polished facing downward. A substrate holding unit 102 to be held, and a polishing pad 104 arranged to face the substrate 101 held by the substrate holding unit 102 and having a diameter larger than the diameter of the substrate 101.
A polishing table (polishing surface plate) 105 on which the substrate 101 is to be adhered, and a first driving unit 111 for rotationally driving the substrate holding unit 102;
And a second driving unit 113 for rotating and driving the polishing table 105. Further, a polishing agent 107 is provided on the surface of the polishing pad 104.
Is provided.

In the polishing apparatus configured as described above, the surface to be polished of the substrate 101 held by the substrate holder 102 is brought into contact with the polishing pad 104 on the polishing table 105, and the substrate 101 is pressed by the pressing means 112. While a predetermined processing pressure is applied, the substrate 101 and the polishing pad 104
Are rotated in the directions of the arrows by the first driving means 111 and the second driving means 113, and at the same time, the polishing agent 107 is dripped from the polishing agent supply means 115 onto the surface of the polishing pad 104 while the substrate 101 is covered. A polishing agent for polishing a polished surface, usually called a slurry.
For No. 7, a suspension obtained by mixing fine powder of silicon oxide, cerium oxide, alumina or the like with a potassium hydroxide aqueous solution or an ammonia solution is used. Thus, the surface to be polished is polished and flattened by utilizing the chemical action of the abrasive and the physical action of the abrasive grains.

[0005]

By the way, ordinary CM
The slurry used in P is, as described above, a suspension obtained by mixing fine powder of silicon oxide, cerium oxide, alumina or the like with a potassium hydroxide aqueous solution or an ammonia solution, and is used for polishing an interlayer insulating film of a semiconductor element. The main purpose is to consider mechanical polishing. Therefore, in the polishing of the metal film in the wiring formation step, particularly in the polishing of copper (Cu) or aluminum (Al) which is a ductile material or a metal compound mainly containing these, unlike the conventional insulating film, the metal surface after the polishing is different from the conventional insulating film. There is a high possibility that a problem such as generation of scratches or embedding of abrasive particles in a metal surface occurs. In the conventional tungsten plug embedding, the diameter of the plug is as small as 0.5 to 1 μm, and the area of the insulating film surface and the exposed surface of the tungsten plug on the surface to be polished is much larger than the area of the insulating film surface. Because of the large size and the fact that the tungsten material and the material of the insulating film themselves are brittle materials, the use of a polishing pad having an appropriate compressibility can reduce the dishing problem to some extent.

However, a wiring forming process of a metal film, particularly a dual damascene process (Dual
In the amascene process, the area ratio between the insulating film surface and the exposed wiring metal surface is closer to 1 than in the case where the tungsten plug is buried, and in the conventional CMP method,
It can be easily inferred that the dishing of the wiring metal part becomes large. Further, in the conventional CMP method, 1.96 × 10 ^{4 to} 4.9 × 10 ⁴ Pa (200 to 5
Since a processing pressure of 00 gr / cm ² ) is applied to the surface to be polished, there is also a problem in that processing is not performed uniformly over the entire surface of a substrate such as a wafer due to pressure deformation of the polishing pad.

The present invention has been made in view of the above-mentioned unsolved problems of the prior art, and has been made in consideration of the above-described problems, and has been made in consideration of the above circumstances. By performing flattening or removal by the method, scratches are not generated on the metal surface after polishing, further, there is no possibility that an abrasive or the like is buried near the metal surface, and further, without causing uneven etching, the substrate It is an object of the present invention to provide a method and an apparatus for planarizing a semiconductor substrate capable of uniformly planarizing a metal film on the entire surface.

[0008]

In order to achieve the above object, a method for planarizing a semiconductor substrate according to the present invention comprises a step of bringing a polishing pad smaller than the semiconductor substrate into contact with or in contact with a surface of the semiconductor substrate via an etching solution. Wherein the polishing pad and the semiconductor substrate are relatively moved in a direction along the surface of the semiconductor substrate to flatten the surface of the semiconductor substrate, wherein the polishing pad is opposed to the polishing pad on the semiconductor substrate. The etching liquid is supplied to a region to be etched, and an etching reaction inhibitor for suppressing an etching reaction is supplied to the periphery of the polishing pad on the semiconductor substrate.

In the method of planarizing a semiconductor substrate according to the present invention, it is preferable that the etching liquid is supplied from a central portion of the polishing pad, and the etching reaction inhibitor is provided on a peripheral portion of the polishing pad. Preferably, the liquid is supplied from at least one nozzle provided, and the nozzle is provided so as to scan on the semiconductor substrate together with the polishing pad.

[0010] In the method of planarizing a semiconductor substrate according to the present invention, it is preferable that the etching solution and the etching reaction inhibitor are respectively supplied onto the semiconductor substrate in a state where the temperature is adjusted to a desired temperature.

Further, in the apparatus for planarizing a semiconductor substrate according to the present invention, a polishing pad smaller than the semiconductor substrate is brought close to or in contact with the surface of the semiconductor substrate via an etchant, and the polishing pad and the semiconductor substrate are brought into contact with the semiconductor substrate. A semiconductor substrate flattening apparatus for making the surface of the semiconductor substrate flat by relative movement in a direction along a surface of the semiconductor substrate, wherein the etching solution supply means supplies the etching solution to a region of the semiconductor substrate facing the polishing pad. And an etching reaction inhibitor supplying means for supplying an etching reaction inhibitor for suppressing an etching reaction to the periphery of the polishing pad on the semiconductor substrate.

In the apparatus for planarizing a semiconductor substrate according to the present invention, the etching liquid supply means includes a supply pipe penetrating a central portion of the polishing pad, and the etching liquid is supplied onto the semiconductor substrate via the supply pipe. Preferably, the etching reaction inhibitor supply means includes at least one nozzle provided at a peripheral portion of the polishing pad, and the nozzle is provided together with the polishing pad with the semiconductor substrate. Preferably, it is provided so as to scan above.

In the apparatus for planarizing a semiconductor substrate according to the present invention, the etching solution supply means and the etching reaction inhibitor supply means may each include a temperature controller for adjusting the temperature of the etching solution and the etching reaction inhibitor to a desired temperature. Preferably, means are provided.

In the apparatus for flattening a semiconductor substrate of the present invention, a substrate holding means for holding a semiconductor substrate, a pad holding means for holding a polishing pad smaller than the semiconductor substrate, and a first means for rotating the substrate holding means. Driving means, second driving means for rotationally driving the pad holding means, and vertical driving and pressing means for vertically driving and pressing the polishing pad against the semiconductor substrate holding the substrate holding means. It is preferable to have.

[0015]

According to the method and apparatus for flattening a semiconductor substrate of the present invention, the etching rate is changed by the temperature of the etching solution supplied between the polishing pad and the surface to be polished, using the etching solution mainly having a chemical action. The metal film is planarized and removed by a selective etching rate utilizing the characteristics of the metal film.

[0016] Dual damasce process
ne process), the wiring metal film formed on the already flattened insulating film is etched and flattened by the change in the etching rate due to the temperature difference of the etchant. Since the processing pressure applied to the polishing pad need only be small enough to generate frictional heat, dishing does not occur on the metal surface.Furthermore, since abrasive grains are not used, minute scratches on the surface and wiring metal Since the abrasive grains are not buried in the material and the processing pressure can be reduced, a processing-affected layer is not formed near the polished surface unlike conventional CMP.

Further, by supplying an etching reaction inhibitor such as pure water to the periphery of the polishing pad, the etchant flowing onto the substrate other than the contact portion between the polishing pad and the substrate such as a wafer is diluted and cooled. Suppresses the etching reaction,
Etching is selectively performed only at a contact portion between the polishing pad and a substrate such as a wafer, so that a uniform flattening process without etching unevenness can be performed.

[0018]

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic structural view of a flattening apparatus for performing a method of flattening a semiconductor substrate according to the present invention.
FIG. 2 is a partial schematic configuration diagram showing a flow of an etching solution and an etching reaction inhibitor in the planarizing apparatus shown in FIG.

In FIGS. 1 and 2, reference numeral 1 denotes a semiconductor substrate such as a wafer on which a wiring metal film is formed (hereinafter, also simply referred to as a substrate). An apparatus for flattening and removing a semiconductor substrate includes a substrate table 2 for holding a substrate 1 in a guide ring 3 with a surface to be polished facing upward, and a substrate 1 held on the substrate table 2. And a polishing head 5 for adhering a hard polishing pad 4 having a smaller diameter than the diameter of the substrate 1, and a first drive for rotating and driving the substrate table 2. Means 11
And second driving means 12 for rotatingly driving the polishing head 5
A vertical driving and pressing means 13 for vertically moving the polishing head 5 and the polishing pad 4 and pressing the polishing pad 4 against the surface to be polished of the substrate 1 with a predetermined processing pressure; A scanning unit 14 for scanning in the diameter direction of the substrate 1 and a scanning driving unit 15 for scanning the substrate 1 are provided. An etchant supply means 16 having an etchant supply pipe 6 penetrating the head 5 and the center of the polishing pad 4 is provided, and an etching reaction is performed on a surface to be polished of the substrate 1 outside a region facing the polishing pad 4. A nozzle 8 (in FIGS. 1 and 2, 2) for dropping a chemical or pure water (hereinafter simply referred to as an etching reaction inhibitor) 9 for suppressing
Etching reaction inhibitor supply means 1 provided with
7 are provided. Further, these etching liquid supply means 16 and etching reaction inhibitor supply means 17
Each is provided with temperature adjusting means (not shown) for adjusting the temperature of the etching solution 7 and the etching reaction inhibitor 9,
After adjusting the temperature of the etching solution 7 and the etching reaction inhibitor 9, the substrate 1 is supplied through the supply pipe 6 and the nozzle 8, respectively.
Is provided on the surface to be polished. In the first driving means 11 and the second driving means 13, the substrate 1
And the rotation speed of the polishing pad 4 are controlled to values arbitrarily set in advance.

As the etchant 7, a solution capable of mainly utilizing a chemical action (etching action) on the wiring metal film is used. For example, as an etchant for copper, pure water is added to ferric chloride. Are mixed, the specific gravity is adjusted to about 1.38, and an etchant to which 1 to 5% hydrochloric acid is added is used.

The diameter of the polishing pad 4 is 以下 or less of the substrate 1. As the diameter of the polishing pad 4 decreases, the processing efficiency decreases, but the controllability of uniform processing over the entire surface of the substrate 1 increases. The diameter of the polishing pad 4 is preferably set between 10 and 25% of the diameter of the substrate.

In the flattening apparatus constructed as described above, a substrate 1 such as a wafer for flattening and removing a wiring metal film is placed on a substrate table 2 in a guide ring 3 with its polished surface facing upward. As shown in FIG. 1, a polishing head 5 having a hard polishing pad 4 attached to a lower surface thereof is attached.
When the edge of the substrate 1 is sent directly below the polishing pad 4, the etching solution 7 is supplied from the etching solution supply means 16 via the supply pipe 6 to the vicinity of the center of the polishing pad 4. The etching reaction inhibitor 9 is supplied to the surface to be polished, and the etching reaction inhibitor 9 is supplied to the surface to be polished.
7 is supplied to the periphery of the polishing pad 4 on the surface to be polished of the substrate 1 via a nozzle 8 arranged around the polishing pad 4.

At the same time, the substrate 1 held on the substrate table 2 and the polishing pad 4 of the polishing head 5 are rotated by the first driving means 11 and the second driving means 12 at a predetermined number of rotations, respectively. The polishing pad 4 is driven to rotate in the direction of the arrow, and
3, it is lowered to a state close to the surface to be polished of the substrate 1 or pressed against the surface to be polished of the substrate 1 with a predetermined processing pressure. Further, the polishing pad 4 is scanned by the scanning means 14 in the diameter direction of the substrate 1. If the scanning of the polishing pad 4 by the scanning means 14 is performed at a constant speed, a difference occurs in the contact time between the polishing pad 4 and the substrate 1 near the center and the periphery of the substrate 1. The speed is preferably variably controlled by an arithmetic control unit (not shown) so that the contact time is the same at any point on the substrate 1 and uniform etching can be performed.

As described above, the surface to be polished of the substrate 1 and the hard polishing pad 4 approach or come into contact with each other via the etching solution 7 to perform relative movement along the surface to be polished of the substrate 1.
By the etching action of the etchant 7, the etching proceeds selectively from the convex portion of the metal film on the surface to be polished of the substrate 1 to flatten the metal film, and the metal film is removed by the uniform etching action. .

Here, the mode of flattening and removing the metal film by the chemical action (etching action) of the etchant will be described.

In conventional chemical mechanical polishing (CMP), as described above, a slurry obtained by mixing fine powder of silicon oxide, cerium oxide, alumina or the like with a potassium hydroxide aqueous solution or an ammonia solution is used as an abrasive. Although the polishing is mainly performed by mechanical polishing, it is difficult to say that the chemical etching action is directly used for polishing. However, in the present invention, the etching solution mainly based on the chemical etching action is used. By using
The flattening and removal of the metal film of the wiring layer on the substrate are performed by the etching action.

An etching solution mainly having this kind of etching action usually has a uniform etching and has no selectivity. Therefore, the etching solution promotes the polishing of the protruding portion of the metal film and is flattened. It could not be transformed. However, these etching solutions have a property that the etching rate increases as the temperature increases,
By utilizing this property, that is, the fact that the etching rate has a high temperature dependency, it is possible to impart local selectivity by heat by giving a local temperature rise to the etching solution.

The surface to be polished of the substrate 1 and the hard polishing pad 4 are moved closer to or in contact with each other via the etching solution 7 to make relative movements, whereby the polishing pad 4 and the surface to be polished of the substrate 1, especially the convex portions thereof, Generates frictional heat due to the friction of
Since such frictional heat is proportional to the frictional force obtained by multiplying the applied pressure by the frictional coefficient, the amount of movement, and the time of movement, by appropriately selecting these parameters, the hard polishing pad 4 can be used.
It is possible to control the temperature of the convex surface to be polished having a height difference of about 1 μm close to or in contact with the surface. Since the convex portion in the surface to be polished of the substrate 1 is instantaneously heated by the frictional heat generated by the friction as described above, the etching rate of the etching liquid in the convex portion is increased, and the etching action of the portion is increased. Is promoted more than the other parts. As a result, the convex portions of the metal film on the surface to be polished are selectively etched, the metal film is flattened, and the metal film is removed by a uniform etching action.

In particular, a copper dual damascene process (Du
In the case of the al damascene process, the thermal conductivity of the insulating film underlying the metal film is much smaller than that of copper, so the frictional heat generated on the copper surface that is in local contact with the copper wiring layer Conducted and accumulated. Therefore, even if the pressing force is remarkably reduced as compared with the conventional processing pressure, the contact portion has the highest temperature in the vicinity of the contact surface, and the temperature tends to decrease as the distance from the contact portion increases. In the case of a dual damascene process, the underlying insulating film is formed by conventional chemical mechanical polishing (C
(MP) method, and the flatness is ensured. Therefore, the step of the concave portion on the surface of the metal film is relatively small. Therefore, if the temperature dependency can be changed by 5% or more, the heat radiation of the non-contact portion is sufficient. Flatness can be ensured by flowing an etchant whose temperature can be controlled as much as possible.

As an etchant used in the case of a dual damascene process mainly composed of copper, in addition to the above-described etchant, a solution containing ferric chloride or cupric chloride, a copper amine An alkaline aqueous solution containing a complex as a main component, a mixed etching solution of hydrogen peroxide and a sulfuric acid-based solution, or the like can be used. If the wiring materials are different, it goes without saying that an etching solution suitable for the characteristics of the materials may be selected. Further, for the purpose of promoting heat generation at the contact portion or for controlling the heat generation, it is also possible to use an etchant to which solid fine particles or abrasive grains are added, or an etchant to which a stabilizer is added.

If a relatively hard polishing pad is used, the pressure for generating frictional heat is also reduced to a slight pressure sufficient to increase the surface temperature from several degrees to ten and several degrees to obtain heat selectivity. Therefore, dishing does not occur, and when abrasive grains are not used, fine scratches on the surface and burying of the abrasive grains in the wiring material do not occur.
Even when solid fine particles or fine particles of abrasive grains are mixed, since the processing pressure is very small, minute scratches on the surface and burying of the abrasive grains in the wiring material hardly occur. Furthermore, since the chemical action is the main component, the processing pressure can be reduced, so that a damaged layer is not formed near the polished surface unlike conventional CMP. In addition, since such an etchant does not have an etching effect on the insulating film, there is no problem of overpolishing, and therefore, there is an advantage that a stopper film is not required.

Next, the etching reaction inhibitor supplying means 17
The function of the etching reaction inhibitor 9 dropped on the surface to be polished of the substrate 1 through the nozzle 8 will be described.

When the metal film of the substrate 1 is flattened, an etching solution 7 is supplied from the center of the polishing pad 4 to the surface to be polished of the substrate 1 through a supply pipe 6 as shown in FIGS. And flows out to the periphery of the polishing pad 4 due to the centrifugal force accompanying the rotation of the polishing pad 4 as shown in FIG. The etching reaction by the etchant 7 is performed at a contact portion between the substrate 1 and the polishing pad 4 where frictional heat is generated. However, the rotation of the polishing pad 4 and the rotation of the substrate 1 cause an etching reaction other than the contact portion between the substrate 1 and the polishing pad 4. The etching solution 7 flows out, and the metal film surface of the substrate 1 is etched by the flowing out etching solution 7.
However, the etching reaction at a portion other than the contact portion between the substrate 1 and the polishing pad 4 is not controlled at all with respect to the temperature and concentration of the etching solution 7, and causes etching unevenness.

Therefore, in the present invention, the etching reaction inhibitor 9 is dropped around the polishing pad 4 so as not to cause such etching unevenness, and the etching solution flowing out of the contact portion between the substrate 1 and the polishing pad 4 is removed. The etching reaction of 7 is suppressed or not performed so that the etching reaction is selectively performed only at the contact portion between the substrate 1 and the polishing pad 4.

The etching reaction can be suppressed by changing the pH, temperature and concentration of the etching solution. By the way, the relationship between metal etching and pH is
Generally, it can be represented by a Pourbaix diagram. FIG. 4 shows a conceptual diagram of the Pourbaix diagram, in which the vertical axis indicates the equilibrium potential between the metal surface and the aqueous solution, and the horizontal axis indicates pH. The term "equilibrium potential" as used herein refers to a potential at which a metal is negatively charged as a result of elution of a positive ion, and a positive ion to be further eluted is attracted to the metal surface so that no more ions elute. Metals take one of the following states: corrosion, passivation, and transformation, depending on the potential and pH conditions. Corrosion refers to the state in which the metal is eluted as ions in the aqueous solution, passivation refers to the state in which the formation of a stable solid compound on the surface stops the corrosion, and invariance refers to the state in which the metal exposes the bare surface to the aqueous solution and does not corrode. Represent. Aluminum and copper, which are materials for metal wiring, have corrosion areas in both acidity and alkalinity. In addition, there are a passivation region and a transformation region between them. Therefore, corrosion, that is, etching can be suppressed by supplying a liquid whose pH is controlled onto a substrate such as a wafer. In addition, since the etching amount has a concentration dependency and a temperature dependency of the etching solution, for example, pure water is dropped from a nozzle as an etching reaction inhibitor, and the etching amount flows out onto the substrate other than the contact portion between the polishing pad and the substrate. The etching reaction can be suppressed by diluting and cooling the etchant. The chemical reaction is generally 2 when the temperature changes by 10 ° C.
It is said that the temperature of the etching solution is doubled, and since the operating temperature of the etching solution is generally 20 ° C. to 60 ° C., in order to suppress the etching reaction, the etching reaction of pure water or the like whose temperature has been adjusted to 0 ° C. to 10 ° C. It is preferred to use inhibitors. In the embodiment shown in FIG. 1, each of the supply means 16 and 17 is provided with a temperature adjusting means for adjusting the temperature of both the etching solution and the etching reaction inhibitor to a desired temperature. And supplied on the substrate 1.

When the surface of the substrate whose etching action has been reduced or stopped by the etching reaction inhibitor comes into contact with the rotating polishing pad again, a new etching solution is supplied, and the pH, temperature, and temperature of the etching solution are reduced. By raising any or all of the concentrations,
It goes without saying that it is etched again.

The nozzle 8 into which the etching reaction inhibitor 9 is dropped can have various arrangements as exemplified in FIGS. 3A to 3C. FIG. 3A shows a type in which a plurality of (eight in the figure) nozzles 8 are arranged around a polishing pad 4 and an etching reaction inhibitor 9 is dropped on the substrate 1 from the plurality of nozzles 8. , FIG. 3 (b)
Is a type in which one nozzle 8 is rotated around the polishing pad 4, and the etching reaction inhibitor 9 is rotated while the one nozzle 8 is rotated around the polishing pad 4, and the substrate around the polishing pad 4 is rotated. Drop on 1. FIG. 3C shows that the etching reaction inhibitor 9 is applied around the polishing pad 4 by scanning of the polishing pad 4 and rotation of the substrate 1.
No nozzles are arranged on the front side in the scanning direction S of the polishing pad 4 and on the entrance side in the rotation direction T of the substrate 1 so as to prevent the nozzles 8 from flowing underneath, and a plurality of nozzles 8 are arranged around the other periphery. The substrate 1 and the polishing pad 4 are prevented from flowing under the polishing pad 4 by the etching reaction inhibitor 9.
To prevent the etching reaction at the contacting portion from being suppressed. Although the nozzle 8 scans the substrate 1 together with the polishing pad 4 in FIGS. 1 and 3, the same operation and effect can be obtained by disposing the nozzle on the non-scanning member side in the apparatus. Needless to say.

[0039]

As described above, according to the present invention,
The metal film is formed by chemical mechanical polishing (CMP) mainly using a chemical action, by using a selective etching rate utilizing a characteristic that an etching rate changes according to a temperature of an etching solution supplied between a polishing pad and a surface to be polished. It can be flattened and removed, and the processing pressure applied to the surface to be polished and the polishing pad need only be such as to generate frictional heat. If a relatively hard polishing pad is employed, the processing pressure can be further reduced. As a result, dishing does not occur on the surface to be polished, and fine scratches on the surface and burying of abrasive grains in the wiring material do not occur. In addition, solid fine particles can be mixed for promoting or controlling heat generation due to friction.However, even in this case, fine particles having a small processing pressure and a very fine particle diameter can be used.
Very little scratches on the surface and burying of abrasive grains in the wiring material hardly occur.

Further, since the main effect is a chemical action and the processing pressure can be reduced, unlike the conventional CMP, a processed deteriorated layer is not formed near the surface after polishing, and the ideal flatness is obtained. This has the advantage that the metallization and removal of the metal film can be performed. In addition, since such an etchant has no etching action on the insulating film,
Since the problem of overpolishing does not occur, there is an advantage that a stopper film becomes unnecessary.

Further, an etching reaction inhibitor is supplied around the polishing pad to dilute and cool the etching solution flowing out onto the substrate other than the contact portion between the polishing pad and the substrate such as a wafer, thereby suppressing the etching reaction. However, etching is selectively performed only at a contact portion between the polishing pad and a substrate such as a wafer, so that a uniform flattening process without etching unevenness can be performed.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a flattening apparatus for performing a semiconductor substrate flattening method according to the present invention.

FIG. 2 is a partial schematic configuration diagram showing a flow of an etching solution and an etching reaction inhibitor in the planarizing apparatus shown in FIG.

FIGS. 3A to 3C are schematic diagrams showing examples of the arrangement of nozzles for dropping an etching reaction inhibitor, respectively.

FIG. 4 is a conceptual diagram of a Pourbaix diagram of metal.

FIG. 5 is a schematic configuration diagram of a conventional chemical mechanical polishing (CMP) apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate (wafer) 2 Substrate table 3 Guide ring 4 (Hard) polishing pad 5 Polishing head 6 Supply pipe 7 Etching liquid 8 Nozzle 9 Etching reaction inhibitor 11 First driving means 12 Second driving means 13 Vertical drive and Pressure means 14 scanning means 16 etching liquid supply means 17 etching reaction inhibitor supply means

Claims (11)

[Claims] 1. A polishing pad smaller than the semiconductor substrate is brought close to or in contact with the surface of the semiconductor substrate via an etchant, and the polishing pad and the semiconductor substrate are relatively moved in a direction along the surface of the semiconductor substrate. In a method of planarizing a semiconductor substrate for planarizing a surface of a semiconductor substrate,
A semiconductor substrate, wherein the etching liquid is supplied to a region on the semiconductor substrate facing the polishing pad, and an etching reaction inhibitor for suppressing an etching reaction is supplied to the periphery of the polishing pad on the semiconductor substrate. Flattening method. 2. The method according to claim 1, wherein the etchant is supplied from a central portion of the polishing pad. 3. The method according to claim 1, wherein the etching reaction inhibitor is supplied from at least one nozzle provided at a peripheral portion of the polishing pad. 4. The method according to claim 3, wherein the nozzle is provided so as to scan on the semiconductor substrate together with the polishing pad. 5. The semiconductor device according to claim 1, wherein the etching solution and the etching reaction inhibitor are supplied onto the semiconductor substrate in a state where the temperature is adjusted to a desired temperature, respectively. 13. The method for flattening a semiconductor substrate according to the above item. 6. A polishing pad smaller than the semiconductor substrate is brought close to or in contact with the surface of the semiconductor substrate via an etchant, and the polishing pad and the semiconductor substrate are moved relative to each other in a direction along the surface of the semiconductor substrate. In a semiconductor substrate flattening apparatus for flattening the surface of a semiconductor substrate,
Etching solution supply means for supplying the etching solution to a region on the semiconductor substrate facing the polishing pad, and etching reaction for supplying an etching reaction inhibitor for suppressing an etching reaction to the periphery of the polishing pad on the semiconductor substrate An apparatus for planarizing a semiconductor substrate, comprising an inhibitor supplying means. 7. The etching liquid supply means includes a supply pipe penetrating a central portion of the polishing pad, and supplies the etching liquid onto the semiconductor substrate via the supply pipe. 7. The apparatus for flattening a semiconductor substrate according to 6. 8. The etching reaction inhibitor supplying means,
8. The apparatus according to claim 6, further comprising at least one nozzle provided at a peripheral portion of the polishing pad.
An apparatus for planarizing a semiconductor substrate as described in the above. 9. The apparatus according to claim 8, wherein said nozzle is provided so as to scan on said semiconductor substrate together with said polishing pad. 10. The etching solution supply means and the etching reaction inhibitor supply means each include a temperature adjusting means for adjusting the temperature of the etching solution and the etching reaction inhibitor to a desired temperature. The apparatus for planarizing a semiconductor substrate according to claim 6. 11. A substrate holding means for holding a semiconductor substrate, a pad holding means for holding a polishing pad smaller than the semiconductor substrate, and a first driving means for rotating the substrate holding means.
And a second driving means for rotating the pad holding means.
And a vertical drive and pressurizing means for vertically driving and pressing the polishing pad with respect to the semiconductor substrate holding the substrate holding means. An apparatus for planarizing a semiconductor substrate according to any one of the preceding claims.