JP2001036069A - diode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a diode having a high breakdown voltage and a low loss power. SOLUTION: A diode 40 is structured by laminating in the order an n-type silicon carbide layer 14, an n-type silicon layer 16, and a p-type silicon layer 18 on an n+ silicon carbide substrate 12. Two trenches 24 are formed so as to pierce a p-type silicon layer 18 and an n-type silicon layer 16, and reach the n-type silicon carbide layer 14. A trench gate 28 is embedded in each trench 24. In the diode 40, the rising voltage of a forward current of the diode is about 0.6 V which is the value of the, energy gap of silicon, and the dielectric breakdown electric field of the diode becomes about 3×106 V/cm which is the dielectric breakdown electric field of silicon carbide.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a diode,
In particular, the present invention relates to a diode including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type joined to the first semiconductor layer.

[0002]

BACKGROUND ART Problems to be solved by the invention
Like the pn junction type diode, the first conductivity type first
Diodes having a semiconductor layer and a second semiconductor layer of the second conductivity type joined to the first semiconductor layer are also used in the field of power electronics. In this field, improvement of the breakdown voltage of the element has been a proposition.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a diode having a structure capable of improving a breakdown voltage.

[0004]

SUMMARY OF THE INVENTION The present invention provides a diode having a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type joined to the first semiconductor layer. A first trench gate and a second trench gate, wherein the second semiconductor layer is located between the first trench gate and the second trench gate, and when a reverse voltage is applied to the diode. In the second semiconductor layer, a depletion layer extending from the first trench gate and a depletion layer extending from the second trench gate are formed.

[0005] The diode according to the present invention having the above configuration has the following operation and effects. In the diode according to the present invention, the second semiconductor layer is located between the first trench gate and the second trench gate, and when a reverse voltage is applied to the diode, the second semiconductor layer has a first trench. A depletion layer extending from the gate and a depletion layer extending from the second trench gate are formed. These depletion layers make it possible to locate the peak of the electric field in a region other than the junction between the first semiconductor layer and the second semiconductor layer.
In this case, of the plurality of electric field peaks, the dielectric breakdown electric field in a region where the peak of the maximum value is located is the dielectric breakdown electric field of the diode. By dispersing a plurality of peaks, the maximum value of the peak of the electric field is reduced as compared with the case where the number of peaks is one. Therefore, according to the diode of the present invention, a higher reverse voltage can be applied, so that the diode of the present invention has a higher breakdown voltage than the conventional one. The fact that the peak of the electric field can be located in a region other than the junction between the first semiconductor layer and the second semiconductor layer will be described in detail in the third embodiment of the present invention. .

The depletion layer extending from the first trench gate and the depletion layer extending from the second trench gate are formed in the second semiconductor layer when the second semiconductor layer is p-type. 0 or a positive voltage is applied to the first and second trench gates. When the second semiconductor layer is n-type, 0 or a negative voltage is applied to the first and second trench gates.

In the diode according to the present invention, the impurity concentration in the second semiconductor layer, the distance between the first trench gate and the second trench gate, the thickness of the gate insulating film of the first trench gate, and the thickness of the second trench gate The combination of the thickness of the gate insulating film is such that when a reverse voltage is applied to the diode, at least part of the edge of the depletion layer extending from the first trench gate and extending from the second trench gate. It is preferable that at least a part of the edge of the depletion layer is connected to the second semiconductor layer, and that the combination is a combination. According to this, it is more reliable to locate the peak of the electric field also in a region other than the junction between the first semiconductor layer and the second semiconductor layer.

[0008] Of the above parameters, the gate insulating films of the first and second trench gates will be described. The thickness of the gate insulating film of the first and second trench gates is 0.1 to 1.0.
2 μm is preferred. If the thickness is smaller than 0.1 μm, the gate insulating film is easily broken when the diode is used. If the thickness is larger than 1.2 μm, the extension of the depletion layer is not sufficient, and it is difficult to connect to the adjacent depletion layer. The thickness of the gate insulating film of the first and second trench gates is preferably 0.1 to 1.0 μm, and more preferably 0.1 to 1.0 μm.
1 to 0.5 μm is preferred.

Note that the entire second semiconductor layer can be depleted depending on the combination of the above four parameters. That is, the edge of the depletion layer extending from the first trench gate and the edge of the depletion layer extending from the second trench gate are connected by the second semiconductor layer, and the entire second semiconductor layer is depleted. is there. When the entire second semiconductor layer is depleted, the entire region of the second semiconductor layer functions as a voltage holding region as compared with the case where a part of the second semiconductor layer is depleted. Is possible.

The diode according to the present invention includes a third semiconductor layer of a second conductivity type, the third semiconductor layer being in contact with the second semiconductor layer, and the third semiconductor layer being connected to the first trench gate and the second semiconductor layer. The energy gap between the first semiconductor layer and the second semiconductor layer is smaller than the energy gap of the third semiconductor layer, and the breakdown electric field of the third semiconductor layer is between the first semiconductor layer and the second semiconductor layer. Is preferably larger than the dielectric breakdown electric field.

According to this structure, since the third semiconductor layer is located between the first trench gate and the second trench gate, the maximum value of the electric field peak can be located in the third semiconductor layer. . Therefore, the breakdown electric field of the diode can be increased, and the withstand voltage of the diode can be improved. The reason why the dielectric breakdown electric field of the diode can be increased will be described in detail in the first embodiment of the present invention. Further, according to this configuration, the energy gap between the first semiconductor layer and the second semiconductor layer becomes a rising voltage of a forward current of the diode. Therefore, the rising voltage of the forward current of the diode can be reduced. Therefore, the voltage at the time of use of the diode can be reduced, so that the power consumption of the diode can be reduced.

As described above, according to this configuration, the dielectric breakdown electric field can be increased and the rising voltage of the forward current can be reduced, so that a diode with high breakdown voltage and low loss power can be realized. .

For example, consider a case where the first and second semiconductor layers are made of silicon and the third semiconductor layer is made of silicon carbide. The rising voltage of the forward current of this diode is about 0.6 V, which is the value of the energy gap of silicon. The dielectric breakdown field of this diode is about 3 × 10 ⁶ V / which is the dielectric breakdown field of silicon carbide.
cm. Incidentally, a diode consisting of silicon only has a rising voltage of a forward current of about 0.6 V, which is the value of the energy gap of silicon, and a dielectric breakdown electric field of about 3 × 10, which is the dielectric breakdown electric field of silicon.
⁵ V / cm. A diode consisting of silicon carbide alone has a forward voltage rising voltage of about 3 V, which is the value of the energy gap of silicon carbide, and a dielectric breakdown electric field of about 3 × 10 ^6, which is the dielectric breakdown electric field of silicon carbide. V / cm. Therefore, the diode comprising silicon and silicon carbide according to the present invention is superior in the breakdown voltage to the diode comprising only silicon, and is superior to the diode comprising only silicon carbide in the low loss power.

Further, for example, consider a case where the first semiconductor layer and the second semiconductor layer are made of silicon-germanium, and the third semiconductor layer is made of silicon. The rising voltage of the forward current of this diode is about 0.4V. The breakdown field of this diode is about 3 × which is the breakdown field of silicon.
It becomes 10 ⁵ V / cm. Incidentally, a diode consisting of silicon-germanium alone has a forward voltage rising voltage of 0.4 V, and its dielectric breakdown electric field is about 1.5 × 1 which is the dielectric breakdown electric field of silicon-germanium.
0 ⁵ V / cm. Therefore, the silicon according to the present invention
A diode composed of germanium and silicon is superior in a breakdown voltage to a diode composed only of silicon-germanium, and is superior to a diode composed of only silicon in low-loss power.

[0015] In the diode according to the present invention, the first semiconductor layer is preferably sandwiched between the first trench and the second trench.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] {Description of Structure} FIG. 1 is a sectional view of a diode according to a first embodiment of the present invention. The diode 10 has n ⁺
N-type silicon carbide layer 14, n-type silicon layer 16, p-type silicon layer 1
8 are sequentially laminated. Two trenches 2
4 is formed so as to penetrate the p-type silicon layer 18, the n-type silicon layer 16, and the n-type silicon carbide layer 14 and reach the n ⁺ -type silicon carbide substrate 12. A trench gate 28 is buried in the trench 24. Between the side surface of the trench 24 and the trench gate 28 or between the bottom surface of the trench 24 and the trench gate 28,
A gate oxide film 26 is formed. Trench gate 2
An electrode 30 is formed on 8. Trench gate 2
An anode electrode 22 is formed on the p-type silicon layer 18 located between them. The cathode electrode 2 is formed on the surface of the n ⁺ -type silicon carbide substrate 12 facing the surface on which the n-type silicon carbide layer 14 is formed.
0 is formed.

{Description of Operation} Next, the operation of the diode 10 according to the first embodiment of the present invention will be described with reference to FIG. First, the ON operation will be described. A forward voltage is applied to the diode 10. For example, a voltage of 2 V is applied to the anode electrode 22 and 0 V is applied to the cathode electrode 20.
A voltage of V is applied. At this time, a current flows from the anode electrode 22 to the cathode electrode 20.
The same voltage as that of the anode electrode 22 or a voltage of about 10 V may be applied to the electrode 30 in order to further reduce the resistance.

Next, the OFF operation will be described. A reverse voltage is applied to the diode 10. For example, a voltage of 0 V is applied to the anode electrode 22 and 6 V is applied to the cathode electrode 20.
A voltage of 00 to 1000 V is applied respectively. The voltage of the electrode 30 may be the same as the voltage of the anode electrode 22. In order to obtain better off characteristics, a voltage of about −10 V may be applied to the electrode 30. When such a voltage is applied to the electrode 30, at least a part of the edge of the depletion layer extending from the one trench gate 28 and the edge of the depletion layer extending from the other trench gate 28 are formed. At least a portion is connected by an n-type silicon carbide layer 14. As a result, the reverse voltage is held, and the diode 1
Prevents current from flowing to zero.

{Description of Manufacturing Method} Next, a method of manufacturing the diode 10 according to the first embodiment of the present invention will be described.
This will be described with reference to FIGS. As shown in FIG. 2, n ⁺
A silicon carbide substrate 12 is prepared. The thickness of n ⁺ type silicon carbide substrate 12 is 0.5 to 1 mm, and the impurity concentration is about 1 × 10 ¹⁹ cm ⁻³ . The impurity is nitrogen.

As shown in FIG. 3, an n-type silicon carbide layer 14 is formed on an n ⁺ -type silicon carbide substrate 12 by epitaxial growth. The thickness of the n-type silicon carbide layer 14 is 1 to 10 μm, and the impurity concentration is 1
× 10 ¹⁶ to 1 × 10 ¹⁷ cm ⁻³ . The impurity is nitrogen. An n-type silicon layer 32 is formed on n-type silicon carbide layer 14 by epitaxial growth. The thickness of the n-type silicon layer 32 is 5 to 10 μm, and the impurity concentration is 1
× 10 ¹⁵ to 1 × 10 ¹⁷ cm ^-3 . The impurity is phosphorus. A p-type impurity is diffused into the n-type silicon layer 32, and a p-type silicon layer 18 is formed on the n-type silicon layer 32 as shown in FIG. The thickness of the p-type silicon layer 18 is 2-3
μm and an impurity concentration of 1 × 10 ¹⁶ to 1 × 10 ¹⁷ cm
It is ^-3 . The impurity is boron. The lower portion of the n-type silicon layer 32 is referred to as an n-type silicon layer 16.

As shown in FIG. 5, a plurality of trenches 24 are formed in this laminate by photolithography and etching. The trench 24 is a p-type silicon layer 1
8, n-type silicon layer 16, n-type silicon carbide layer 1
4 to reach the n ⁺ type silicon carbide substrate 12. The width w of the trench 24 is 0.5 to 2 μm. The distance d ₁ between the trenches 24 is 0.
5 to 5 μm.

As shown in FIG. 6, a gate oxide film 26 is formed on the side and bottom surfaces of the trench 24 by thermal oxidation.
Gate oxide film 26 has a thickness of 0.05 to 0.2 μm.
CVD so that the trench 24 is filled with the polysilicon film.
To form a polysilicon film on p-type silicon layer 18. The polysilicon film is etched back to leave the polysilicon film only in the trench 24. This polysilicon becomes the trench gate 28.

As shown in FIG. 1, a cathode electrode 20 made of metal is formed on an n ⁺ type silicon carbide substrate 12 by a vapor deposition method. Further, a metal layer is formed on the p-type silicon layer 18 by an evaporation method. The metal layer is patterned to form the anode electrode 22 and the electrode 30.
As described above, the diode 10 according to the first embodiment of the present invention is completed.

{Explanation for Improving Diode Withstand Voltage} In the diode 10 according to the first embodiment of the present invention,
The improvement in the breakdown voltage of the diode 10 by the trench gate 28 will be described using simulation. FIG.
Is a simulation showing a current flowing through the diode when a reverse voltage is applied to the diode. (A)
1 is a simulation of the diode 10 shown in FIG. 1, and (b) is a simulation of a diode having a structure in which the trench gate 28 is removed from the diode 10 shown in FIG.

In the diode without a trench gate shown in (b), a phenomenon in which a current suddenly flows at about 60 V, that is, a dielectric breakdown phenomenon appears. On the other hand, the diode having the trench gate shown in FIG. As can be seen from this simulation, the diode 10 according to the first embodiment of the present invention has a higher breakdown voltage than the diode without the trench gate.

Next, the reason why the withstand voltage of the diode 10 according to the first embodiment of the present invention is improved will be described. FIG.
Is a simulation of the electric field generated in a diode with a trench gate. The trench gate is grounded to 0 V, 140 V is applied to the cathode, and the anode is
Is applied. The vertical axis indicates the electric field intensity. The horizontal axis shows the distance in the depth direction of the diode from the junction between the p-type silicon layer and the n-type silicon layer. That is, the value of 2 μm on the horizontal axis corresponds to the position of the junction between the p-type silicon layer and the n-type silicon layer. The value of 10 μm on the horizontal axis corresponds to the position of the boundary between the n-type silicon layer and the n-type silicon carbide layer. The value of 20 μm on the horizontal axis corresponds to the position of the boundary between the n-type silicon carbide layer and the n ⁺ -type silicon carbide substrate. The width of the trench gate is 0.4μ.
m, the thickness of the gate oxide film is set to 0.1 μm, and the distance between the trench gate and a trench gate (not shown) facing the trench gate is set to 0.2 μm.

As can be seen from the simulation, the value of 20 μm on the horizontal axis, that is, the boundary between the n-type silicon carbide layer and the n ⁺ -type silicon carbide layer becomes the peak of the electric field acting on the diode. Therefore, the dielectric breakdown electric field of the silicon carbide layer becomes the dielectric breakdown electric field of the diode.

Next, a simulation of an electric field generated in a diode having no trench gate will be described with reference to FIG. 60 V is applied to the cathode, and 0 V is applied to the anode.
It is assumed that V is applied. Figure 1 shows the meaning of the vertical and horizontal axes
6 has the same meaning as the vertical and horizontal axes. As can be seen from the simulation, there are two peaks of the electric field acting on the diode. One is a value of 2 μm on the horizontal axis, that is,
The junction between the p-type silicon layer and the n-type silicon layer is the peak of the electric field, and the other is the value of 10 μm on the horizontal axis, that is,
The boundary between the n-type silicon layer and the n-type silicon carbide layer becomes the peak of the electric field. The electric field acting on the junction between the p-type silicon layer and the n-type silicon layer is larger than the electric field acting on the boundary between the n-type silicon layer and the n-type silicon carbide layer. Therefore, the junction between the p-type silicon layer and the n-type silicon layer, that is, the dielectric breakdown electric field of the silicon layer becomes the dielectric breakdown electric field of the diode.

As described above with reference to FIGS. 16 and 17, the diode 1 according to the first embodiment of the present invention
0 indicates that the breakdown voltage is higher because the dielectric breakdown electric field is larger than that of the diode having no trench gate.

The trench gate 2 shown in FIG.
A region 36 between the lower ends 34 of the 8 is a region where the electric field acting on the diode 10 has the maximum value. However, the lower end portion 34 has the n ⁺ type silicon carbide substrate 12.
If it has reached, the region 36 does not become the region where the electric field has the maximum value. This is because the n ⁺ type silicon carbide substrate 12 has a high impurity concentration and exhibits a resistance value similar to that of metal. Therefore, in the diode according to the first embodiment of the present invention, the boundary between the n-type silicon carbide layer 14 and the n ⁺ -type silicon carbide substrate 12 becomes the peak of the electric field.

{Description of Effect} In the diode 10 according to the first embodiment of the present invention shown in FIG. 1, the rising voltage of the forward current of the diode is about 0.6 V which is the value of the energy gap of silicon. In this case, the breakdown electric field of the diode is about 3 × 10 ⁶ V / cm, which is the breakdown electric field of silicon carbide. Therefore, the first of the present invention
According to the diode 10 according to the embodiment, it is possible to realize a diode with high withstand voltage and low loss power.

[Second Embodiment] FIG. 7 is a sectional view of a diode according to a second embodiment of the present invention. FIG.
The same components as those of the diode 10 shown in FIG. 1 among the components of the diode 40 shown in FIG. The diode 40 differs from the diode 10 shown in FIG. 1 in the position of the lower end 34 of the trench gate 28. That is, the lower end 34 of the trench gate 28 of the diode 40 does not reach the n ⁺ -type silicon carbide substrate 12 but is located in the n-type silicon carbide layer 14.

The operation of the diode 40 is the same as the operation of the diode 10 according to the first embodiment of the present invention.
However, at the time of the OFF operation, in the n-type silicon carbide layer 14 (the area indicated by reference numeral 42 in FIG. 7) between the lower end 34 of one trench gate 28 and the lower end 34 of the other trench gate 28 The electric field acting on the diode 10 has a peak.

The manufacturing method of the diode 40 is different from the manufacturing method of the diode 10 shown in FIG.
Is a forming process. That is, in the method of manufacturing diode 40, the bottom of trench 24 is located in n-type silicon carbide layer 14 in the step shown in FIG.

The diode 40 according to the second embodiment of the present invention shown in FIG. 7 has the following effects in addition to the same effects as the diode 10 shown in FIG. That is, since the region between the lower ends 34 can be a region where the electric field acting on the diode 40 has the maximum value, the maximum electric field region can be set only by the depth of the trench. This increases the degree of freedom in designing the device structure.

Third Embodiment {Description of Structure} FIG. 8 is a sectional view of a diode according to a third embodiment of the present invention. Diode 1 shown in FIG.
The difference from 0 is that a silicon carbide layer is not included and a silicon layer is stacked. That is, the diode 50 has a structure in which an n-type silicon layer 54 and a p-type silicon layer 56 are sequentially stacked on an n ⁺ -type silicon substrate 52. The two trenches 62 form a p-type silicon layer 56,
Through the n-type silicon layer 54, the n ⁺ type silicon substrate 5
2 is formed. Each trench 62 has a trench gate 66 embedded therein. Between the side surface of each trench 62 and the trench gate 66, each trench 6
A gate oxide film 64 is formed between the bottom surface of trench 2 and trench gate 66. An electrode 68 is formed on the trench gate 66. An anode electrode 60 is formed on the p-type silicon layer 56 located between the trench gates 66. Of the surface of the n ⁺ type silicon substrate 52, n
A cathode electrode 58 is formed on a surface facing the surface on which the mold silicon layer 54 is formed.

{Description of Operation and Effect} Next, the operation of the diode 50 according to the third embodiment of the present invention will be described.
This will be described with reference to FIG. First, the ON operation will be described. A forward voltage is applied to the diode 50. For example, a voltage of 2 V is applied to the anode 60,
8, a voltage of 0 V is applied to each. At this time,
A current flows from the anode electrode 60 to the cathode electrode 58. Note that the same voltage as that of the anode electrode 60 or a voltage of about 10 V may be applied to the electrode 68 in order to further reduce the resistance.

Next, the OFF operation will be described. A reverse voltage is applied to the diode 50. For example, a voltage of 0 V is applied to the anode electrode 60, and 6 V is applied to the cathode electrode 58.
A voltage of 00 to 1000 V is applied respectively. The voltage of the electrode 68 may be the same as the voltage of the anode electrode 60. In order to obtain better off characteristics, a voltage of about −10 V may be applied to the electrode 68. By applying such a voltage to the electrode 68, at least a part of the edge of the depletion layer extending from the one trench gate 66 and the edge of the depletion layer extending from the other trench gate 66 are formed. At least a portion is connected by an n-type silicon layer 54. As a result, the reverse voltage is maintained, and the current is prevented from flowing through the diode 50. At this time, the peak of the electric field acting on the diode 50 is different between the p-type silicon layer 56 and the n-type silicon layer 54.
The peak of the electric field can also be located at the junction 70 between the n ⁺ -type silicon substrate 52 and the boundary 72 between the n ⁺ -type silicon substrate 52 and the n-type silicon layer 54.

This will be described with a simulation.
FIG. 18 is a simulation of an electric field generated in the diode 50. The vertical axis indicates the electric field intensity. The horizontal axis indicates the distance in the depth direction of the diode 50 from the surface of the p-type silicon layer 56. That is, 0 μm indicates the surface of the p-type silicon layer 56. The distance to the junction 70 is about 3.5 μm and the distance to the boundary 72 is about 17 μm. (A) of the simulation shows the case where the impurity concentration of the n-type silicon layer 54 is 1E15, and (b)
3C shows the case where the impurity concentration of the n-type silicon layer 54 is 4E15. As shown in FIG. 18, the peak of the electric field occurs at the junction and the boundary.

In this case, the dielectric breakdown electric field where the peak of the maximum value is located among the two peaks is the diode 5
A dielectric breakdown electric field of 0 results. By dispersing the peaks into a plurality, the maximum value of the electric field decreases. Therefore, according to the diode 50, a higher reverse voltage can be applied, so that the diode 50 is a diode excellent in withstand voltage.

{Description of Manufacturing Method} Next, a method of manufacturing the diode 50 according to the third embodiment of the present invention will be described.
This will be described with reference to FIGS. As shown in FIG.
^{A +} type silicon substrate 52 is prepared. n ⁺ type silicon substrate 5
2 has a thickness of 0.5 to 1 mm and an impurity concentration of 1 × 1
0 ¹⁸ to 1 × 10 ¹⁹ cm ⁻³ . The impurities are antimony or arsenic.

As shown in FIG. 10, an n-type silicon layer 74 is formed on an n ⁺ -type silicon substrate 52 by epitaxial growth. The thickness of the n-type silicon layer 74 is 10 to 10
0 μm and an impurity concentration of 1 × 10 ¹⁴ to 1 × 10 ¹⁶ c
m ^-3 . The impurity is phosphorus. n-type silicon layer 74
At the top of the n-type silicon layer 74,
As shown in FIG. 11, a p-type silicon layer 56 is formed.
The thickness of the p-type silicon layer 56 is 1 to ³ μm, and the impurity concentration is 1 × 10 ¹⁶ to 1 × 10 ¹⁷ cm ⁻³ . The impurity is boron. Note that the lower part of the n-type silicon layer 74 is
Type silicon layer 54.

As shown in FIG. 12, a plurality of trenches 62 are formed in this laminate by photolithography and etching. The trench 62 is formed so as to penetrate the p-type silicon layer 56 and the n-type silicon layer 54 and reach the n ⁺ -type silicon substrate 52. Trench 6
2 has a width w of 0.5 to 2 μm. The distance d ₁ between the trenches 62 is 0.5 to 5 μm.

As shown in FIG. 13, a gate oxide film 64 is formed on the side and bottom surfaces of the trench 62 by thermal oxidation. Gate oxide film 64 has a thickness of 0.05 to 0.2 μm. C so that the trench 62 is filled with the polysilicon film.
A polysilicon film is formed on the p-type silicon layer 56 by VD. The polysilicon film is etched back and trench 6 is formed.
The polysilicon film is left only in 2. This polysilicon becomes the trench gate 66.

As shown in FIG. 8, the n ⁺ type silicon substrate 5
A cathode electrode 58 made of metal is formed on the substrate 2 by an evaporation method. Further, a metal layer is formed on the p-type silicon layer 56 by an evaporation method. This metal layer is patterned to form an anode electrode 60 and an electrode 68. As described above, the diode 50 according to the third embodiment of the present invention is described.
Is completed.

[Fourth Embodiment] FIG. 14 is a sectional view of a diode according to a fourth embodiment of the present invention. The same components as those of the diode 50 shown in FIG. 8 among the components of the diode 80 shown in FIG. 14 are denoted by the same reference numerals and description thereof will be omitted. Diode 8
8 differs from the diode 50 shown in FIG. 8 in the position of the lower end 76 of the trench gate 66. That is,
The lower end 76 of the trench gate 66 of the diode 80 is n
It does not reach the ⁺ -type silicon substrate 52 and is located in the n-type silicon layer 54.

The operation of diode 80 is the same as the operation of diode 50 according to the third embodiment of the present invention.
However, at the time of the OFF operation, the diode is placed in the n-type silicon layer 54 (the area indicated by reference numeral 82 in FIG. 14) between the lower end 76 of one trench gate 66 and the lower end 76 of the other trench gate 66. The electric field acting on 80 peaks.

The difference between the method of manufacturing diode 80 and the method of manufacturing diode 50 shown in FIG.
Is a forming process. That is, in the method of manufacturing diode 80, the bottom of trench 62 is located in n-type silicon layer 54 in the step shown in FIG.

The diode 80 according to the fourth embodiment of the present invention shown in FIG. 14 has the same effect as the diode 50 shown in FIG.

[Brief description of the drawings]

FIG. 1 is a sectional view of a diode according to a first embodiment of the present invention.

FIG. 2 is a first process chart for describing a manufacturing process of the diode according to the first embodiment of the present invention.

FIG. 3 is a second process diagram for describing the manufacturing process of the diode according to the first embodiment of the present invention.

FIG. 4 is a third process diagram for describing the manufacturing process of the diode according to the first embodiment of the present invention.

FIG. 5 is a fourth process diagram for describing the manufacturing process of the diode according to the first embodiment of the present invention.

FIG. 6 is a fifth process diagram for describing the manufacturing process of the diode according to the first embodiment of the present invention.

FIG. 7 is a sectional view of a diode according to a second embodiment of the present invention.

FIG. 8 is a sectional view of a diode according to a third embodiment of the present invention.

FIG. 9 is a first process chart for describing a diode manufacturing process according to a third embodiment of the present invention.

FIG. 10 is a second process chart for describing the manufacturing process of the diode according to the third embodiment of the present invention.

FIG. 11 is a third process diagram for describing the manufacturing process of the diode according to the third embodiment of the present invention.

FIG. 12 is a fourth process diagram for describing the manufacturing process of the diode according to the third embodiment of the present invention.

FIG. 13 is a fifth process diagram for describing the manufacturing process of the diode according to the third embodiment of the present invention.

FIG. 14 is a sectional view of a diode according to a fourth embodiment of the present invention.

FIG. 15: When a reverse voltage is applied to the diode,
FIG. 4 is a diagram illustrating a simulation of a current flowing through a diode.

FIG. 16 is a diagram showing a simulation of an electric field generated in a diode having a trench gate.

FIG. 17 is a diagram showing a simulation of an electric field generated in a diode having no trench gate.

FIG. 18 is a diagram showing a simulation of an electric field generated in a diode according to a third embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 Diode 12 n ⁺ type silicon carbide substrate 14 n type silicon carbide layer 16 n type silicon layer 18 p type silicon layer 20 cathode electrode 22 anode electrode 24 trench 26 gate oxide film 28 trench gate 30 electrode 32 n type silicon layer 34 lower end 36 region 38 boundary 40 diode 42 region 50 diode 52 n ⁺ type silicon substrate 54 n type silicon layer 56 p type silicon layer 58 cathode electrode 60 anode electrode 62 trench 64 gate oxide film 66 trench gate 68 electrode 70 junction 72 boundary 74 n Type silicon layer 76 boundary 80 diode 82 region

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F003 AP00 AP06 BA27 BA91 BB04 BF06 BH06 BJ12 BJ15 BM01 BP11 BP31 BZ01

Claims (3)

[Claims] A first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type joined to the first semiconductor layer;
A diode comprising: a first trench gate and a second trench gate, wherein the second semiconductor layer is located between the first trench gate and the second trench gate, and is opposite to the diode. A diode, wherein a depletion layer extending from the first trench gate and a depletion layer extending from the second trench gate are formed in the second semiconductor layer when a direction voltage is applied. 2. The semiconductor device according to claim 1, wherein an impurity concentration in the second semiconductor layer, a distance between the first trench gate and the second trench gate,
The combination of the thickness of the gate insulating film of the trench gate and the thickness of the gate insulating film of the second trench gate is such that a depletion layer extending from the first trench gate when a reverse voltage is applied to the diode. A diode in which at least a part of the edge of the first semiconductor layer and at least a part of the edge of the depletion layer extending from the second trench gate are connected by the second semiconductor layer. 3. The semiconductor device according to claim 1, further comprising a third semiconductor layer of a second conductivity type, wherein the third semiconductor layer is in contact with the second semiconductor layer, and wherein the third semiconductor layer is the third semiconductor layer. One trench gate and the second
An energy gap between the first semiconductor layer and the second semiconductor layer is smaller than an energy gap of the third semiconductor layer, and a breakdown electric field of the third semiconductor layer is the first semiconductor layer. And a diode having a larger electric breakdown field of the second semiconductor layer.