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JP2001024481A - Composite tuning transformer - Google Patents

Composite tuning transformer

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Publication number
JP2001024481A
JP2001024481A JP11194197A JP19419799A JP2001024481A JP 2001024481 A JP2001024481 A JP 2001024481A JP 11194197 A JP11194197 A JP 11194197A JP 19419799 A JP19419799 A JP 19419799A JP 2001024481 A JP2001024481 A JP 2001024481A
Authority
JP
Japan
Prior art keywords
winding
tuning
tap
transformer
capacitance element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11194197A
Other languages
Japanese (ja)
Other versions
JP3517160B2 (en
Inventor
Takahiro Abe
貴弘 阿部
Takeshi Tamura
健 田村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SAGAMI EREKU KK
Original Assignee
SAGAMI EREKU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SAGAMI EREKU KK filed Critical SAGAMI EREKU KK
Priority to JP19419799A priority Critical patent/JP3517160B2/en
Publication of JP2001024481A publication Critical patent/JP2001024481A/en
Application granted granted Critical
Publication of JP3517160B2 publication Critical patent/JP3517160B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Superheterodyne Receivers (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a composite tuning transformer for uniformly suppressing the image frequency of a wide reception band in a simple circuit constitution. SOLUTION: An antenna turning transformer T1 is arranged at an input side, and a load tuning transformer T2 is arranged at an output side in this composite transformer. In this case, in the antenna tuning transformer T1, a primary input coil N1 for impedance matching and a primary tuning coil N2 with a tap (a) for tuning are transformer-coupled, and a variable capacitance element C and an additional capacitance element C1 are connected in parallel with the primary tuning coil N2 so that a primary resonance circuit can be formed. In the load tuning transformer T2, a coupled coil N3 with a tap (b) and a secondary tuning coil N4 with a tap (c) are coiled so as to be shared, and the tap (b) is directly connected with the secondary tuning coil N4, and the tap (c) is connected through an additional capacitance element C2 with the coupled coil N3. Then, this is connected with a variable capacitance element C in parallel so that a secondary resonance circuit can be formed. In the primary tuning coil N2, a coil N21 is serially connected through the tap (a) with a coil N22, and one end is connected with the variable capacitance element C and the additional capacitance element C1, and the other edge is grounded.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、アンテナインピー
ダンスと高周波増幅器の入力インピーダンスとの整合を
とリ、受信能率を高くすると共に、受信波を選択する同
調回路とイメージ妨害波を抑圧するトラップ回路を兼ね
備えるスーパヘテロダイン受信機の高周波複同調トラン
スに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tuning circuit for selecting a received wave and a trap circuit for suppressing an image interference wave while improving the matching between the antenna impedance and the input impedance of the high-frequency amplifier. The present invention relates to a high-frequency double-tuned transformer of a superheterodyne receiver having a function.

【0002】[0002]

【発明が解決しようとする課題】周波数変換により生じ
るイメージ周波数はスーパヘテロダイン方式特有の妨害
波である。このイメージ周波数fimは受信波f1 か
ら中間周波数fi の2倍離れた周波数であり、上側ヘ
テロダイン方式ではfim=f1 +2fi 、下側ヘ
テロダイン方式ではfim=f1 −2fi となる。
例えば、288kHzのLW帯波を受信するとき、中間
周波数を 450kHzとすると、上側ヘテロダイン方
式の場合、 288kHz+450kHz×2=1188kHz の周波数がイメージ周波数となる。このため、通常52
2kHz〜1710kHzのMW帯波にイメージ周波数
が入ってしまい混信する恐れがある。
The image frequency generated by the frequency conversion is an interference wave unique to the superheterodyne system. This image frequency fim is a frequency that is twice the intermediate frequency fi from the reception wave f1, and is fim = f1 + 2fi in the upper heterodyne system, and fim = f1−2fi in the lower heterodyne system.
For example, when receiving an LW band of 288 kHz, assuming that the intermediate frequency is 450 kHz, in the case of the upper heterodyne system, the image frequency is 288 kHz + 450 kHz × 2 = 1188 kHz. Therefore, usually 52
The image frequency enters the MW band wave of 2 kHz to 1710 kHz, which may cause interference.

【0003】このイメージ周波数を抑圧するには、高周
波同調コイルの段数を増やしたり、イメージ周波数に対
するトラップ回路を別に設けるなどの対策が必要とな
る。ところが、高周波同調コイルの段数を増やすと、回
路を構成する可変容量素子であるバリコンや可変容量ダ
イオードの数が増えて価格が上昇し、回路の調整も複雑
になる。また、価格の上昇を抑えるため、固定容量素子
を使用したイメージ周波数に対するトラップ回路を別に
設ける場合、特定のイメージ周波数は取り除くことがで
きても、受信周波数に応じて変化する広い受信帯域のイ
メージ周波数を固定的なトラップ回路で取り除くのは不
可能である。
In order to suppress the image frequency, it is necessary to take measures such as increasing the number of stages of the high-frequency tuning coil and separately providing a trap circuit for the image frequency. However, if the number of stages of the high-frequency tuning coil is increased, the number of variable capacitors and variable capacitance diodes, which are variable capacitance elements constituting the circuit, is increased, thereby increasing the price and complicating the adjustment of the circuit. In addition, when a trap circuit for an image frequency using a fixed capacitance element is separately provided in order to suppress a rise in price, even if a specific image frequency can be removed, an image frequency of a wide reception band that changes according to the reception frequency is used. Cannot be removed by a fixed trap circuit.

【0004】そこで本発明は、できるだけ少ない部品点
数と簡単な回路構成で広い受信帯域のイメージ周波数を
一様に抑圧することができる複同調トランスを提供する
ことを目的になされたものである。
Accordingly, an object of the present invention is to provide a double-tuned transformer capable of uniformly suppressing an image frequency in a wide receiving band with as few components as possible and a simple circuit configuration.

【0005】[0005]

【課題を解決するための手段】かかる目的を達成するた
めに、本発明は以下のように構成した。
In order to achieve the above object, the present invention is configured as follows.

【0006】すなわち、請求項1の発明は、タップa付
き1次同調巻線と並列に可変容量素子を接続して成るア
ンテナ同調トランスと、タップb付き結合巻線とタップ
c付き2次同調巻線を共用巻線すると共に、タップbは
直接2次同調巻線に、タップcはインピーダンス補正用
の付加容量素子を介して結合巻線にそれぞれ接続し、こ
れと並列に可変容量素子を接続して成る負荷同調トラン
スと、を入力側と出力側にそれぞれ配置し、1次同調巻
線のタップaを前記結合巻線に接続し、2次同調巻線の
タップcを直流遮断用の付加容量素子を介して増幅器に
接続することを特徴とするスーパヘテロダイン受信機の
複同調トランスである。請求項2の発明は、前記負荷同
調トランスの結合巻線と2次同調巻線を、その巻数と結
合係数をアレンジしながら2以上の巻溝を有する複数枚
つばのドラム型フェライトコアに巻回することを特徴と
する請求項1記載の複同調トランスである。請求項3の
発明は、前記負荷同調トランスの結合巻線と2次同調巻
線の結合係数を0.1乃至0.7に設定することを特徴
とする請求項1記載の複同調トランスである。請求項4
の発明は、前記2次同調巻線のタップcを介して直列接
続する巻線の結合係数を0.85乃至1.0に設定する
ことを特徴とする請求項1記載の複同調トランスであ
る。請求項5の発明は、前記結合巻線のタップbを介し
て直列接続する2つの巻線は、それぞれの巻き始めを同
極性にして磁束が加わり合う接続の相互誘導回路を形成
することを特徴とする請求項1記載の複同調トランスで
ある。請求項6の発明は、前記結合巻線と2次同調巻線
のタップb、cを介して直列接続する3つの巻線は、そ
れぞれの巻き始めを同極性にして磁束が加わり合う接続
の相互誘導回路を形成することを特徴とする請求項1記
載の複同調トランスである。
That is, the first aspect of the present invention is an antenna tuning transformer having a variable capacitance element connected in parallel with a primary tuning winding having a tap a, a coupling winding having a tap b and a secondary tuning winding having a tap c. A common winding is used for the wire, tap b is connected directly to the secondary tuning winding, tap c is connected to the coupling winding via an additional capacitance element for impedance correction, and a variable capacitance element is connected in parallel with this. , And a load tuning transformer composed of a primary tuning winding tap a connected to the coupling winding, and a secondary tuning winding tap c connected to an additional capacitor for blocking DC current. A double-tuned transformer for a superheterodyne receiver, wherein the transformer is connected to an amplifier via an element. According to a second aspect of the present invention, the coupling winding and the secondary tuning winding of the load tuning transformer are wound around a plurality of brim drum type ferrite cores having two or more winding grooves while arranging the number of turns and the coupling coefficient. The double-tuned transformer according to claim 1, wherein: The invention according to claim 3 is the double-tuned transformer according to claim 1, wherein a coupling coefficient between a coupling winding of the load tuning transformer and a secondary tuning winding is set to 0.1 to 0.7. . Claim 4
2. The double-tuned transformer according to claim 1, wherein the coupling coefficient of the winding connected in series via the tap c of the secondary tuning winding is set to 0.85 to 1.0. . The invention of claim 5 is characterized in that the two windings connected in series via the tap b of the coupling winding form a mutual induction circuit in which the respective winding starts have the same polarity and the magnetic flux is applied. The double-tuned transformer according to claim 1, wherein According to a sixth aspect of the present invention, the three windings connected in series via the taps b and c of the coupling winding and the secondary tuning winding are connected to each other so that the start of each winding has the same polarity and a magnetic flux is applied. 2. The double-tuned transformer according to claim 1, wherein an induction circuit is formed.

【0007】[0007]

【発明の実施の形態】以下に図面を参照して本発明の実
施の形態について説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0008】図1に、本発明を実施したスーパヘテロダ
イン受信機の複同調回路の回路図を示す。複同調回路
は、入力側にアンテナ同調トランスT1と出力側に負荷
同調トランスT2を配置する。アンテナ同調トランスT
1は、インピーダンス整合用の1次入力巻線N1と同調
用のタップa付き1次同調巻線N2を変成器結合し、1
次同調巻線N2と並列に可変容量素子Cと付加容量素子
C1を接続して一次共振回路を形成する。負荷同調トラ
ンスT2は、タップb付き結合巻線N3とタップc付き
2次同調巻線N4を共用巻線し、タップbは2次同調巻
線N4に直結し、タップcは付加容量素子C2を介して
結合巻線N3に接続する。そして、これらと並列に可変
容量素子Cを接続して二次共振回路を形成する。
FIG. 1 is a circuit diagram of a double tuning circuit of a superheterodyne receiver embodying the present invention. The double tuning circuit has an antenna tuning transformer T1 on the input side and a load tuning transformer T2 on the output side. Antenna tuning transformer T
Reference numeral 1 denotes a transformer coupling between a primary input winding N1 for impedance matching and a primary tuning winding N2 with a tap a for tuning, and
The variable capacitance element C and the additional capacitance element C1 are connected in parallel with the next tuning winding N2 to form a primary resonance circuit. The load tuning transformer T2 shares a coupling winding N3 with a tap b and a secondary tuning winding N4 with a tap c, the tap b is directly connected to the secondary tuning winding N4, and the tap c connects the additional capacitive element C2. Connected to the coupling winding N3 via the power supply. Then, a variable capacitance element C is connected in parallel with these to form a secondary resonance circuit.

【0009】1次入力巻線N1は、一端をアンテナ(図
示しない)に連結する端子1に接続し、他端をアースす
る。1次入力巻線N1は、ロッドアンテナとFETの高
インピーダンスで受けるときもある。
The primary input winding N1 has one end connected to a terminal 1 connected to an antenna (not shown) and the other end grounded. The primary input winding N1 may receive the high impedance of the rod antenna and the FET.

【0010】1次同調巻線N2は、タップaを介して巻
線N21と巻線N22を直列接続し、一端を可変容量素
子Cと付加容量素子C1に接続し、他端をアースする。
The primary tuning winding N2 has a winding N21 and a winding N22 connected in series via a tap a, one end connected to the variable capacitance element C and the additional capacitance element C1, and the other end grounded.

【0011】結合巻線N3は、タップbを介して巻線N
31とN32を直列接続し、一端を1次同調巻線N2の
タップaと、付加容量素子C2を介して2次同調巻線N
4のタップcに接続し、他端をアースする。巻線N3
1、N32は、それぞれの巻き始めを同極性にしてN3
1、N32の磁束が加わり合う接続の相互誘導回路を形
成する。
The coupling winding N3 is connected to the winding N through a tap b.
31 and N32 are connected in series, one end of which is connected to the tap a of the primary tuning winding N2 and the secondary tuning winding N via the additional capacitive element C2.
4 and connected to the other tap c, and the other end is grounded. Winding N3
1 and N32 have the same polarity at the beginning of each winding, and N3
1. The mutual induction circuit of the connection to which the magnetic flux of N32 is added is formed.

【0012】2次同調巻線N4は、タップcを介して巻
線N41とN42を直列接続し、一端を結合巻線N3の
タップbに接続し、他端を可変容量素子Cに接続する。
巻線N31、N41、N42は、それぞれの巻き始めを
同極性にして N31、N41、N42の磁束が加わり
合う接続の相互誘導回路を形成する。なお、それぞれの
巻線の極性を明らかにするために、巻線のスタート位置
を図のドットで示す。
The secondary tuning winding N4 has the windings N41 and N42 connected in series via a tap c, one end of which is connected to the tap b of the coupling winding N3, and the other end of which is connected to the variable capacitance element C.
The windings N31, N41, and N42 form a mutual induction circuit in which the magnetic fluxes of the windings N31, N41, and N42 are added with the respective winding starts having the same polarity. In order to clarify the polarity of each winding, the starting position of the winding is indicated by a dot in the figure.

【0013】タップcは、2次同調巻線N4の最大利用
電力レベル箇所付近から負荷回路とのインピーダンス整
合も併せて行いながら引き出し、直流遮断用の付加容量
素子C′を介してIC増幅器(図示しない)に連結する
端子2に接続する。また、付加容量素子C2を介して結
合巻線N3の一端と1次同調巻線N2のタップaにも接
続する。これにより、巻線N31、N32、N41、N
42、付加容量素子C2、可変容量素子Cによるイメー
ジ周波数に対するトラップ回路を形成する。付加容量素
子C2は、図では一端をタップa(あるいは結合巻線N
3の一端)と他端をタップcに接続しているが、一端を
タップa、b間の任意の一点と他端をタップb、c間の
任意の一点に接続してもよい。
The tap c is pulled out from the vicinity of the maximum available power level of the secondary tuning winding N4 while also performing impedance matching with the load circuit, and is connected to an IC amplifier (shown in FIG. No) is connected to terminal 2. In addition, one end of the coupling winding N3 and the tap a of the primary tuning winding N2 are connected via the additional capacitance element C2. Thereby, the windings N31, N32, N41, N
42, a trap circuit for an image frequency by the additional capacitance element C2 and the variable capacitance element C is formed. The additional capacitance element C2 has a tap a (or a coupling winding N) at one end in the figure.
Although one end of (3) and the other end are connected to tap c, one end may be connected to any one point between taps a and b and the other end may be connected to any one point between taps b and c.

【0014】巻線N31、N32、N41、N42は、
図2に示すように、キャップコアCAを有する3枚つば
ドラムコアDの第一溝D1と第二溝D2に巻回する。こ
のとき巻線N31、N32、N41、N42の巻数と干
渉度をアレンジし、巻線N3とN4の結合係数を0.1
〜0.7に設定し、巻線N41とN42の結合係数を
0.85〜1.0に設定する。
The windings N31, N32, N41 and N42 are
As shown in FIG. 2, it is wound around the first groove D1 and the second groove D2 of the three-flange drum core D having the cap core CA. At this time, the number of turns and the degree of interference of the windings N31, N32, N41, and N42 are arranged, and the coupling coefficient between the windings N3 and N4 is set to 0.1.
To 0.7, and the coupling coefficient between the windings N41 and N42 is set to 0.85 to 1.0.

【0015】本発明を実施した複同調回路は以上のよう
な構成で、端子1に加えられた入力信号を一次共振回路
と二次共振回路に導き、可変容量素子Cを変化させて特
定の受信周波数に同調させる。同時に、入力信号に混入
したイメージ妨害波を巻線N31、N32、 N41、
N42、付加容量素子C2、可変容量素子Cによるトラ
ップ回路により減衰する。
The double-tuned circuit embodying the present invention has the above-described configuration, and the input signal applied to the terminal 1 is led to the primary resonance circuit and the secondary resonance circuit, and the specific capacitance is changed by changing the variable capacitance element C. Tune to frequency. At the same time, the image interference wave mixed into the input signal is transmitted to the windings N31, N32, N41,
Attenuation is caused by a trap circuit including N42, the additional capacitance element C2, and the variable capacitance element C.

【0016】可変容量素子Cの容量を変化させると、図
3に示すように、受信周波数に応じて周波数特性全体が
略平行移動し、トラップ回路の共振周波数もバンド帯域
内において平行移動してイメージ周波数を抑圧する。
When the capacitance of the variable capacitance element C is changed, as shown in FIG. 3, the entire frequency characteristic moves substantially in parallel according to the reception frequency, and the resonance frequency of the trap circuit also moves in parallel within the band. Suppress frequency.

【0017】以下に、トラップ回路の共振周波数が受信
周波数に応じて移動する理由を具体的に説明する。図1
の負荷同調トランスT2の二次共振回路を考えやすくす
るために、以下のように回路を簡略化する。まず、図4
に示すように、タップb、cを入出力共通にしてタップ
cとし、結合巻線N3の巻線N32を省略する。これに
より、巻線N31、N41を単一巻線N43に置き換
え、タップcを介して巻線N43と巻線N42を直列接
続する。また、交流バイパスコンデンサC′は、バンド
帯域内のインピーダンスが略0となって無視でき、巻線
N21はインダクタンスを無限大と仮定して省略する。
さらに、付加容量素子C2についてはとりあえず除外
して考える。
Hereinafter, the reason why the resonance frequency of the trap circuit moves according to the reception frequency will be specifically described. FIG.
In order to make it easy to think of the secondary resonance circuit of the load tuning transformer T2, the circuit is simplified as follows. First, FIG.
As shown in (1), taps b and c are used as a common input and output to make tap c, and the winding N32 of the coupling winding N3 is omitted. As a result, the windings N31 and N41 are replaced with the single winding N43, and the winding N43 and the winding N42 are connected in series via the tap c. The impedance of the AC bypass capacitor C 'in the band is almost zero and can be ignored, and the winding N21 is omitted on the assumption that the inductance is infinite.
Further, the additional capacitive element C2 is considered for the time being excluded.

【0018】ここで巻線N43、N42に電流を流す
と、流れる電流は同じ方向に流れて磁束が加わり合い、
それに従って巻線N43、N42の自己インダクタンス
L43、L42はL43′、L42′に変わり、巻線
N43、N42の相互インダクタンスをM(M>0)と
すると、 L43′=L43+M L42′=L42+M となる。ここで、 L43 =L43′−M L42 =L42′−M であるから、巻線N43、N42は、等価的にL4
3′、L42′と直列に−Mを接続する回路を形成す
る。
Here, when a current flows through the windings N43 and N42, the flowing current flows in the same direction, and a magnetic flux is added.
Accordingly, the self-inductances L43 and L42 of the windings N43 and N42 are changed to L43 'and L42', and assuming that the mutual inductance of the windings N43 and N42 is M (M> 0), L43 '= L43 + M L42' = L42 + M . Here, since L43 = L43'-M L42 = L42'-M, the windings N43 and N42 are equivalent to L4
A circuit for connecting -M in series with 3 'and L42' is formed.

【0019】以上により、図4の回路を等価回路に置き
換えて可変容量素子CのキャパシタンスをCとすると、
図5に示すように、−Mと直列にL43′とL42′+
Cの並列回路を接続し、入力信号とアース回路の間にー
M、L43′、L42′、Cによるトラップ回路を形成
する。
As described above, when the circuit of FIG. 4 is replaced with an equivalent circuit and the capacitance of the variable capacitance element C is C,
As shown in FIG. 5, L43 'and L42' +
A parallel circuit of C is connected to form a trap circuit between -M, L43 ', L42', and C between the input signal and the ground circuit.

【0020】この等価回路のインピーダンスZを計算す
ると、
When the impedance Z of this equivalent circuit is calculated,

【数1】 となる。この等価回路のインピーダンスZを最大(分母
=0)にする周波数が受信周波数f0 となり、最小
(分子=0)にする周波数がトラップの共振周波数f
0′となる。従って、受信周波数f0 は、
(Equation 1) Becomes The frequency at which the impedance Z of the equivalent circuit is maximized (denominator = 0) is the reception frequency f0, and the frequency at which the impedance Z is minimum (numerator = 0) is the resonance frequency f of the trap.
0 '. Therefore, the reception frequency f0 is

【数2】 となり、トラップの共振周波数f0 ′は(Equation 2) And the resonance frequency f0 'of the trap is

【数3】 となる。(Equation 3) Becomes

【0021】以上により、本発明の複同調回路は、周波
数に応じてインピーダンスが変化し、可変容量素子Cと
巻線N31、N41、N42のリアクタンスが等しくな
る受信周波数f0 において同調し、可変容量素子Cと
結合係数Kあるいは巻数をアレンジしたN42のリアク
タンスが等しくなるトラップの共振周波数f0 ′にお
いて減衰を与える。従って、可変容量素子Cを変化させ
ると、図3に示すように、受信周波数f0に応じて周波
数特性全体が略平行移動し、このときトラップの共振周
波数f0′も可変容量素子Cの変化に応じて平行移動す
る。これにより、受信周波数f0 に応じて変化するイ
メージ周波数を抑圧することができる。
As described above, the double-tuned circuit of the present invention tunes at the receiving frequency f0 where the impedance changes according to the frequency and the reactance of the variable capacitance element C and the windings N31, N41 and N42 becomes equal. Attenuation is given at the resonance frequency f0 'of the trap where C and the coupling coefficient K or the reactance of N42 with the number of turns arranged are equal. Therefore, when the variable capacitance element C is changed, as shown in FIG. 3, the entire frequency characteristic moves substantially in parallel according to the reception frequency f0, and at this time, the resonance frequency f0 ′ of the trap also changes in accordance with the change in the variable capacitance element C. To translate. This makes it possible to suppress an image frequency that changes according to the reception frequency f0.

【0022】計算式より、トラップ回路のリアクタンス
は同調回路のリアクタンスに比べて小さいので、可変容
量素子Cの容量が大きい低周波領域ではトラップの共振
周波数f0 ′の移動幅は小さいが、可変容量素子Cの
容量が小さい高周波領域では移動幅が大きくなってより
高域に移動する。例えば、受信周波数f0 =999k
Hzでトラップの共振周波数f0 ′=1899kHz
の場合、より高い受信周波数f0 =1404kHzに
対してはトラップの共振周波数f0 ′=2304kH
z以上となる。このため、減衰帯域がイメージ周波数よ
り高くなってトラップが甘くなる。
From the calculation formula, the reactance of the trap circuit is smaller than the reactance of the tuning circuit. Therefore, in the low frequency region where the capacitance of the variable capacitor C is large, the movement width of the resonance frequency f0 'of the trap is small. In the high-frequency region where the capacitance of C is small, the movement width becomes large and moves to a higher region. For example, reception frequency f0 = 999k
And the resonance frequency f0 'of the trap in Hz is 1899 kHz
, For a higher reception frequency f0 = 1404 kHz, the resonance frequency f0 ′ of the trap = 2304 kHz
z or more. For this reason, the attenuation band becomes higher than the image frequency, and the trap becomes sweet.

【0023】そこで、図1に示すように、付加容量素子
C2を巻線N32、N41と並列に接続する。付加容量
素子C2を追加した分、トラップ回路と同調回路のリア
クタンスは共に大きくなるが、トラップ回路の方がより
大きくなるので、トラップの共振周波数f0 ′は受信
周波数f0 に比べてより低域に移動する。これによ
り、トラップの減衰帯域をイメージ周波数に近付けるこ
とができる。
Therefore, as shown in FIG. 1, the additional capacitance element C2 is connected in parallel with the windings N32 and N41. The reactance of the trap circuit and the tuning circuit both increases due to the addition of the additional capacitance element C2, but the trap circuit becomes larger, so that the resonance frequency f0 'of the trap moves to a lower range than the reception frequency f0. I do. This allows the trap attenuation band to approach the image frequency.

【0024】付加容量素子C2を追加すると負荷同調ト
ランスT2の受信周波数f0 が低域に移動するため、
アンテナ同調トランスT1の受信周波数f0 もこれに
合わせて低くし、そのために付加容量素子C1を追加す
る。付加容量素子C2の容量が小さい場合は、受信周波
数f0 もほとんど変化しないので、付加容量素子C1
を追加しないこともある。
When the additional capacitance element C2 is added, the reception frequency f0 of the load tuning transformer T2 moves to a low frequency.
The reception frequency f0 of the antenna tuning transformer T1 is also lowered accordingly, and an additional capacitance element C1 is added for that purpose. When the capacitance of the additional capacitance element C2 is small, the reception frequency f0 also hardly changes.
May not be added.

【0025】また、トラップの共振周波数f0 ′は、
結合係数Kを大きくすると計算式の分母が小さくなるの
で高域に移動し、結合係数Kを小さくすると分母が大き
くなるので低域に移動することが分かる。あるいは、結
合係数Kを固定して巻線N42の巻数を増やすと計算式
の分母が大きくなるので低域に移動し、巻線N42の巻
数を減らすと分母が小さくなるので高域に移動すること
がわかる。このように、結合係数Kあるいは巻線N42
の巻数に幅を持たせることにより、トラップの共振周波
数f0 ′をイメージ周波数帯域に合わせることができ
る。
The resonance frequency f0 'of the trap is
It can be seen that when the coupling coefficient K is increased, the denominator of the calculation formula becomes smaller, and thus the denominator moves to a higher frequency. Alternatively, when the number of turns of the winding N42 is increased while the coupling coefficient K is fixed, the denominator of the calculation formula becomes large, so that the denominator becomes smaller when the number of turns of the winding N42 is reduced. I understand. Thus, the coupling coefficient K or the winding N42
, The resonance frequency f0 'of the trap can be adjusted to the image frequency band.

【0026】本発明を実施した複同調回路の特性を、図
6に示す従来回路と比較すると、図7に示すように、イ
メージ周波数付近で減衰し、MW帯域で実測した結果バ
ンド帯域内において20dB〜45dBの改善が見られ
た。また、受信感度においても、従来回路と同等レベル
であり、他の電気特性を劣悪することなく、イメージ周
波数を抑圧している。さらに、複同調トランスの一方の
負荷同調トランスは、共用巻線のため従来に比べて大幅
に巻数が減り、複同調トランスの小型・軽量化を実現し
た。
When the characteristics of the double-tuned circuit embodying the present invention are compared with those of the conventional circuit shown in FIG. 6, as shown in FIG. 7, the characteristics are attenuated near the image frequency and measured in the MW band. An improvement of ~ 45 dB was seen. Also, the receiving sensitivity is at the same level as that of the conventional circuit, and the image frequency is suppressed without deteriorating other electric characteristics. Furthermore, the load tuning transformer, one of the double-tuned transformers, uses a common winding, so the number of turns is greatly reduced compared to the conventional type, realizing a compact and lightweight double-tuned transformer.

【0027】図8〜11に、本発明の複同調回路の変形
例を示す。図8の複同調回路は、タップb、b′付き2
次同調巻線N5と出力同調巻線N41を変成器結合し、
タップa、b′を介して1次同調巻線N2と2次同調巻
線N5を接続する。そして、タップb′は付加容量素子
C2を介して出力同調巻線N41の一端に接続すると共
に、タップbを出力同調巻線N41の他端に接続し、2
次同調巻線N5と並列に可変容量素子Cを接続して二次
共振回路を形成したものである。タップbの位置は、ト
ラップ位置補正のため、タップb′までの範囲で変更す
ることがある。
8 to 11 show modified examples of the double tuning circuit of the present invention. The double tuning circuit of FIG. 8 has two taps b and b '.
The next tuning winding N5 and the output tuning winding N41 are transformer-coupled,
The primary tuning winding N2 and the secondary tuning winding N5 are connected via taps a and b '. The tap b 'is connected to one end of the output tuning winding N41 via the additional capacitance element C2, and the tap b is connected to the other end of the output tuning winding N41.
A secondary resonance circuit is formed by connecting a variable capacitance element C in parallel with the next tuning winding N5. The position of the tap b may be changed in the range up to the tap b 'for correcting the trap position.

【0028】図9の複同調回路は、図1の回路の可変容
量素子Cと並列にトラッキング補正用の容量素子C0を
接続したものである。
The double-tuned circuit shown in FIG. 9 is obtained by connecting a capacitance element C0 for tracking correction in parallel with the variable capacitance element C of the circuit shown in FIG.

【0029】図10の複同調回路は、図1の回路の巻線
N21を単独に巻き、タップaを省いて結合巻線N3に
直結したものである。
The double-tuned circuit shown in FIG. 10 is a circuit in which the winding N21 of the circuit shown in FIG. 1 is independently wound, and the tap a is omitted, and the winding is directly connected to the coupling winding N3.

【0030】図11の複同調回路は、図1の回路の付加
容量素子C2をタップb、c間に接続したものである。
The double tuning circuit shown in FIG. 11 is obtained by connecting the additional capacitance element C2 of the circuit shown in FIG. 1 between taps b and c.

【0031】[0031]

【発明の効果】以上説明したように、本発明の複同調ト
ランスは、タップa付き1次同調巻線と並列に可変容量
素子を接続して成るアンテナ同調トランスと、タップb
付き結合巻線とタップc付き2次同調巻線を共用巻線す
ると共に、タップbは直接2次同調巻線に、タップcは
インピーダンス補正用の付加容量素子を介して結合巻線
にそれぞれ接続し、これと並列に可変容量素子を接続し
て成る負荷同調トランスと、を入力側と出力側にそれぞ
れ配置し、1次同調巻線のタップaを前記結合巻線に接
続し、2次同調巻線のタップcを直流遮断用の付加容量
素子を介して増幅器に接続する。従って、本発明によれ
ば、負荷同調トランスの共用巻線の相互誘導による相互
インダクタンスMとLCによるトラップ回路を形成する
ので、可変容量素子を変化させると受信周波数に連動し
てトラップ回路の共振周波数も変化し、受信周波数に応
じて変化するイメージ周波数を抑圧することができる。
さらに、インピーダンス補正用の付加容量素子がトラッ
プの共振周波数を低域に移動させるので、トラップの減
衰帯域をよりイメージ周波数に近付けることができる。
また、負荷同調トランスを共用巻線してそれぞれ相互イ
ンダクタンスMを引き出すので、トラップのための新た
な部品を必要とせず、経済的と信頼性が向上する。
As described above, the double-tuned transformer according to the present invention comprises an antenna-tuned transformer having a variable capacitance element connected in parallel with a primary tuning winding having a tap a, and a tap b.
And the secondary tuning winding with tap c are commonly used, the tap b is connected directly to the secondary tuning winding, and the tap c is connected to the coupling winding via an additional capacitance element for impedance correction. And a load tuning transformer comprising a variable capacitance element connected in parallel to the input and output sides, a tap a of a primary tuning winding connected to the coupling winding, and a secondary tuning winding connected. The tap c of the winding is connected to an amplifier via a DC blocking additional capacitance element. Therefore, according to the present invention, since a trap circuit is formed by the mutual inductance M and LC by mutual induction of the common winding of the load tuning transformer, when the variable capacitance element is changed, the resonance frequency of the trap circuit is interlocked with the reception frequency. Also changes, and the image frequency that changes according to the reception frequency can be suppressed.
Further, since the additional capacitance element for impedance correction shifts the resonance frequency of the trap to a low frequency, the attenuation band of the trap can be made closer to the image frequency.
Further, since the load tuning transformer is commonly wound and the mutual inductance M is drawn out, no new components for trapping are required, and the economy and reliability are improved.

【0032】また、本発明の複同調トランスは、負荷同
調トランスの共用巻線を、その巻数と結合係数をアレン
ジしながら2以上の巻溝を有する複数枚つばのドラム型
フェライトコアに巻回する。さらに、負荷同調トランス
の共用巻線は、それぞれの巻き始めを同極性にして磁束
が加わり合う接続の相互誘導回路を形成する。従って、
本発明によれば、負荷同調トランスの共用巻線の巻数と
結合係数によってトラップの共振周波数が変化するの
で、インピーダンス補正用の付加容量素子と共に巻数と
結合係数をアレンジしてトラップの共振周波数を適切に
イメージ周波数付近に合わせることができる。
Further, in the double-tuned transformer of the present invention, the common winding of the load-tuned transformer is wound around a plurality of brim drum type ferrite cores having two or more winding grooves while arranging the number of turns and the coupling coefficient. . Further, the common windings of the load tuning transformer form a mutual induction circuit in which the magnetic flux is applied with the respective winding starts having the same polarity. Therefore,
According to the present invention, since the resonance frequency of the trap changes depending on the number of turns and the coupling coefficient of the common winding of the load tuning transformer, the number of turns and the coupling coefficient are arranged together with the additional capacitance element for impedance correction to appropriately adjust the resonance frequency of the trap. Can be adjusted to the vicinity of the image frequency.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を実施した複同調回路の回路図である。FIG. 1 is a circuit diagram of a double tuning circuit embodying the present invention.

【図2】本発明を実施した同調コイルの巻線図である。FIG. 2 is a winding diagram of a tuning coil embodying the present invention.

【図3】本発明を実施した複同調回路の周波数特性図で
ある。
FIG. 3 is a frequency characteristic diagram of a double tuning circuit embodying the present invention.

【図4】図1の簡略回路図である。FIG. 4 is a simplified circuit diagram of FIG.

【図5】図4の等価回路図である。FIG. 5 is an equivalent circuit diagram of FIG.

【図6】従来の複同調回路の回路図である。FIG. 6 is a circuit diagram of a conventional double tuning circuit.

【図7】本発明を実施した複同調回路と従来回路の特性
を比較した図である。
FIG. 7 is a diagram comparing characteristics of a double-tuned circuit embodying the present invention and a conventional circuit.

【図8】本発明を実施した複同調回路の変形例である。FIG. 8 is a modified example of the double tuning circuit embodying the present invention.

【図9】本発明を実施した複同調回路のその他の変形例
である。
FIG. 9 is another modified example of the double tuning circuit embodying the present invention.

【図10】本発明を実施した複同調回路のその他の変形
例である。
FIG. 10 is another modified example of the double-tuned circuit embodying the present invention.

【図11】本発明を実施した複同調回路のその他の変形
例である。
FIG. 11 is another modified example of the double tuning circuit embodying the present invention.

【符号の説明】[Explanation of symbols]

1〜2 端子 C 可変容量素子 C′、C1、C2 付加容量素子 C0 トラッキング補正用容量素子 D ドラムコア D1 第一溝 D2 第二溝 CA キャップコア L 自己インダクタンス M 相互インダクタンス N1 1次入力巻線 N2 1次同調巻線 N3 結合巻線 N4 2次同調巻線 N41 出力同調巻線 N5 2次同調巻線 a、b、b′、c タップ T1 アンテナ同調トランス T2 負荷同調トランス 1-2 terminals C Variable capacitance elements C ', C1, C2 Additional capacitance elements C0 Tracking correction capacitance elements D Drum core D1 First groove D2 Second groove CA Cap core L Self-inductance M Mutual inductance N1 Primary input winding N2 1 Secondary tuning winding N3 Coupling winding N4 Secondary tuning winding N41 Output tuning winding N5 Secondary tuning winding a, b, b ', c Tap T1 Antenna tuning transformer T2 Load tuning transformer

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成12年6月2日(2000.6.2)[Submission date] June 2, 2000 (2006.2)

【手続補正1】[Procedure amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0009[Correction target item name] 0009

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0009】1次入力巻線N1は、端子1をアンテナ側
(図示しない)に接続し、他端をアースする。
The primary input winding N1 has the terminal 1 connected to the antenna side (not shown) and the other end grounded.

【手続補正2】[Procedure amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0013[Correction target item name] 0013

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0013】出力は、2次同調巻線N4のタップcから
引き出し、直流遮断用の付加容量素子C′を介してIC
増幅器(図示しない)に連結する端子2に接続する。ま
た、付加容量素子C2を介して結合巻線N3の一端と1
次同調巻線N2のタップaにも接続する。これにより、
巻線N31、N32、N41、N42、付加容量素子C
2、可変容量素子Cによるイメージ周波数に対するトラ
ップ回路を形成する。付加容量素子C2は、図では一端
をタップa(あるいは結合巻線N3の一端)と他端をタ
ップcに接続しているが、一端をタップa、b間の任意
の一点と他端をタップb、c間の任意の一点に接続して
もよい。
The output is drawn from the tap c of the secondary tuning winding N4, and is supplied to the IC via an additional capacitive element C 'for blocking DC current.
Connect to terminal 2 which connects to an amplifier (not shown). Further, one end of the coupling winding N3 and one end of the coupling winding N3 are connected via the additional capacitance element C2.
It is also connected to the tap a of the next tuning winding N2. This allows
Windings N31, N32, N41, N42, additional capacitance element C
2. A trap circuit for an image frequency is formed by the variable capacitance element C. In the figure, the additional capacitance element C2 has one end connected to the tap a (or one end of the coupling winding N3) and the other end connected to the tap c. It may be connected to any point between b and c.

【手続補正3】[Procedure amendment 3]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0027[Correction target item name] 0027

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0027】図8〜11に、本発明の複同調回路の変形
例を示す。図8の複同調回路は、タップb、b′付き2
次同調巻線N5と出力巻線N41を変成器結合し、タッ
プa、b′を介して1次同調巻線N2と2次同調巻線N
5を接続する。そして、タップb′は付加容量素子C2
を介して出力巻線N41の一端に接続すると共に、タッ
プbを出力巻線N41の他端に接続し、2次同調巻線N
5と並列に可変容量素子Cを接続して二次共振回路を形
成したものである。タップbの位置は、トラップ位置補
正のため、タップb′までの範囲で変更することがあ
る。
8 to 11 show modified examples of the double tuning circuit of the present invention. The double tuning circuit of FIG. 8 has two taps b and b '.
The transformer winding is coupled between the secondary tuning winding N5 and the output winding N41, and the primary tuning winding N2 and the secondary tuning winding N are connected via taps a and b '.
5 is connected. The tap b 'is connected to the additional capacitance element C2.
, And a tap b is connected to the other end of the output winding N41, and the secondary tuning winding N
5 and a variable capacitance element C is connected in parallel to form a secondary resonance circuit. The position of the tap b may be changed in the range up to the tap b 'for correcting the trap position.

【手続補正4】[Procedure amendment 4]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】符号の説明[Correction target item name] Explanation of sign

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【符号の説明】 1〜2 端子 C 可変容量素子 C′、C1、C2 付加容量素子 C0 トラッキング補正用容量素子 D ドラムコア D1 第一溝 D2 第二溝 CA キャップコア L42、L43 自己インダクタンス −M 相互インダクタンス N1 1次入力巻線 N2 1次同調巻線 N3 結合巻線 N4 2次同調巻線 N41 出力巻線 N5 2次同調巻線 a、b、b′、c タップ T1 アンテナ同調トランス T2 負荷同調トランス[Description of Signs] 1-2 terminals C Variable capacitance elements C ', C1, C2 Additional capacitance element C0 Tracking correction capacitance element D Drum core D1 First groove D2 Second groove CA Cap core L42, L43 Self-inductance -M Mutual inductance N1 primary input winding N2 primary tuning winding N3 coupling winding N4 secondary tuning winding N41 output winding N5 secondary tuning winding a, b, b ', c tap T1 antenna tuning transformer T2 load tuning transformer

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 タップa付き1次同調巻線と並列に可変
容量素子を接続して成るアンテナ同調トランスと、 タップb付き結合巻線とタップc付き2次同調巻線を共
用巻線すると共に、 タップbは直接2次同調巻線に、タップcはインピーダ
ンス補正用の付加容量素子を介して結合巻線にそれぞれ
接続し、 これと並列に可変容量素子を接続して成る負荷同調トラ
ンスと、を入力側と出力側にそれぞれ配置し、 1次同調巻線のタップaを前記結合巻線に接続し、 2次同調巻線のタップcを直流遮断用の付加容量素子を
介して増幅器に接続することを特徴とするスーパヘテロ
ダイン受信機の複同調トランス。
1. An antenna tuning transformer having a variable capacitance element connected in parallel with a primary tuning winding having a tap a, a coupling winding having a tap b and a secondary tuning winding having a tap c are commonly used. A tap b is directly connected to a secondary tuning winding, a tap c is connected to a coupling winding via an additional capacitance element for impedance correction, and a load tuning transformer formed by connecting a variable capacitance element in parallel with this; Are arranged on the input side and the output side, respectively. The tap a of the primary tuning winding is connected to the coupling winding, and the tap c of the secondary tuning winding is connected to the amplifier via a DC blocking additional capacitance element. A double-tuned transformer for a superheterodyne receiver.
【請求項2】 前記負荷同調トランスの結合巻線と2次
同調巻線を、その巻数と結合係数をアレンジしながら2
以上の巻溝を有する複数枚つばのドラム型フェライトコ
アに巻回することを特徴とする請求項1記載の複同調ト
ランス。
2. The method according to claim 1, wherein the coupling winding and the secondary tuning winding of the load tuning transformer are arranged by changing the number of windings and the coupling coefficient.
2. The double-tuned transformer according to claim 1, wherein said double-tuned transformer is wound around a plurality of brim drum type ferrite cores having said winding grooves.
【請求項3】 前記負荷同調トランスの結合巻線と2次
同調巻線の結合係数を0.1乃至0.7に設定すること
を特徴とする請求項1記載の複同調トランス。
3. The double-tuned transformer according to claim 1, wherein a coupling coefficient between a coupling winding of the load-tuning transformer and a secondary tuning winding is set to 0.1 to 0.7.
【請求項4】 前記2次同調巻線のタップcを介して直
列接続する巻線の結合係数を0.85乃至1.0に設定
することを特徴とする請求項1記載の複同調トランス。
4. The double-tuned transformer according to claim 1, wherein a coupling coefficient of a winding connected in series via a tap c of the secondary tuning winding is set to 0.85 to 1.0.
【請求項5】 前記結合巻線のタップbを介して直列接
続する2つの巻線は、それぞれの巻き始めを同極性にし
て磁束が加わり合う接続の相互誘導回路を形成すること
を特徴とする請求項1記載の複同調トランス。
5. The two windings connected in series via the tap b of the coupling winding form a mutual induction circuit in which the respective winding starts have the same polarity and a magnetic flux is applied. The double-tuned transformer according to claim 1.
【請求項6】 前記結合巻線と2次同調巻線のタップ
b、cを介して直列接続する3つの巻線は、それぞれの
巻き始めを同極性にして磁束が加わり合う接続の相互誘
導回路を形成することを特徴とする請求項1記載の複同
調トランス。
6. A mutual induction circuit in which three windings connected in series via taps b and c of the coupling winding and the secondary tuning winding are connected in such a manner that the start of each winding has the same polarity and a magnetic flux is applied. 2. The double-tuned transformer according to claim 1, wherein the transformer is formed.
JP19419799A 1999-07-08 1999-07-08 Double-tuned transformer Expired - Fee Related JP3517160B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19419799A JP3517160B2 (en) 1999-07-08 1999-07-08 Double-tuned transformer

Publications (2)

Publication Number Publication Date
JP2001024481A true JP2001024481A (en) 2001-01-26
JP3517160B2 JP3517160B2 (en) 2004-04-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
JP (1) JP3517160B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3410388B2 (en) 1999-04-30 2003-05-26 サガミエレク株式会社 Double-tuned transformer
JP2000324010A (en) 1999-05-11 2000-11-24 Sagami Ereku Kk Antenna tuning transformer
JP2000357977A (en) 1999-06-16 2000-12-26 Sagami Ereku Kk Double-tuned transformer

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