JP2001022322A - Driving method of plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driving method of a plasma display panel by which a scanning pulse of a threshold voltage or higher to start discharging can be impressed without generating discharge when the data pulse is not selected, a delay period for forming can be shortened, and a pulse width of the scanning pulse determined by the sum of the delay period for formation and a statistical delay period can be shortened. SOLUTION: A scanning pulse Pw consisting of a 1st scanning pulse of a voltage Vsc1 and a 2nd scanning pulse of a voltage Vsc2 is applied to scanning electrodes; the voltage Vsc1 has a voltage level of a 200-230 V pulse voltage of a pulse width 200-500 ns and is set to a threshold voltage to start discharging or higher; the voltage Vsc2 has a voltage level of a 170-200 V pulse voltage of a pulse width 1-3 μs lower than Vsc1, and set to the threshold voltage to start discharging or lower.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of driving a plasma display panel, and more particularly to a method of driving a plasma display panel for driving an AC discharge memory type plasma display panel.

[0002]

2. Description of the Related Art In general, a plasma display panel (hereinafter, referred to as a PDP) has a thin structure, has no flicker, has a large display contrast ratio, and can have a relatively large screen. It has many features, such as being able to emit multicolor light by using a phosphor in a light-emitting type, and has recently been widely used in the field of computer-related display devices and the field of color image display. It is becoming.

The driving method of this PDP includes an AC discharge type in which the electrodes are covered with a dielectric and indirectly operates in an AC discharge state, and an PDP driving method in which the electrodes are exposed to a discharge space and operated in a DC discharge state. There is a DC discharge type, and an AC discharge type includes an AC discharge memory type that uses a memory of a discharge cell as a driving method and an AC discharge refresh type that does not use a memory of a discharge cell. However, in the case of the AC discharge refresh type, since the brightness decreases as the display capacity increases, the AC discharge refresh type is mainly used for a PDP having a small display capacity, and the AC discharge memory type is used for a PDP having a large display capacity. Have been.

As a conventional AC discharge memory type PDP driving method, SOCIETY FOR INFORMATION is used.
N DISPLAY INTERNALION S
Ymposium digest of techni
CAL PAPERS VOLUME XXVI (p
p. 807-810).
FIG. 8 is a timing chart showing a driving voltage waveform in the conventional plasma display panel driving method.
In FIG. 8, Wu represents sustain electrodes Su1, Su2,.
., A sustain electrode drive pulse commonly applied to Suj, Ws
, Wsj are scanning electrodes Sc1, Sc
2,..., Scj are the scan electrode drive pulses respectively applied, and Wd is the data electrode drive pulse applied to the data electrode Di (1 ≦ i ≦ k), and one cycle (one frame) of drive is reserved. It is composed of a discharge period A, a write discharge period B, and a sustain discharge period C. This is repeated to obtain a desired image display.

In the write discharge period B, the scanning pulse P is sequentially applied to each of the scan electrodes Sc1, Sc2,.
w, and in synchronization with the scanning pulse Pw, the data electrode Di (1 ≦ i) of the display cell to be displayed.
≤ k), a data pulse Pd is selectively applied, and a cell to be displayed generates a write discharge to generate wall charges. As described in “plasma display” (pp. 50, Kenichi Owaki and Yoshinori Yoshida, Kyoritsu Shuppan Co., Ltd.), the writing discharge has a formation delay period and a statistical delay period. The delay period is the scan pulse P
When w is applied, charges are formed on the dielectric film on the scan electrode and the sustain electrode, and the internal potential difference corresponds to the time from the generation of electrons and ions in the discharge gas to the occurrence of discharge. The target delay period corresponds to the time from the time when ions remaining in the discharge gas reach the cathode to the time when sufficient secondary electron emission occurs, and has a temporal variation in discharge.

[0006]

However, in the prior art, in order to prevent an erroneous discharge when the data pulse Pd is not selected, the same voltage that is equal to or lower than the threshold voltage of the discharge start is set between the formation delay period and the statistical delay period. A voltage scan pulse is applied,
Since the formation delay period and the statistical delay period have unique values, the pulse width of the scan pulse composed of the formation delay period and the statistical delay period is uniquely determined. Therefore, in a large-screen and high-definition plasma display panel in which the number of scanning electrodes is large and the time allocated to the writing discharge period is limited, as the number of scanning electrodes increases, the time allocated to one scanning pulse decreases. In addition, there is a problem that a sufficient pulse width of the scanning pulse for reliably generating the writing discharge cannot be secured.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has as its object to reduce a voltage higher than a threshold voltage for starting discharge without causing erroneous discharge when a data pulse is not selected. Scan pulse can be applied, the formation delay period can be shortened, the pulse width of the scan pulse determined by the sum of the formation delay period and the statistical delay period can be reduced, and the time allotted to the writing discharge period is limited. It is an object of the present invention to provide a plasma display panel driving method which can cope with a large-sized high-definition plasma display panel.

[0008]

Means for Solving the Problems In order to solve the above problems, the present invention has the following constitution. The gist of the invention according to claim 1 is that a plurality of scan electrodes arranged in parallel, a plurality of sustain electrodes formed in the same plane as a pair with the scan electrodes, and the scan electrodes and the sustain electrodes are provided. In a plasma display panel including a plurality of orthogonal data electrodes and a plurality of display cells provided at intersections of the scan electrodes and the sustain electrodes with the data electrodes, a scan applied to the scan electrodes during a write discharge period A pulse and a data pulse applied to the data electrode selectively generate a wall voltage exceeding a threshold voltage for starting discharge in the display cell to control lighting or non-lighting of the plurality of display cells. A plasma display panel driving method, wherein an applied voltage waveform applied between the scan electrode and the sustain electrode during the write discharge period is lower than a first voltage. That the first application period lies in the plasma display panel driving method which is characterized in that composed of a second application period made of the second voltage of the first voltage and a different voltage. According to another aspect of the present invention, the first voltage is set to a voltage equal to or higher than the discharge start threshold voltage, and the second voltage is set to a voltage equal to or lower than the discharge start threshold voltage. A plasma display panel driving method according to claim 1, wherein: According to a third aspect of the invention, there is provided the plasma display panel driving method according to the first or second aspect, wherein the first application period is set to a period equal to or shorter than a formation delay period. The gist of the invention described in claim 4 is that the scan pulse comprises a first scan pulse and a second scan pulse having a lower voltage than the first scan pulse. In the plasma display panel driving method described in (1). The gist of the invention according to claim 5 is that the first scan pulse is set to a voltage equal to or higher than the discharge start threshold voltage, and the second scan pulse is set to a voltage equal to or lower than the discharge start threshold voltage. The plasma display panel driving method according to any one of claims 1 to 4, wherein the setting is performed. The gist of the invention according to claim 6 is that the pulse width of the first scanning pulse is set to a pulse width equal to or less than the formation delay period. It lies in the panel driving method. The gist of the invention according to claim 7 is that the first scan pulse and the second scan pulse have polarities opposite to those of the data pulse. It lies in the panel driving method. The gist of the present invention is that the sub-scanning pulse having the same polarity as the data pulse is applied to the sustain electrode at the same timing as the scanning pulse. In the plasma display panel driving method. The gist of the invention according to claim 9 is that the pulse width of the sub-scanning pulse is set to a pulse width equal to or less than the formation delay period. It depends on the driving method.

[0009]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 is a timing chart showing driving voltage waveforms in a first embodiment of a plasma display panel driving method according to the present invention, and FIG. 2 is driven by the driving voltage shown in FIG. FIG. 3 is a diagram showing a cross section of a display cell of a plasma display panel to be used, and FIG.
FIG. 2 is a diagram showing an arrangement of electrodes of a plasma display panel driven by the driving voltage shown in FIG.

As shown in FIG. 3, a plasma display panel (hereinafter referred to as a PDP) 15 to which the first embodiment is applied includes display cells 16 arranged in a matrix of j × k rows and columns. , And scan electrodes Sc1, Sc2,... Arranged in parallel with each other to form a pair.
Scj and sustain electrodes Su1, Su2,..., Suj
, And column electrodes composed of data electrodes D1, D2,..., Dk arranged orthogonally to the row electrodes, and the display cell 16 is arranged at each intersection of the row electrodes and the column electrodes. Have been.

As shown in FIG. 2, the display cell 16 comprises two insulating substrates 1 and 2 on the rear and front surfaces made of glass.
A transparent scanning electrode 3 and a sustaining electrode 4 formed on an insulating substrate 2, and a scanning electrode 3 for reducing electrode resistance.
Trace electrodes 5 and 6 formed so as to overlap with sustain electrode 4, data electrodes 7 formed on insulating substrate 1 at right angles to scan electrodes 3 and sustain electrodes 4, and insulating substrate 1.
A discharge gas space 8 filled with a discharge gas made of helium, neon, xenon, or the like, or a mixture thereof, a partition wall 9 for securing the discharge gas space 8 and separating display cells, Phosphor film 11 for converting ultraviolet light generated by gas discharge into visible light 10
And dielectric film 12 covering scan electrode 3 and sustain electrode 4
And a protective film 13 made of magnesium oxide or the like that protects the dielectric film 12 from discharge, and a dielectric film 14 that covers the data electrode 7. The scan electrode 3 includes a scan electrode Sc1,
, Scj, the sustain electrode 4 is connected to one of the sustain electrodes Su1, Su2,..., Suj, and the data electrode 7 is connected to the data electrodes D1, D2,. They are connected to one.

When the discharge operation of the display cell 16 is started by applying a pulse voltage exceeding the discharge threshold value between the scan electrode 3 and the data electrode 7, the discharge is started in accordance with the polarity of the pulse voltage. Positive and negative charges are applied to the dielectric films 12 and 1 on both sides.
The surface of the substrate 4 is attracted to the surface and a charge is deposited. Since the equivalent internal voltage due to the accumulation of the charges, that is, the wall voltage has the opposite polarity to the pulse voltage, the effective voltage inside the cell decreases as the discharge grows, and the pulse voltage becomes a constant value. Even if the discharge is maintained, the discharge is stopped when discharge cannot be maintained. Thereafter, when a sustain pulse having the same polarity as the wall voltage is applied between the adjacent scan electrode 3 and sustain electrode 4, the wall voltage is superimposed as an effective voltage. Even if the amplitude is low,
It is possible to discharge beyond the discharge threshold. Therefore,
By continuing to apply the sustain pulse between the scan electrode 3 and the sustain electrode 4 while reversing the polarity, it is possible to maintain the discharge. This function is a memory function. Further, by applying to the scan electrode 3 or the sustain electrode 4 an erase pulse which is a pulse of a wide low voltage or a pulse of about a narrow sustain pulse voltage to neutralize wall charges, Can be stopped.

Next, the drive voltage waveform in the first embodiment will be described in detail. In FIG. 1, Wu is a sustain electrode drive pulse commonly applied to sustain electrodes Su1, Su2,..., Suj, Ws1, Ws2,.
Are the scan electrode driving pulses applied to the scan electrodes Sc1, Sc2,..., Scj, respectively, and Wd is the data electrode D
This is a data electrode drive pulse applied to i (1 ≦ i ≦ k). One cycle (one frame) of drive is composed of a preliminary discharge period A, a write discharge period B, and a sustain discharge period C. To obtain the desired video display.

The preliminary discharge period A is a period for generating active particles and wall charges in the discharge gas space 8 in order to obtain a stable write discharge characteristic in the write discharge period B. In contrast, after applying a pre-discharge pulse Pp for simultaneously discharging all display cells 16 to the sustain electrode 4, of the wall charges generated by the application of the pre-discharge pulse, charges that hinder the writing discharge and the sustain discharge disappear. A pre-discharge erasing pulse Ppe is applied to the scan electrodes 3 to cause the discharge. That is, first, the preliminary discharge pulse Pp is applied to the sustain electrodes Su1, Su2,..., Suj to cause a discharge in all display cells, and then the preliminary discharge pulses Pp are applied to the scan electrodes Sc1, Sc2,. An erasing discharge is generated by applying a discharge erasing pulse Ppe, and the accumulated wall charges are erased by the preliminary discharge pulse.

In the write discharge period B, the scanning pulse P is sequentially applied to each of the scan electrodes Sc1, Sc2,.
w and the data electrode Di (1 ≦ i ≦ k) of the display cell to be displayed in synchronization with the scanning pulse Pw.
, A write pulse is generated in the display cell 16 to be displayed to generate a wall charge. The scanning pulse Pw has a pulse voltage of 200 to 23.
A first scanning pulse having a voltage of about 0 V and a pulse width of about 200 to 500 ns, a pulse voltage of 170 to 200 V, and a pulse width of 1;
And a second scan pulse having a voltage lower than that of the first scan pulse of about 3 μs. Note that the scanning pulse Pw and the data pulse Pd are set to pulses of opposite polarities.

In the sustain discharge period C, a sustain pulse Pc is applied to the sustain electrode 4 and a sustain pulse Ps delayed by 180 degrees from the sustain pulse Pc is applied to the scan electrode 3. The discharge is maintained for a period necessary for obtaining the desired luminance for the display cell 16 which has performed the above.

Next, the operation of the write discharge in the write discharge period B of the first embodiment will be described in detail with reference to FIGS. FIG. 4 is a timing chart for explaining a write discharge to one display cell during a write discharge period of the drive voltage waveform shown in FIG.
FIG. 4 is a diagram illustrating a relationship between a voltage of a scan pulse and a formation delay period according to the present invention.

A scan pulse Pw consisting of a first scan pulse of voltage Vsc1 and a second scan pulse of voltage Vsc2 is applied to scan electrode 3. The voltage Vsc1 is a pulse voltage 200
230 V and a pulse width of about 200 to 500 ns, which is set to be equal to or higher than the threshold voltage for starting discharge. The voltage Vsc2 is lower than the voltage Vsc1 of a pulse voltage of 170 to 200 V and a pulse width of about 1 to 3 μs. And
It is set below the discharge start threshold voltage. Voltage Vs
When the first scan pulse of c1 is applied, positive and negative charges are attracted to the dielectric film 12 on the scan electrode 3 and the sustain electrode 4, and charge is deposited, and the charge is set to be equal to or higher than the discharge start threshold voltage. When the first scan pulse of the applied voltage Vsc1 is continuously applied, the equivalent internal voltage, that is, the wall voltage due to the charge accumulation exceeds the threshold voltage of the discharge start, and the voltage between the scan electrode 3 and the sustain electrode 4 is increased. Since the discharge is started, the voltage Vsc1
Is set to be equal to or less than the formation delay period. That is, as shown in FIG. 5, the formation delay time which is shortened by increasing the voltage Vw of the scanning pulse Pw, that is, a pulse width equal to or less than the formation delay period is set. In FIG. 5, when the threshold voltage of the discharge start is 200 V, if the scanning pulse Pw of 200 V or more is applied continuously for the formation delay period or more, an erroneous lighting may occur even if the data pulse Pd is not applied. It is shown. It is considered that the shortening of the formation delay period is attributable to the reduction of the charge formation time by increasing the voltage Vw and the reduction of the generation time of electrons and ions in the discharge gas.

When the data pulse Pd is selected, the data pulse Pd of the voltage Vd is generated at the same timing as the scanning pulse Pw.
Is applied, and discharge light emission is started during a statistical delay period when the wall voltage exceeds the discharge start threshold voltage. That is, the sum of voltage Vd and voltage Vsc1, which are voltages applied between scan electrode 3 and data electrode 7, and voltage Vd and voltage Vsc
The sum value of SC2 is set to a voltage exceeding the discharge start threshold voltage, and write discharge occurs between scan electrode 3 and data electrode 7.

When the data pulse Pd is not selected,
After applying the first scanning pulse of the voltage Vsc1 equal to or higher than the discharge start threshold voltage with a pulse width equal to or shorter than the formation delay period, the voltage Vsc2 equal to or lower than the discharge start threshold voltage is applied.
An erroneous discharge does not occur between the scan electrode 3 and the sustain electrode 4, and there is no erroneous lighting.

As described above, according to the first embodiment of the present invention, since the first scan pulse having a voltage equal to or higher than the discharge start threshold voltage is applied with a pulse width equal to or shorter than the formation delay period, the data pulse is not changed. In the case of non-selection, it is possible to shorten the formation delay period without causing erroneous discharge between the scan electrode and the sustain electrode, and the pulse of the scan pulse determined by the sum of the formation delay period and the statistical delay period The width can be shortened, and an effect is provided that it is possible to cope with a large-screen and high-definition plasma display panel in which the time allocated to the writing discharge period is restricted.

(Second Embodiment) FIG. 6 is a timing chart showing driving voltage waveforms in a second embodiment of the plasma display panel driving method according to the present invention.

In the second embodiment, in the write discharge period B, the sustain electrodes Su1, Su2,..., Sc1, Sc2,..., Scj have the same timing as the scan pulse Pw of the opposite polarity to the data pulse Pd. ..., Suj
The sub-scanning pulse Ps having the same polarity as the data pulse Pd
Apply w. The sum of the voltage of the sub-scanning pulse Psw and the voltage of the scanning pulse Pw is set so as to be equal to or higher than a threshold voltage at which a discharge is started between the scanning electrode 3 and the sustaining electrode 4, and the pulse width of the sub-scanning pulse Psw is It is set below the formation delay period. In the second embodiment, the first scan pulse of the first embodiment is divided into sustain electrodes Su1, Su2,..., Suj, and the other operations and effects are the same as those of the first embodiment.

(Third Embodiment) FIG. 7 is a timing chart showing driving voltage waveforms in a third embodiment of the plasma display panel driving method according to the present invention.

In the third embodiment, in the writing discharge period B, a scan pulse Pw composed of a first scan pulse and a second scan pulse having a lower voltage than the first scan pulse is applied,
At the same timing as the scanning pulse Pw, the sustain electrodes Su1,
A sub-scanning pulse Psw of the same polarity as the data pulse Pd is applied to Su2,..., Suj. Sub-scanning pulse P
The sum of the voltage of sw and the voltage of the first scan pulse is set to be equal to or higher than the threshold voltage for starting discharge, and the pulse widths of the sub-scan pulse Psw and the first scan pulse are set to be equal to or less than the formation delay period. I have. The third embodiment is a combination of the first embodiment and the second embodiment, and other operations and effects are the same as those of the first embodiment.

It should be noted that the present invention is not limited to each of the above embodiments, and each embodiment can be appropriately modified within the scope of the technical idea of the present invention. Further, the number, position, shape, and the like of the constituent members are not limited to the above-described embodiment, but can be set to numbers, positions, shapes, and the like suitable for carrying out the present invention. In the drawings, the same components are denoted by the same reference numerals.

[0028]

According to the plasma display panel driving method of the present invention, a first scanning pulse having a voltage higher than a threshold voltage for starting discharge between a scanning electrode and a sustaining electrode is applied with a pulse width shorter than a formation delay period. Since the formation delay period can be reduced without causing erroneous discharge when the data pulse is not selected, the pulse width of the scan pulse determined by the sum of the formation delay period and the statistical delay period can be reduced. In addition, there is an effect that it is possible to cope with a large-screen and high-definition plasma display panel in which the time allocated to the writing discharge period is restricted.

[Brief description of the drawings]

FIG. 1 is a timing chart showing driving voltage waveforms in a first embodiment of a plasma display panel driving method according to the present invention.

FIG. 2 is a diagram showing a cross section of a display cell of the plasma display panel driven by the driving voltage shown in FIG.

FIG. 3 is a diagram showing an arrangement of electrodes of a plasma display panel driven by the driving voltage shown in FIG.

4 is a timing chart for explaining a write discharge to one display cell during a write discharge period of the drive voltage waveform shown in FIG. 1;

FIG. 5 is a diagram illustrating a relationship between a voltage of a scan pulse and a formation delay period according to the present invention.

FIG. 6 is a timing chart showing driving voltage waveforms in a second embodiment of the plasma display panel driving method according to the present invention.

FIG. 7 is a timing chart showing a driving voltage waveform in a third embodiment of the plasma display panel driving method according to the present invention.

FIG. 8 is a timing chart showing a driving voltage waveform in a conventional plasma display panel driving method.

[Description of Signs] 1, 2 Insulating substrate 3, Sc1, Sc2, ..., Scj Scanning electrode 4, Su1, Su2, ..., Suj Sustain electrode 5, 6 Trace electrode 7, D1, D2, , Dk Data electrode 8 Discharge gas space 9 Partition wall 10 Visible light 11 Phosphor film 12, 14 Dielectric film 13 Protective film 15 Plasma display panel (PDP) 16 Display cell Wu Sustain electrode drive pulse Ws1, Ws2,..., Wsj Scan electrode drive pulse Wd Data electrode drive pulse Pp Predischarge pulse Ppe Predischarge erase pulse Psw Subscan pulse Pw Scan pulse Pd Data pulse Pc, Ps Sustain pulse

Claims (9)

[Claims] 1. A plurality of scan electrodes arranged in parallel, a plurality of sustain electrodes paired with the scan electrodes and formed on the same plane, and a plurality of data orthogonal to the scan electrodes and the sustain electrodes. In a plasma display panel including electrodes, a plurality of display cells provided at intersections of the scan electrodes and the sustain electrodes and the data electrodes, a scan pulse applied to the scan electrodes during a writing discharge period; Depending on the data pulse applied to the electrode,
A plasma display panel driving method for controlling lighting or non-lighting of the plurality of display cells by selectively generating a wall voltage exceeding a discharge start threshold voltage inside the display cells, wherein the write discharge period An applied voltage waveform applied between the scan electrode and the sustain electrode is constituted by a first applied period consisting of a first voltage and a second applied period consisting of a second voltage different from the first voltage. Characteristic plasma display panel driving method. 2. The method according to claim 1, wherein the first voltage is set to a voltage equal to or higher than the discharge start threshold voltage, and the second voltage is set to a voltage equal to or lower than the discharge start threshold voltage. Item 3. A method for driving a plasma display panel according to Item 1. 3. The plasma display panel driving method according to claim 1, wherein the first application period is set to a period equal to or shorter than a formation delay period. 4. The plasma display panel according to claim 1, wherein the scan pulse comprises a first scan pulse and a second scan pulse having a lower voltage than the first scan pulse. Drive method. 5. The method according to claim 1, wherein the first scan pulse is set to a voltage equal to or higher than the discharge start threshold voltage, and the second scan pulse is set to a voltage equal to or lower than the discharge start threshold voltage. The method of driving a plasma display panel according to claim 1. 6. The plasma display panel driving method according to claim 1, wherein a pulse width of the first scan pulse is set to a pulse width equal to or shorter than the formation delay period. 7. The method according to claim 1, wherein the first scan pulse and the second scan pulse have opposite polarities to the data pulse. 8. The method according to claim 1, wherein a sub-scanning pulse having the same polarity as the data pulse is applied to the sustain electrode at the same timing as the scanning pulse. . 9. The plasma display panel driving method according to claim 1, wherein a pulse width of the sub-scanning pulse is set to a pulse width equal to or less than the formation delay period.