JP2001016134A - Receiver for cdma and path searching method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption. SOLUTION: When a power source is turned on, a control circuit 23 activates a matched filter 20, prepares a delay profile for one-symbol time and stores it in a memory 26 so that a data signal can be extracted by inversely spreading a baseband signal for each path on a condition generating a multipath. When the reception of information from a base station is started, the control circuit 23 prepares a delay profile with delay time width shorter than one-symbol time as a unit for every lapse of prescribed time. The control circuit 23 discriminates the presence/absence of an effective path within the range where the delay profile is prepared and when the presence is discriminated, the prepared delay profile is stored in the memory 26. Then, the operation of the matched filter 20 is stopped. Thus, the operation of the matched filter 20 having great power consumption is suppressed and power consumption can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CDMA (Code Division Multiple A) using a spread spectrum communication system.
More particularly, the present invention relates to a CDMA receiving apparatus capable of reducing power consumption and a path searching method thereof.

[0002]

2. Description of the Related Art CDM using spread spectrum communication system
2. Description of the Related Art A (Code Division Multiple Access) receiving apparatus has been widely used and applied to mobile telephone apparatuses and the like. In the spread spectrum communication system, an information symbol indicating information to be transmitted is a PN (Pseudo Noise) sequence or Go.
direct spreading (DS) which spreads the power spectrum by being multiplied with a spreading code such as an ld code
uence) method. The signal spread by the direct spreading method is sent to a CDMA receiving device by a wireless signal, and the CDMA receiving device demodulates a baseband signal from the wireless signal and then performs a correlation operation between the baseband signal and the spreading code. By executing (despreading), the transmitted information is extracted.

At this time, when a multipath having a plurality of propagation paths (paths) of the radio signal occurs due to reflection of the radio signal on a mountain or a building, fading occurs, and the waveform of the radio signal is distorted and transmitted. Information may not be retrieved correctly. In order to cope with fading due to such multipath, some CDMA receivers include a device called a RAKE receiver.

[0004] The RAKE receiver obtains the timing for starting the correlation operation and the reception level for each path of the received radio signal, and performs despreading according to each path using a plurality of correlators. The RAKE receiver amplifies and collects (RAKE) a data signal obtained by despreading using a plurality of correlators according to the reception level of each path.
Thus, the transmitted information is extracted.

Here, as a technique for obtaining the timing and the reception level at which the correlation calculation is started, a technique using pilot symbols spread by a known spreading code is known, and is called a pilot method. The pilot symbol is transmitted from a base station of the wireless communication system using a communication channel different from a communication channel for transmitting normal information symbols.

In this pilot system, a RAKE receiver obtains a large number of correlation values between a pilot symbol and a spreading code while changing a start position of a correlation operation, and creates a delay profile indicating a change in received signal power. And RA
The KE receiver specifies a delay time at which the received signal power indicated by the delay profile is greater than a predetermined reference value as a valid path position.

As a technique using such a pilot system, Japanese Patent Laid-Open Publication No. Hei 10-112667 discloses a technique for reducing power consumption by operating a matched filter only when a pilot symbol is received to obtain a correlation value. Is disclosed.

In a situation where multipath occurs, CDMA
Since the propagation path of each path changes as the position of the receiving apparatus moves, it is necessary to periodically specify the position of the effective path.

[0009]

However, Japanese Patent Application Laid-Open No.
In the technique disclosed in Japanese Patent Application Laid-Open No. 0-112667, a delay profile of one symbol time is created each time a pilot symbol is received.

Here, assuming that the diameter of a range covered by one cell is about 5 to 10 km, when a delay profile of one symbol time is created, a correlation value in a range in which no path is considered to exist is obtained. It is thought that it is also seeking. For example, so-called W-CDMA (Wideband Cod)
In the e Division Multiple Access (E Division Multiple Access) system, the chip rate is 4.096 megachips per second, and a delay corresponding to one chip time is caused by a propagation path length difference of about 70 m. According to the W-CDMA system, the spreading ratio is 256. That is, one symbol is spread by a 256-chip spreading code. From this, the delay corresponding to one symbol time is about 18 k
This is caused by the difference in propagation path length of m.

Therefore, when the position of a valid path is periodically specified, the timing of starting the correlation between the baseband signal and the spreading code changes unless the CDMA receiver changes the position very quickly. do not do. That is, in many cases, in order to create a delay profile of one symbol time, it is considered that a wide range of correlation values where no path exists exists.

A matched filter is used to obtain a correlation value between a baseband signal and a spreading code. However, the matched filter has a large power consumption,
If a correlation value in a range where no path exists is found, large power is wasted.

The present invention has been made in view of the above situation, and an object of the present invention is to provide a CDMA receiving apparatus capable of reducing power consumption and a path search method therefor.

[0014]

In order to achieve the above object, a CDMA receiver according to a first aspect of the present invention receives a radio signal and delays a demodulated baseband signal while transmitting a pilot symbol. Correlation operation executing means for executing a correlation operation with a spreading code to be spread, integration means for obtaining a received signal power by integrating a result of the correlation operation being executed by the correlation operation executing means, and a reception signal obtained by the integration means Profile storage means for storing a delay profile created from electric power, and, when creating a delay profile, causing the correlation operation execution means to execute a correlation operation within a delay time width shorter than one symbol time, and the integration means It is determined whether or not the obtained received signal power is larger than a predetermined reference value. Storing the delay profile in the means, stopping the operation of the correlation calculation executing means, and determining that the received signal power is equal to or less than the reference value, performing the correlation calculation in a longer delay time range. And an operation control means for creating a delay profile.

According to the present invention, when creating the delay profile, the operation control means causes the correlation calculation execution means to execute the correlation calculation within a delay time width shorter than one symbol time, thereby creating the delay profile. If there is a valid path within the range, the delay profile is stored in the profile storage means and the operation of the correlation calculation execution means is stopped.
Thereby, the operation of the correlation calculation executing means can be suppressed, and the power consumption can be reduced.

It is preferable that the operation control means creates a delay profile of one symbol time when power is turned on. Thereby, when information is received from the base station thereafter, the correlation calculation execution means can execute the correlation calculation within a delay time width shorter than one symbol time based on the delay profile.

There is a high possibility that there is an effective path near the delay time at which the received signal power shown in the delay profile is the largest. Therefore, the operation control unit reads the delay profile stored in the profile storage unit, and performs a correlation operation in a predetermined delay time width range around a delay time at which the received signal power is maximized. The correlation calculation execution means is executed, and it is determined whether or not the received signal power obtained by the integration means is larger than the reference value. If it is determined that the received signal power is large, a delay profile is stored in the profile storage means to execute the correlation calculation. When the operation of the means is stopped, and it is determined that the received signal power is equal to or less than the reference value, the range in which the correlation calculation execution means executes the correlation calculation is extended by the same time width as the predetermined delay time width and the delay is extended. A profile may be created. As a result, it is possible to efficiently detect an effective path and suppress the operation of the correlation calculation executing means, thereby reducing power consumption.

Further, the operation control means reads the delay profile stored in the profile storage means, and reads the delay profile within a delay time width defined by a plurality of delay times at which the received signal power becomes larger than the reference value. The correlation calculation is executed by the correlation calculation execution means, and it is determined whether or not the received signal power obtained by the integration means is larger than the reference value. If the received signal power is determined to be larger, a delay profile is stored in the profile storage means. The operation of the correlation calculation executing means may be stopped, and when it is determined that the received signal power is equal to or less than the reference value, a range in which the correlation calculation executing means executes the correlation calculation may be extended to create a delay profile. Even in this case, an effective path can be detected efficiently, and the operation of the correlation calculation execution means can be suppressed, and power consumption can be reduced.

More specifically, when the operation control means determines that the received signal power obtained by the integration means is equal to or less than the reference value, the operation control means reads the delay profile stored in the profile storage means, and Within the delay time range defined by the delay time when the power is not zero,
The correlation calculation executing means may execute a correlation calculation.

When the operation control means determines that the received signal power obtained by the integration means is equal to or less than the reference value, the operation control means reads the delay profile stored in the profile storage means, and reads the delay profile smaller than the reference value. The correlation calculation executing means may execute the correlation calculation within a delay time range defined by a delay time at which the received signal power becomes larger than the reference value of 2.

A path having a large number of reflections is considered to have a large attenuation, and the amount of delay time is larger than a path having the highest received signal power. Therefore, the operation control means reads the delay profile stored in the profile storage means, and executes the correlation calculation in a range from a delay time when the received signal power is the largest to a time delayed by a predetermined time. The delay profile may be created by the means. As a result, it is possible to efficiently detect an effective path and suppress the operation of the correlation calculation executing means, thereby reducing power consumption. Further, it is preferable that the correlation calculation execution means executes a correlation calculation using a matched filter.

A CDM according to a second aspect of the present invention
The path search method of the receiving apparatus for A performs a correlation operation step of executing a correlation operation with a spreading code for spreading a pilot symbol while delaying a baseband signal within a delay time width shorter than one symbol time by a matched filter. An integration step of integrating the operation result in the correlation operation step to obtain a received signal power to create a delay profile; and determining whether the received signal power obtained in the integration step is greater than a predetermined reference value. A discriminating step for discriminating, and if it is determined in the discriminating step that the received signal power is larger than the reference value, despreading for extracting a data signal is performed assuming that there is a valid path, A search ending step of storing in a memory, stopping the operation of the matched filter, and ending the path search. Provided, characterized in that.

According to the present invention, the correlation operation step comprises:
The correlation calculation is performed within a delay time range shorter than one symbol time, and the calculation result is integrated in an integration step to obtain a received signal power. The determining step determines whether or not the received signal power is greater than a predetermined reference value, and the search ending step determines that the received signal power is greater than the reference value in the determining step, and determines that there is a valid path and determines that the data signal is present. , And the delay profile is stored in the memory to stop the operation of the matched filter. Thus, the operation of the matched filter can be suppressed, and power consumption can be reduced.

[0024] The correlation calculation step may include a step of reading a delay profile stored in a memory and executing a correlation calculation in a predetermined range around a delay time at which the received signal power is maximized. Good.
This makes it possible to efficiently detect a valid path and suppress the operation of the matched filter, thereby reducing power consumption.

In the correlation operation step, the delay profile stored in the memory is read, and the correlation operation is performed within a delay time range defined by a plurality of delay times at which the received signal power becomes larger than the reference value. A step may be provided. This makes it possible to efficiently detect a valid path and suppress the operation of the matched filter, thereby reducing power consumption.

The correlation calculation step may include reading a delay profile stored in a memory and executing a correlation calculation in a range from a delay time when the received signal power becomes maximum to a time delayed by a predetermined time. Good.
This makes it possible to efficiently detect a valid path and suppress the operation of the matched filter, thereby reducing power consumption.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to the drawings, a CDMA (Code Division Multiplot) according to an embodiment of the present invention will be described.
A detailed description will be given of a receiving device for le Access (code division multiple access). FIG. 1 shows a C according to an embodiment of the present invention.
FIG. 2 is a diagram schematically illustrating a configuration of a DMA receiving device 100. As shown in FIG.
Comprises a wireless demodulation unit 10, a RAKE processing unit 11, a data processing unit 12, and an antenna 13.

The radio demodulation unit 10 includes a quadrature detector, an LPF
(Low Pass Filter) for demodulating a baseband signal from a radio signal received by the antenna 13.

The RAKE processing unit 11 is for despreading the baseband signal demodulated by the radio demodulation unit 10 while compensating the phase and amplitude in accordance with the state of occurrence of multipath. As shown in FIG. , A matched filter 20, a level adjuster 21, an integrator 22, a control circuit 23, a plurality of PN (Pseudo Noise) correlators 24, a RAKE combiner 25, and a memory 26.

The matched filter 20 includes a delay element, a weighting tap, an adder, and the like, and performs a correlation operation between a baseband signal received from the radio demodulation unit 10 and a pilot symbol spreading code. . here,
The pilot symbol is a predetermined code pattern that is spread and sent by a known spreading code, and the matched filter 20 uses the same spreading code as that used for spreading the pilot symbol on the radio signal transmitting side. keeping. Then, the matched filter 20 performs a correlation operation between the pilot symbol and the spreading code while delaying the baseband signal by a predetermined time (for example, one chip time), and outputs a pulse train obtained as an operation result to the level adjuster 21. send.

The level adjuster 21 is composed of a delay element, a multiplier and the like, and adjusts the signal level of the pulse train received from the matched filter 20. The adjusted pulse train is sent to the integrator 22. send.

The integrator 22 is for obtaining the received signal power by cyclically integrating the pulse train received from the level adjuster 21, and notifies the control circuit 23 of the obtained received signal power.

The control circuit 23 is composed of a microprocessor or the like, and controls the operation of each part of the rake processing unit 11. More specifically, the control circuit 23
Receives the notification of the received signal power from the integrator 22, creates a delay profile, and stores it in the memory 26. The delay profile indicates the power characteristic of the received signal when the start position of the correlation operation between the pilot symbol and the spreading code is changed. As illustrated in FIG. 3, the delay profile of the pilot symbol and the integrator Reference numeral 22 denotes the received signal power obtained by performing the cyclic integration.

Further, the control circuit 23 compares the received signal power received from the integrator 22 with a predetermined reference value L1, and determines a delay time at which the received signal power becomes larger than the reference value L1 in a valid path. It is determined that the timing is reached. And
The control circuit 23 specifies a delay time indicating the timing at which the matched filter 20 executes the correlation operation to obtain the value of the received signal power, and the received signal power at that time.
Further, the control circuit 23 creates a parameter for one of the plurality of PN correlators 24 to perform despreading of the baseband signal received from the valid path from the specified delay time and the received signal power. This parameter is PN
The data includes a delay time for the correlator 24 to temporally compensate the phase of the baseband signal, and a weighting factor (amplification factor) based on the reliability of the effective path.

The control circuit 23 switches between starting and stopping the matched filter 20. Here, the control circuit 2
When the CDMA receiver 100 is powered on or moves from outside the communication service area to the service area, the matched filter 20 is used until a delay profile of one symbol time is created.
Is operated to execute the correlation operation. On the other hand, the control circuit 2
3 indicates that when the CDMA receiving apparatus 100 receives information symbols from the base station, the matched filter 20
Is operated to execute the correlation operation. At this time, the control circuit 23 checks the received signal power in units of a delay time width shorter than one symbol time, and if a valid path is found in this range, stops the operation of the matched filter 20 at that time.

The plurality of PN correlators 24 are composed of a shift register, a PN sequence generator, a multiplier, etc., and invert the baseband signal received from the radio demodulation unit 10 in accordance with the parameters set by the control circuit 23. This is for extracting a data signal by spreading. Here, the PN correlator 24 performs time-phase compensation on the baseband signal received from the wireless demodulation unit 10 and despreads the signal based on the delay time indicated by the parameter set by the control circuit 23. The PN correlator 24 adjusts the data signal obtained by the despreading to a signal level corresponding to the weighting factor (amplification factor) indicated by the parameter set by the control circuit 23, and sends the signal to the RAKE combiner 25.

The RAKE combiner 25 is composed of an adder and the like, and is for combining the data signals received from the plurality of PN correlators 24, and sends the combined data signal to the data processing unit 12.

The memory 26 is composed of a semiconductor memory or the like, and is a profile storage unit for storing the delay profile created by the control circuit 23.

The data processing unit 12 shown in FIG. 1 comprises a decoder, a speaker, etc., decodes the data signal received from the rake processing unit 11, and outputs an audio signal according to the information obtained by the decoding. This is for executing various processes.

Hereinafter, a CD according to an embodiment of the present invention will be described.
The operation of the MA receiver 100 will be described. This CDMA
Receiving device 100 is applied to a mobile telephone device or the like and functions as a device for receiving a downlink signal. When periodically searching for a valid path position, a delay time width shorter than one symbol time is used. By suppressing the operation of the matched filter 20 by creating a delay profile for each range of
Power consumption can be reduced.

When the power is turned on by pressing a power key or the like (not shown), the control circuit 2
3 creates a delay profile of one symbol time.
Here, since the power is turned on immediately, a delay profile of one symbol time is created.

More specifically, when the power is turned on, the control circuit 23 starts a power-on search process shown in the flowchart of FIG. When the power-on search process is started, the control circuit 23 activates the matched filter 20 (step S1), and executes a correlation operation between the baseband signal demodulated by the wireless demodulation unit 10 and a spreading code for a pilot symbol. (Step S2). At this time, the matched filter 20 performs the correlation operation while sequentially delaying the baseband signal by one chip time until a pulse train of one symbol time is obtained by despreading the pilot symbol. The matched filter 20 sends the pulse train obtained by the correlation operation to the level adjuster 21.

The level adjuster 21 is a matched filter 2
Integrator 2 adjusts the signal level of the pulse train received from 0
Send to 2. The integrator 22 cyclically integrates the signal level received from the level adjuster 21 to obtain a received signal power (step S3), and notifies the control circuit 23.

The control circuit 23 receives the notification of the received signal power from the integrator 22, creates a delay profile, compares the received signal power with a predetermined reference value L1, and determines whether the received signal power is larger than the reference value L1. Is determined (step S4).

The control circuit 23 determines that the received signal power is equal to the reference value L.
If it is determined that the value is greater than 1 (YES in step S4), it is determined that there is a valid path, and the value indicates the position of the valid path (step S5). And
The control circuit 23 calculates a plurality of Ps based on the delay time in which the value of the received signal power indicating the position of the effective path exists and the received signal power.
A parameter for despreading the baseband signal of the effective path is created in one of the N correlators 24. This parameter is data including a delay time for the PN correlator 24 to compensate the phase of the baseband signal, and a weighting factor (amplification factor) based on the reliability of the effective path.

The control circuit 23 sets the created parameters in one of the plurality of PN correlators 24 to prepare for despreading the baseband signal demodulated by the radio demodulation unit 10 (step S6).

On the other hand, if the control circuit 23 determines in step S4 that there is no value larger than the reference value L1 (NO in step S4), it determines that there is no valid path (step S7), and proceeds to steps S5 and S6. Is skipped, and the process proceeds to step S8.

The control circuit 23 determines whether or not the delay profile of one symbol time has been completed (step S).
8) If it is determined that it is not completed (NO in step S8), the process returns to step S2, and the creation of the delay profile is continued.

On the other hand, when the control circuit 23 determines that the delay profile of one symbol time is completed (step S)
The operation of the matched filter 20 is stopped (step S9), and the created delay profile is stored in the memory 26 (step S10). The delay profile stored in the memory 26 is used to specify the position of the path when receiving information from the base station, and the control circuit 23 uses the matched filter 20 based on the delay profile. Can execute a correlation operation using a delay time width shorter than one symbol time as a unit.

Thereafter, the control circuit 23 controls the PN correlator 24
To extract a data signal by despreading the baseband signal received from the wireless demodulation unit 10 (step S
11). The PN correlator 24 converts the extracted data signal into
The signal is amplified to a signal level corresponding to the parameter set by the control circuit 23 and sent to the RAKE combiner 24.

The RAKE combiner 25 combines the data signals received from the PN correlator 24 (step S12) and sends the combined data signal to the data processing unit 12. As a result, the CDMA receiving apparatus 100 despreads and collects the baseband signal for each path even in a situation where a multipath occurs (RA).
KE), an appropriate information symbol can be extracted.

Thus, the CDMA receiving apparatus 10
0 can extract information symbols such as speech symbols from the base station and receive information from the base station.

Next, when the CDMA receiving apparatus 100 starts receiving information from the base station, the control circuit 23 executes the flowchart of FIG. 5 every time a predetermined time elapses (a time interval for receiving pilot symbols). 1 / M symbol search processing shown in FIG.

In this 1 / M symbol search processing, a delay profile is created in units of 1 / M symbol time, and if there is no valid path in this range, the range for creating the delay profile is sequentially increased by 1 / M symbol time. This is the process of expanding. Here, M that defines the unit of the range in which the delay profile is created is a predetermined constant value.

When the 1 / M symbol search process is started, the control circuit 23 initializes a variable i defining a range for creating a delay profile to 1 (step S20).
The matched filter 20 is started (step S21).

Next, the control circuit 23 controls the matched filter 20 to execute a correlation operation between the baseband signal of i / M symbol time defined by the variables i and M and the spreading code (step S1). S22). At this time, the control circuit 2
3 reads the delay profile stored in the memory 26 and causes the correlation calculation to be executed within the range of the i / M symbol time centering on the path having the largest received signal power in the delay profile.

For example, when the variable i is 1, as shown in FIG. 6, it is assumed that the delay profile stored in the memory 26 indicates the maximum value P1 of the received signal power at the delay time t1. The control circuit 23 causes the matched filter 20 to execute the correlation operation in the range of 1 / M symbol time around the delay time t1, since the received signal power is the largest at the delay time t1.

The matched filter 20 sends the pulse train generated by executing the correlation operation to the level adjuster 21. The level adjuster 21 adjusts the signal level of the pulse train and sends it to the integrator 22. The integrator 22 cyclically integrates the signal level received from the level adjuster 21 to obtain a received signal power, and notifies the control circuit 23 of the power.

The control circuit 23 receives the notification of the received signal power from the integrator 22, creates a delay profile, compares the received signal power with a predetermined reference value L1, and determines whether the received signal power is larger than the reference value L1. Is determined (step S23).

The control circuit 23 determines that the received signal power is equal to the reference value L.
If it is determined that the value is greater than 1 (YES in step S23), it is determined that there is a valid path, and the baseband signal of the path valid for the PN correlator 24 is determined from the delay time and the received signal power in which the value exists. Create parameters for despreading.

The control circuit 23 sets the created parameter in one of the plurality of PN correlators 24, and despreads the baseband signal demodulated by the radio demodulator 10 (step S24).

Thereafter, the control circuit 23 stops the operation of the matched filter 20, stores the created delay profile in the memory 26, and ends the 1 / M symbol search processing (steps S25 and S26).

On the other hand, when the control circuit 23 determines in step S23 that there is no value larger than the reference value L1 (NO in step S23), the control circuit 23 increases the variable i by 1 (step S27). It is determined whether or not it is larger (step S28).

If the control circuit 23 determines that the variable i is equal to or smaller than M (NO in step S28), the process returns to step S22 to continue creating a delay profile.

On the other hand, when the control circuit 23 determines that the variable i is larger than M (YES in step S28), it determines that the delay profile of one symbol time is completed, and
The process proceeds to step S25 to stop the operation of the matched filter 20, store the created delay profile in the memory 26, and end the 1 / M symbol search process.

According to the 1 / M symbol search processing, the control circuit 23 creates a delay profile in units of the delay time width of 1 / M symbol time, and there is an effective path within the range where the delay profile is created. , The operation of the matched filter 20 is stopped. Thereby, the operation of the matched filter 20 is suppressed. Since the matched filter 20 consumes large power, the CDMA receiver 100 can reduce the power consumption by suppressing the operation of the matched filter 20.

When the control circuit 23 determines that there is a valid path within the range in which the delay profile is created, the control circuit 23 stores the delay profile in the memory 26 and terminates the 1 / M symbol search processing. Processing for searching can be shortened, and information from the base station can be quickly received.

The CDMA receiving apparatus 100 according to the first embodiment creates a delay profile in units of 1 / M symbol time, but creates a delay profile according to the delay profile stored in the memory. The range may be changed. Hereinafter, the CDMA according to the second embodiment of the present invention for changing the range for creating a delay profile according to the delay profile stored in the memory
The receiving device for use will be described.

CDM according to the second embodiment of the present invention
The receiving apparatus for A uses the CDMA according to the first embodiment.
It has the same configuration as that of the receiving device 100 for use.

When the power is turned on, the control circuit 23 executes a power-on search process in the same manner as in the first embodiment, creates a one-symbol time delay profile and stores it in the memory 26. I do. After this, the control circuit 23
When the CDMA receiving apparatus 100 starts receiving information from the base station, the flexible search processing shown in the flowchart of FIG. 7 is started every time a predetermined time elapses.

When the flexible search process is started, the control circuit 23 reads out the delay profile stored in the memory 26 and predicts a range in which a valid path exists (step S30). At this time, the control circuit 23 predicts a range of the delay time width defined by a plurality of delay times in which the received signal power indicated by the delay profile is larger than the reference value L1 as a range in which an effective path exists.

For example, in the delay profile shown in FIG. 8, assuming that the value of the received signal power generated at the delay times t10, t11, and t12 is larger than the reference value L1, the control circuit 23 sets the delay time t10 to The interval between t12 is predicted as a range in which a valid path exists.

The control circuit 23 activates the matched filter 20 (step S31), and executes a correlation operation between the baseband signal and the spreading code in a range in which a valid path is predicted to exist in step S30 (step S32). ).

The matched filter 20 sends the pulse train generated by executing the correlation operation to the level adjuster 21. The level adjuster 21 adjusts the signal level of the pulse train and sends it to the integrator 22. The integrator 22 cyclically integrates the signal level received from the level adjuster 21 to obtain a received signal power, and notifies the control circuit 23 of the power.

The control circuit 23 receives the notification of the received signal power from the integrator 22, creates a delay profile, compares the received signal power with a predetermined reference value L1, and determines whether the received signal power is larger than the reference value L1. Is determined (step S33).

The control circuit 23 determines that the received signal power is equal to the reference value L.
If it is determined that the value is greater than 1 (YES in step S33), it is determined that there is a valid path, and the baseband signal of the path valid for the PN correlator 24 is determined based on the delay time and the received signal power at which the value exists. Create parameters for despreading.

The control circuit 23 sets the created parameter in one of the plurality of PN correlators 24, and despreads the baseband signal demodulated by the radio demodulation unit 10 (step S34).

Thereafter, the control circuit 23 stops the operation of the matched filter 20, stores the created delay profile in the memory 26, and ends the flexible search processing (steps S35 and S36).

On the other hand, if the control circuit 23 determines in step S33 that there is no value larger than the reference value L1 (NO in step S33), a new valid path is set within a range in which a delay profile has not yet been created. Is predicted (step S37). At this time, the control circuit 23
Reading the delay profile stored in the memory 26,
A range in which a path is predicted to exist outside the range in which the delay profile has already been created in step S33 is defined.

For example, the control circuit 23 executes the above-described step S
Outside the range in which the delay profile has already been created in 33, the range in which an effective path exists is defined based on the delay time in which the received signal power is larger than the second reference value L2 smaller than the reference value L1. To determine the effective path delay time. Then, the control circuit 23 predicts the delay time width from the specified delay time to the delay time that is the end of the range in which the delay profile has already been created in step S33 as a range in which a new valid path exists. You may. More specifically, assuming that the value of the received signal power at the delay time t13 is equal to or less than the reference value L1 and greater than the reference value L2 in the delay profile illustrated in FIG.
The control circuit 23 predicts a range R1 defined by the delay times t12 and t13 as a range in which a new valid path exists.

Further, for example, the control circuit 23 sets the longest delay time (largest delay time) among the delay times in which the received signal power is not zero outside the range in which the delay profile has already been created in step S33. To identify. Then, the control circuit 23 calculates, from the specified delay time,
The delay time width up to the delay time that is the end of the range in which the delay profile has already been created in step S33 may be predicted as a range in which a new valid path exists. More specifically, in the delay profile shown in FIG. 8, the control circuit 23 specifies the delay time t14 that has the longest delay (large delay time) among the delay times in which the received signal power is not zero, and specifies the delay time t12. And the range R2 defined by t14 are predicted as a range where a new valid path exists.

At this time, the control circuit 23 determines whether or not the range in which a valid path exists can be predicted (step S38). When the control circuit 23 determines that the range in which a valid path exists can be predicted (YE in step S38).
S), the process returns to step S32, and causes the matched filter 20 to execute a correlation operation between the baseband signal and the spreading code in the predicted range.

On the other hand, when the control circuit 23 determines that there is no appropriate value (for example, a value larger than the predetermined reference value L2) in the read delay profile, it is determined that the range in which a valid path exists cannot be predicted ( N in step S38
O), the power-on search processing is executed, and the flexible search processing ends (step S39).

According to the flexible search processing, the control circuit 23 reads the delay profile stored in the memory 26, and preferentially creates a delay profile from a range in which a valid path is predicted to exist. When it is determined that there is a valid path within the range in which is created, the operation of the matched filter 20 is stopped. Thereby, the operation of matched filter 20 can be suppressed, and CDMA receiving apparatus 100 can reduce power consumption.

In general, it is considered that a radio signal of a path that generates a multipath by being reflected on a building or a building is attenuated each time it is reflected. For this reason, C
The signal level of a radio signal having a large number of reflections before reaching the DMA receiver 100 has a lower signal level than that of a radio signal having a small number of reflections. A path with a large number of reflections and a low signal level has a longer propagation path length and a large amount of delay time than a path with a small number of reflections and a low signal level. Therefore, it is preferable to preferentially create a delay profile in a range in which the amount of delay time is larger than the time point at which the received signal power becomes maximum in the delay profile, since there is a high possibility that an effective path exists. Therefore, a CDMA receiving apparatus according to the third embodiment of the present invention, which preferentially creates a delay profile in a range in which the amount of delay time is greater than the point at which the received signal power becomes maximum, will be described. .

CDM according to the third embodiment of the present invention
The receiving apparatus for A has the same configuration as the receiving apparatus for CDMA 100 according to the first and second embodiments.

When the power is turned on, the control circuit 23 executes a power-on search process in the same manner as in the first and second embodiments, creates a one-symbol time delay profile, and 26. Thereafter, when the CDMA receiving apparatus 100 starts receiving information from the base station, the control circuit 23 executes the process shown in FIG.
Starts the backward priority search process shown in the flowchart of FIG.

When the backward priority search process is started, the control circuit 23 reads the delay profile stored in the memory 26, and specifies a delay time at which the received signal power becomes maximum (step S40).

The control circuit 23 activates the matched filter 20 (step S41), and sets the baseband in a range from the delay time specified in step S40 to a time delayed by a predetermined time, for example, 100 chip times. A correlation operation between the signal and the spread signal is executed (step S4).
2).

The matched filter 20 sends the pulse train generated by performing the correlation operation to the level adjuster 21, which adjusts the signal level of the pulse train and sends it to the integrator 22. The integrator 22 cyclically integrates the signal level received from the level adjuster 21 to obtain a received signal power, and notifies the control circuit 23 of the power.

The control circuit 23 receives the notification of the received signal power from the integrator 22, creates a delay profile, compares the received signal power with a predetermined reference value L1, and determines whether the received signal power is larger than the reference value L1. Is determined (step S43).

The control circuit 23 determines that the received signal power is equal to the reference value L.
If it is determined that the value is greater than 1 (YES in step S43), it is determined that there is a valid path, and the baseband signal of the path valid for the PN correlator 24 is determined from the delay time and the received signal power at which the value exists. Create parameters for despreading.

The control circuit 23 sets the created parameter in one of the plurality of PN correlators 24, and despreads the baseband signal demodulated by the radio demodulator 10 (step S44).

Thereafter, the control circuit 23 stops the operation of the matched filter 20, stores the created delay profile in the memory 26, and ends the backward priority search processing (steps S45 and S46).

On the other hand, when the control circuit 23 determines in step S43 that there is no value larger than the reference value L1 (NO in step S43), the control circuit 23 executes the above-described power-on search processing to delay one symbol time Create a profile,
The backward priority search process ends (step S47).

The control circuit 23 can also read the delay profile stored in the memory 26 and preferentially create a delay profile from a range in which a valid path is expected to exist by the backward priority search process. .
When the control circuit 23 determines that there is a valid path within the range in which the delay profile is created, the control circuit 23 stops the operation of the matched filter 20. Thereby, the operation of matched filter 20 can be suppressed, and CDMA receiving apparatus 100 can reduce power consumption.

As described above, the CDMA receiving apparatus 100 can suppress the operation of the matched filter 20 by creating a delay profile for each range shorter than one symbol time, thereby reducing power consumption. .

The present invention is not limited to the above embodiment, and various modifications and applications are possible. For example, the control circuit 23 is the same as the control circuit 23 described in the first to third embodiments.
The / M symbol search process, the flexible search process, and the backward priority search process may be alternately executed each time a predetermined time elapses. Further, the processing may be properly used depending on the multipath environment.

[0099]

As described above, the present invention suppresses the operation of a matched filter when creating a delay profile, thereby reducing power consumption and its path. A search method can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a CDMA receiving apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of a RAKE processing unit.

FIG. 3 is a diagram illustrating a delay profile.

FIG. 4 is a flowchart illustrating a power-on search process.

FIG. 5 is a flowchart illustrating 1 / M symbol search processing.

FIG. 6 is a diagram exemplifying a delay profile for explaining a range in which a matched filter performs a correlation operation in 1 / M symbol search processing.

FIG. 7 is a flowchart illustrating a flexible search process.

FIG. 8 is a diagram illustrating a delay profile for explaining a range in which a matched filter performs a correlation operation in a flexible search process.

FIG. 9 is a flowchart illustrating a backward priority search process.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Radio demodulation part 11 RAKE processing part 12 Data processing part 13 Antenna 20 Matched filter 21 Level adjustment part 22 Integrator 23 Control circuit 24 PN correlator 25 RAKE combiner 26 Memory 100 CDMA receiver

Claims (12)

[Claims] 1. A correlation calculation execution means for performing a correlation calculation with a spreading code for spreading a pilot symbol while delaying a baseband signal demodulated by receiving a radio signal, and wherein the correlation calculation execution means performs a correlation calculation. Integrating means for integrating the execution result to obtain a received signal power; profile storage means for storing a delay profile created from the received signal power obtained by the integrating means; The correlation calculation in the short delay time range is executed by the correlation calculation execution means, and it is determined whether or not the received signal power obtained by the integration means is larger than a predetermined reference value. Assuming that there is a path, a delay profile is stored in the profile storage means, the operation of the correlation calculation execution means is stopped, and the received signal power is reduced. And operation control means for creating a delay profile by causing the correlation operation executing means to execute a correlation operation in a range of a longer delay time width when it is determined that the difference is equal to or less than the reference value. Receiver. 2. The operation control means according to claim 1, wherein:
The CDMA receiver according to claim 1, wherein a delay profile of a symbol time is created. 3. The operation control means reads the delay profile stored in the profile storage means, and performs correlation within a predetermined delay time width centered on the delay time at which the received signal power becomes maximum. The calculation is executed by the correlation execution unit, and it is determined whether the received signal power obtained by the integration unit is larger than the reference value. If it is determined that the received signal power is larger than the reference value, a delay profile is stored in the profile storage unit. When the operation of the correlation calculation execution unit is stopped and the received signal power is determined to be equal to or less than the reference value, the range in which the correlation calculation execution unit executes the correlation calculation is extended by the same time width as the predetermined delay time width. The CDMA receiver according to claim 1 or 2, wherein a delay profile is created by performing the following. 4. The operation control means reads the delay profile stored in the profile storage means, and operates within a range of a delay time width defined by a plurality of delay times at which a received signal power becomes larger than the reference value. The correlation calculation is executed by the correlation calculation execution means, and it is determined whether or not the received signal power obtained by the integration means is larger than the reference value. If the received signal power is determined to be larger, a delay profile is stored in the profile storage means. Stopping the operation of the correlation calculation execution means, and when it is determined that the received signal power is equal to or less than the reference value, creates a delay profile by expanding the range in which the correlation calculation execution means executes the correlation calculation. The CDMA receiver according to claim 1 or 2, wherein: 5. The operation control means, when determining that the received signal power obtained by the integration means is equal to or less than the reference value,
Reading the delay profile stored in the profile storage unit, and causing the correlation operation execution unit to execute a correlation operation within a delay time width defined by a delay time when the received signal power is not zero. The CDMA receiver according to claim 4. 6. When the operation control means determines that the received signal power obtained by the integration means is equal to or less than the reference value,
Reading the delay profile stored in the profile storage means, the correlation calculation execution means in the range of delay time width defined by the delay time when the received signal power is greater than the second reference value smaller than the reference value The CDMA receiving device according to claim 4, wherein a correlation operation is performed. 7. The operation control means reads the delay profile stored in the profile storage means, and performs a correlation operation in a range from a delay time when the received signal power is maximized to a time delayed by a predetermined time. The CDMA receiver according to claim 1 or 2, wherein the delay calculation unit creates a delay profile by causing the correlation calculation execution unit to execute the delay profile. 8. The CDMA receiver according to claim 1, wherein said correlation calculation execution means executes a correlation calculation using a matched filter. 9. While delaying a baseband signal in a time range shorter than one symbol time by a matched filter,
A correlation operation step of performing a correlation operation with a spreading code for spreading a pilot symbol; an integration step of integrating the operation result in the correlation operation step to obtain a received signal power to create a delay profile; and Determining whether the received signal power is greater than a predetermined reference value, and determining that the received signal power is greater than the reference value in the determining step, the data signal is determined as having a valid path. Performing a despreading for taking out, storing the delay profile created in the integration step in a memory, stopping the operation of the matched filter, and terminating the path search, and a search end step. Receiving a radio signal in the CDMA system
A path search method for a DMA receiving device. 10. The correlation calculating step includes a step of reading a delay profile stored in a memory and executing a correlation calculation in a predetermined range around a delay time at which the received signal power is maximized. The path search method according to claim 9, wherein: 11. The correlation calculating step reads a delay profile stored in a memory and performs a correlation calculation within a delay time width defined by a plurality of delay times at which a received signal power becomes larger than the reference value. The path search method according to claim 9, further comprising a step of executing. 12. The correlation calculating step includes a step of reading a delay profile stored in a memory and performing a correlation calculation in a range from a delay time when the received signal power becomes maximum to a time delayed by a predetermined time. The path search method according to claim 9, wherein: