JP2001083930A - Driving device of on-vehicle display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To adequately correct luminance irregularity of an on-vehicle display considering a difference between environmental conditions in the daytime and at night. SOLUTION: When display is performed on an EL panel 2 in the daytime, a selector 8 sets a charging period of an EL element 2a, and when display is performed at night, the selector 8 changes the charging period step-like according to number of display pixels in each voltage impression period counted by a data count circuit 7, and performs a shadowing control for preventing a driver of an automobile from recognizing luminance irregularity of the EL panel 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in, for example, an instrument panel of a vehicle, and applies a voltage to each of a scanning electrode and a data electrode to cause a pixel at each intersection to emit light. And a driving device for a vehicle-mounted display configured as follows.

[0002]

2. Description of the Related Art As such a vehicle-mounted display, for example, EL
There is a simple dot matrix type display in which (Electro Luminescence) elements are configured as pixels, and a conventional technique for driving this type of display is disclosed in, for example, JP-A-1-307797. According to this conventional technique, when a matrix display is driven by a so-called line-sequential scanning method, gradation display is realized by controlling a pulse width of a voltage applied to a data electrode.

[0003] Actually, since the number of light emitting pixels for each display row (scanning electrode) is different, the amount of charging current required for each row changes. That is, if the number of luminescent pixels per display row increases, the amount of charging current to be supplied to the row increases. Therefore, if the pulse width of the applied voltage is too small, a sufficient amount of current is supplied to each pixel in the row. Cannot be supplied. For this reason, luminance unevenness between the display rows may be remarkably generated.

In order to solve such a problem, for example, Japanese Patent Publication No. 7-48137 discloses a technique in which the pulse width of an applied voltage is changed in accordance with a change in the number of light emitting pixels in a scanning electrode. It has been disclosed.

[0005]

Here, assuming an environment in which a driver actually drives a vehicle, for example, an automobile,
There is a very large difference in ambient illuminance between day and night. Therefore, it is necessary to appropriately set the luminance of the instrument panel according to the difference. That is, since the surrounding illuminance is high in the daytime, it is necessary to improve the visibility of the driver by setting the luminance of the panel to a high level accordingly. On the other hand, since the surrounding illuminance is extremely low at night, sufficient visibility is ensured even if the luminance of the panel is set significantly lower than during the day.

Therefore, the conditions under which the driver recognizes uneven brightness on the display of the panel must be greatly different between daytime and nighttime. In order to correct the uneven brightness practically, such environmental conditions are large. It must be done on the assumption that they are different. However, conventionally, there has not been a technique for correcting uneven brightness in consideration of such a difference in environmental conditions between day and night.

The present invention has been made in view of the above circumstances, and an object of the present invention is to appropriately correct uneven brightness of a vehicle-mounted display in consideration of a difference in environmental conditions between daytime and nighttime. It is an object of the present invention to provide a driving device for an in-vehicle display that can be used.

[0008]

According to a first aspect of the present invention, a display control means includes a pixel having a capacitive load formed at each intersection of a scanning electrode and a data electrode. Is switched between the daytime display state and the nighttime display state. When performing daytime display, the charge amount of the pixel is set to be constant. In the case of performing nighttime display, shadowing control is performed by changing the charge amount in accordance with the number of display pixels in each voltage application period counted by the display pixel number counting unit.

That is, in the daytime when the surrounding illuminance is high, when the number of display pixels of the display device changes, the range of the luminance in which the occupant of the vehicle does not recognize the luminance unevenness becomes relatively wide. Is set to a constant amount that falls within the wide luminance range, the occupant of the vehicle does not recognize the luminance unevenness. In addition, in the nighttime when the surrounding illuminance is low, when the number of display pixels of the display changes, the luminance range in which the occupant of the vehicle does not recognize the luminance unevenness becomes extremely narrow. Shadowing control is performed in accordance with the number of pixels to prevent the occupant of the vehicle from recognizing uneven brightness. Therefore, the brightness unevenness is appropriately corrected in accordance with a change in environmental conditions when the vehicle is actually driven, so that a higher quality display than before can be performed.

According to the second aspect of the present invention, the display control means changes the charging period in accordance with the number of pixels counted by the display pixel number counting means.
The charge amount of the display pixel can be easily changed by the change of the charge period. According to the driving device of the in-vehicle display device according to the third aspect, the display control means sets the charge amount so that the luminance unevenness which is hardly recognized by the occupant of the vehicle is LT = 0.7 or more. High-quality display can be performed based on experimentally obtained values so that humans hardly recognize uneven brightness.

According to a fourth aspect of the present invention, when the display image of the on-vehicle display is specified in advance, the display control means determines the number of display pixels to be subjected to shadowing control. The range is set based on a display image specified in advance. That is, if the display image is specified in advance,
Since the maximum value and the minimum value of the number of display pixels are known, the control range can be appropriately set based on the maximum value and the minimum value.

According to a fifth aspect of the present invention, the display control means sets the luminance change rate when the charge charge amount is changed with at least a half of the clock signal period as a reference unit. Since the setting is made to be less than 30%, shadowing control can be performed with a sufficient resolution to make the luminance unevenness LT 0.7 or more.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment in which the present invention is applied to a dot matrix type EL panel will be described below with reference to FIGS. FIG.
FIG. 2 is a functional block diagram showing the entire electrical configuration. ECU (Ele
ctronic Control Unit) 1 reads signals from various sensors and switches (not shown) arranged in each part of the vehicle as a vehicle and performs data processing as appropriate.
It controls the engine of a car. Further, the ECU 1 outputs display data and dimming data of the EL panel (vehicle display) 2 to the control circuit 3.

The control circuit 3 scans a driver (first voltage applying means) based on data provided by the ECU 1.
A signal for controlling a driving circuit 6 including a data driver 4 and a data driver (second voltage applying means) 5 is generated and output. Further, the control circuit 3 outputs display data, a CLOCK signal, a horizontal synchronization signal HSYNC bar, and the like to a data count circuit section (display pixel number counting means) 7. "Bar" indicates that the row is active.

The data count circuit section 7 counts the number of display data based on, for example, a CLOCK signal having a frequency of 5 MHz, thereby outputting an output enable signal OE (NIGH).
T) bar and polarity inversion signal PC (NIGHT) bar are generated,
The data is output to a selector (display control means) 8. The selector 8 is separately provided with an output enable signal OE (DAY) bar and a polarity inversion signal PC (DAY) bar from the control circuit 3. Then, based on the day / night switching signal D / N given from the ECU 1, the selector 8 outputs the output enable signal OE (DAY) bar / OE (NIGHT) bar and the output enable signal PC (DAY) bar / PC (NIGHT) bar. Either one is selectively output to the scanning driver 4 as an OE bar or a PC bar.

FIG. 2 shows an EL panel 2 and a scanning driver 4.
4 shows a more detailed electrical configuration centered on the data side driver 5. The EL panel 2 has scanning electrodes (transparent electrodes) 9 and data electrodes (back electrodes) 10 arranged in rows and columns, and EL elements (pixels) 2 a represented by a capacitor symbol are arranged in a matrix at intersections thereof. It is configured as a simple dot matrix type display. The odd-numbered scanning electrodes 9 are scanning electrodes 9o, and the even-numbered scanning electrodes 9 are scanning electrodes 9e.

The scanning electrode driving circuit 11o is a push-pull type driving circuit, and the scanning electrode driving circuit 11o is connected to the scanning electrode 9o.
The device includes a channel FET 12a and an N-channel FET 12b, and applies a scanning voltage to the scanning electrode 9o based on a signal given from the driving circuit 13. Also,
Parasitic diodes 12c and 12d are formed between the sources and drains of the FETs 12a and 12b, respectively, to set the scan electrode 9o to a desired reference voltage.

The scan electrode drive circuit 11e has the same configuration, and includes a P-channel FET 14a and an N-channel FET 14a.
b, a drive circuit 15 for applying a scanning voltage to the scanning electrode 9e. Also, the data electrode driving circuit 1
6, P-channel FETs 17a and N
A channel FET 17b and a drive circuit 18 are provided, and a data voltage is applied to the data electrode 10.

The scan electrode drive circuits 11o and 11e are provided with scan voltage supply circuits 19a and 19b. The scanning voltage supply circuit 19a has switching elements 20 and 21, and supplies a DC voltage (writing voltage) Vr or a ground voltage to the scanning electrode driving circuits 11o and 11o according to their ON / OFF states.
11e, supply to the P-channel FET source side common line L1. Similarly, scan voltage supply circuit 19b has switching elements 22 and 23, and applies a DC voltage (−Vr + Vm) to N-channel FEs in scan electrode drive circuits 11o and 11e in accordance with the on / off state of those elements.
The power is supplied to the T source side common line L2.

The data electrode drive circuit 16 is provided with a data voltage supply circuit 24, which supplies a DC voltage (modulation voltage) Vm to the P-channel FET source side common line of the data electrode drive circuit 16, N channel FE
The ground voltage is supplied to the T source side common line.

In the above configuration, the scan electrode drive circuits 11o and 11e and the scan voltage supply circuits 19a and 19b
Correspond to the scanning driver 4, and those including the data electrode drive circuit 16 and the data voltage supply circuit 24 correspond to the data driver 5.

Scanning driver 4 and data driver 5
For details of the basic operation, see, for example,
Although it is disclosed in Japanese Patent No. 12129 and Japanese Patent No. 291234, it will be described briefly below.

In order to cause the EL elements of the EL panel 2 to emit light, it is necessary to apply an AC pulse voltage between the scanning electrodes 9 and the data electrodes 10. For this reason, a pulse voltage whose polarity is inverted to positive and negative for each field is generated and driven for each scanning line. In the positive field, after setting the reference voltage of each electrode to an offset voltage Vm of about 45 V, a voltage (scanning voltage) Vr of about 210 V is sequentially applied to the scanning electrodes 9. The other scanning electrodes 9 to which the voltage Vr is not applied are set in a floating state.

On the data electrode 10 side, a voltage Vr equal to or higher than the threshold value is applied to both ends of the EL element 2a by setting the data electrode 10 to which the EL element 2a to emit light is connected to a ground voltage (display voltage). To emit light. The data electrode 1 to which the EL element 2a that does not emit light is connected.
0 is kept at Vm, the EL element 2a
Becomes (Vr-Vm), and falls below the threshold value, so that the EL element 2a does not emit light. Thereafter, the electric charges accumulated in each EL element are discharged to return to the initial state.

On the other hand, in the negative field, the same operation as in the positive field is performed by inverting the polarity of the applied voltage.
At this time, the reference voltage of each electrode becomes the ground voltage. And
Scanning is performed by applying a voltage (−Vr + Vm) to the scanning electrode 9. On the data electrode 10 side, the voltage of the data electrode 10 to which the EL element 2 a to be lit is connected is set to Vm, and the light is emitted, contrary to the positive field The data electrode 10 to which the EL element 2a to be disabled is connected is set to the ground voltage. Then, the voltage applied to both ends of the EL element 2a to emit light becomes -Vr, and the EL element 2a emits light. The voltage applied to both ends of the EL element 2a that does not emit light is (−Vr + V
m), the EL element 2a falls below the threshold value.
Does not emit light. By driving the above positive and negative fields, 2
The display operation of the cycle is completed, and by repeating this operation, the EL panel 2 is caused to display a screen.

FIG. 3 is a diagram showing a detailed electrical configuration of the data count circuit section 7 and the selector 8, and FIG. 5 is a timing chart showing signal waveforms in each section.
3, the D terminal of the D flip-flop 25 has
Display data (see FIG. 5A) from the control circuit 3 is given.

The display data is data that is output serially in synchronization with the CLOCK signal (see FIG. 5B), with the high level (5V) corresponding to display and the low level (0V) corresponding to non-display. As shown in the figure, it is a data row for one display row (corresponding to one scan electrode 9) to be displayed on the EL panel 2 in the horizontal synchronization period in the next voltage application cycle. In addition, a CLOCK signal from the control circuit 3 is provided to a CK terminal of the D flip-flop 25.

The D flip-flop 25 outputs the display data supplied to the D terminal as a signal a (see FIG. 5C) from the Q output terminal in synchronization with the CLOCK signal. AN
The D gate 26 converts the signal a and the CLOCK signal into two NO signals.
Signal b delayed by delay circuit 27 composed of a T gate
(See FIG. 5D) and the signal c (FIG.
(See (e)). Counter 2
8 is configured to count up the signal c from the AND gate 26, and the count value is the number of pulses of the display data, that is, the EL that emits light in the next voltage application cycle.
It shows the number of EL elements 2a of panel 2 (the number of display pixels).

The count value of the counter 28 is given as an address to a memory 50 composed of a ROM, and the data read from the memory 50 is H
The SYNC bar signal (see FIG. 5 (f)) is sent to the NOT gate 2
The latch is latched by the latch circuit 30 at the timing of the signal e inverted at step 9. As shown in FIG. 4, the data is stored in the memory 50 so that the data value increases nonlinearly with the increase in the address value.

Then, the count value of the counter 28 is determined by a signal d (FIG. 5 (g)) obtained by delaying the HSYNC bar signal by a delay circuit 31 configured similarly to the delay circuit 27.
See). At the same time, the data latched in the latch circuit 30 at the timing of the signal e is preset in the counter 32. The counter 32 counts the preset count value by CLOCK.
When the count value becomes "0", the signal f is changed to low level and a carry-out signal is output to the CLR terminal of the D flip-flop 40.

The counter 38 sets the MAXOE value preset by the falling edge of the HSYNC bar signal (a value previously set as the maximum charging period) to CLOCK.
It counts down by a signal. When the counter 38 outputs a carry-out signal,
The MAX bar signal (see FIG. 5 (n)) becomes low level. The MAX bar signal is transmitted to the DIS bar signal generation circuit 4
Given to one.

The basic operation excluding the memory 50 having the above configuration is also disclosed in Japanese Patent Application Laid-Open No. 9-212129. That is, when a count value corresponding to the number of light emitting pixels of the next display row is given to the memory 50 as an address, and data corresponding to the address is read out and preset in the counter 32, the count down is started by the CLOCK signal. . When the carry-out signal is output from the counter 32, the signal f goes low. Then, the D flip-flop 40 is cleared, the Q bar terminal becomes high level, and the CHG bar signal becomes inactive.

That is, as shown in FIGS. 5 (i) to (l),
The timing at which the signal f goes low changes according to the number of EL elements 2a that emit light, and the timing at which the CHG bar signal goes high (that is, the low-level period) changes accordingly. FIG. 5 (m),
As shown in (n), if the number of light emitting pixels is the MAXOE value, the signal f goes low and the MAX bar signal goes low at the same time. As will be described later, since the low level period of the CHG bar signal is the time for charging the EL element 2a, the charging period is in principle longer as the number of light emitting pixels in the next row is larger.

In FIG. 3, the DIS bar signal generation circuit 41 rises after a certain discharge period has elapsed after falling in synchronization with the rising of the MAX bar signal.
It outputs an IS bar signal. The end of the discharge period is determined based on a lapse of a predetermined time from the fall timing of the HSYNC bar signal. And A
The logical product (negative logical sum) of the CHG bar signal and the DIS bar signal is obtained by the ND gate 42, whereby O
An E-bar (NIGHT) signal is output.

On the other hand, the PULSE bar signal creation circuit 43
Outputs a PULSE bar signal that falls in synchronization with the fall of the CHG bar signal and rises after a lapse of a fixed time (time from the fall timing of the HSYNC bar signal to before or at the same time as the fall of the DIS bar signal). It has become. And the EXOR gate 44
In the above, the exclusive OR of the PULSE bar signal and the FRAME bar signal corresponding to a positive or negative field change is output, and a PC (NIGHT) signal is output.

The selector 8 has an OE bar (DAY) signal and a PC bar (DAY) signal from the control circuit 3 and an OE bar (NIG).
HT) signal and PC bar (NIGHT) signal. The day / night switching signal D given by the ECU 1
Both signals are selected according to the level of / N, and are output as an OE bar signal and a PC bar signal. That is, if the D / N signal is low level, the OE bar (DAY) signal and the PC bar (DAY) signal are selectively output. If the D / N signal is high level, the OE bar (NIGHT) signal and the PC bar (NIGHT) are output. ) The signal is selected and output.

The OE bar signal and the PC bar signal output from the selector 8 are further transmitted to the FETs 12 a and 12 of the scanning driver 4 via logic circuits in the drive circuits 13 and 15.
This is supplied as a gate signal of b. The logic circuit unit is also supplied with a row selection signal output from a scanning driver IC such as the μPD16302 to sequentially select the scanning electrodes 9 (display rows).

The levels of the output signals O of the FETs 12a and 12b corresponding to the scanning electrodes 9 for which the row selection signal is active are as follows according to the level changes of the OE bar signal and the PC bar signal. OE bar signal PC bar signal Output signal OHXZLHHLLL Here, "X" indicates "H" or "L", and "Z" indicates floating (high impedance).

Next, the operation of the present embodiment will be described with reference to FIGS. FIGS. 6 and 7 show that the pulse width (charging period) of the voltage applied to the scan electrode 9, that is, the low level period of the CHG bar signal is changed as a parameter when the EL panel is used as an instrument panel of a vehicle. In some cases, the number of light emitting pixels (ND) is plotted on the horizontal axis, and the luminance (L) of the EL panel is plotted on the vertical axis.
It shows a D curve. FIG. 6 shows a case where panel display is assumed during daytime, and FIG. 7 shows a case where panel display is assumed at night.

That is, assuming an environment in which a driver actually drives a car, there is a very large difference in ambient illuminance between day and night. Therefore, it is necessary to appropriately set the luminance of the EL panel according to the difference. In the daytime, since the surrounding illuminance is high, the luminance of the EL panel is set to a high level of, for example, several hundred cd / m ² in accordance with the illuminance to improve the visibility by the driver.

On the other hand, since the illuminance of the surroundings is extremely low at night, the luminance of the EL panel is 1 / day.
Even if it is set to several tens cd / m ² or less, sufficient visibility can be ensured. Note that the vertical scales in FIGS. 6 and 7 are different depending on the respective luminance (L) ranges. The luminance (L) tends to decrease as the number of light emitting pixels (ND) increases if the charging period is constant. As a result, in the case of night display in FIG. 7, the change rate of the luminance (L) of the EL panel with respect to the number of light emitting pixels (ND) is large.

In each of these figures, the regions RD and RN of the luminance in which the luminance unevenness of the EL panel is hardly noticed by human eyes are also shown. That is, in the daytime display in FIG. 6, the region RD is extremely large, and is approximately 150 cd / m ^2.
On the other hand, in the daytime display in FIG. 7, the area RN is extremely narrow, and has a range of about several cd / m ² . If the luminance unevenness LT is (lowest light emission luminance) / (highest light emission luminance) between light-emitting pixels in adjacent display rows, the width of these regions RD and RN is LT ≧
The inventors of the present invention have confirmed that it is appropriate to set the value to 0.7. The charging periods shown in FIGS. 6 and 7 have a relationship of A>B>C> D.

Based on the above, in the present embodiment, as shown in FIG. 8, when the day / night switching signal D / N is at a low level indicating that it is daytime in the selector 8, the OE output from the control circuit 3 is output. Bar (DAY) Signal and PC bar (D
AY) By selectively outputting the signal, even if the number of light emitting pixels changes in the maximum range, the driver can perform EL display as shown in FIG.
A fixed charging period (for example, 20 μs) is set so that the luminance unevenness of the panel 2 is hardly considered.

If the D / N signal is at a high level indicating that it is at night, the OE bar (NIGHT) signal and the PC bar (NIGHT) signal output from the data count circuit unit 7 are selectively output. The charging period is changed according to the number of light emitting pixels, and shadowing control is performed so that the luminance of the EL panel 2 always falls within the region RN shown in FIG. In this embodiment, as shown in FIG. 8, the PC bar (DAY) signal is
The C bar (NIGHT) signal is substantially the same signal, and is not changed between daytime and nighttime.

As is apparent from FIG. 7, in order to control the luminance so as to be within the region RN, the low-level pulse of the CHG bar signal in the OE bar (NIGHT) signal increases in accordance with the increase in the number of light emitting pixels. The width needs to be increased non-linearly (stepwise). Thus, using the memory 50 having the address map as shown in FIG. 4, data 40H is output from addresses (number of light emitting pixels) 01H to 04H, data 4BH is output from addresses 05H to 07H, and so on. The data to be preset in the counter 32 is changed stepwise.

As a result, the cycle of the CLOCK signal is 0.2
μs, and as shown in FIG.
Up to 4, the pulse width is 12.8 μs and the number of luminescent pixels is 5 to 7
Until the pulse width is 13.0 μs and the number of luminescent pixels is 8 to 12
Until the pulse width is 13.2 μs,.
The G bar signal is output such that the pulse width changes stepwise in steps of 0.2 μs.

The timing chart shown in FIG. 8 is for the case of a negative field. If both the OE bar signal and the PC bar signal are at low level, for example, the scanning side driving circuit 11o
The FET 12b is turned ON, the output signal O goes low (-Vr + Vm in this case), and when the voltage Vm is applied to the data electrode 10, the corresponding EL element 2a is charged and emits light.

Then, when the OE bar signal changes to a high level, the output signal O becomes high impedance,
The charged state of L element 2a is maintained. Subsequently, when the OE bar signal changes to the low level again and the PC bar signal changes to the high level, the output signal O changes to the high level, the FET 12a is turned on, the charge of the EL element 2a is discharged, and the EL element 2a is discharged. Is hidden.

FIG. 10 shows a case where the control unit of the pulse width is 0.2 μs and 0.4 μs, and the pulse width is changed by the control unit from each set pulse width (for example, 13.0 μs) (FIG. 10). For example, it shows a luminance change rate (%) at 13.2 μs). Control unit is 0.2μ
In the case of s, the luminance change rate is 1.1% to 4.8%,
When the control unit is 0.4 μs, the luminance change rate is 2.2% to
8.7%.

As described above, if the luminance non-uniformity LT is 0.7 or more, human visual perception does not matter.
By setting the luminance change rate to less than ± 30%, the luminance unevenness L
T can be adjusted well. In this embodiment, the luminance change rate required for more precise luminance adjustment is ± 6.
Since it is set to less than 4%, a control unit satisfying the condition is preferably 0.2 μs, and the frequency of the CLOCK signal is set to 5 MHz.

As described above, according to the present embodiment, for the EL panel 2 which is an in-vehicle display, when the selector 8 performs daytime display, the charging period of the EL element 2a is set to be constant, and nighttime display is performed. When performing the shadowing control, the charging period is changed according to the number of display pixels in each voltage application period counted by the data count circuit unit 7.

That is, in the daytime when the surrounding illuminance is high, when the number of display pixels of the EL panel 2 changes, the luminance range RD in which the occupant of the vehicle hardly recognizes the luminance unevenness becomes relatively wide. The charging period is set to a certain period that falls within the luminance range RD. When the number of display pixels changes during the night when the surrounding illuminance is low, the luminance range RN in which the occupant of the vehicle hardly recognizes the luminance unevenness becomes extremely narrow. Shadowing control is performed so as to change in a stepwise manner according to the number, and to enter the luminance range RN.

Therefore, it is possible to appropriately correct luminance unevenness in accordance with a change in environmental conditions when the vehicle is actually driven, and it is possible to display a higher quality display than before. Further, since the brightness unevenness LT is set to be 0.7 or more, high-quality display can be performed based on a value obtained experimentally so that a human hardly recognizes the brightness unevenness.

According to the present embodiment, as shown in FIG. 9, the lower limit of the number of display pixels to be subjected to shadowing control is set to "1". That is, if a display image is specified in advance as in an instrument panel of an automobile, the maximum value and the minimum value of the number of display pixels can be known, so that the control range can be appropriately set based on the minimum value. .

Further, according to the present embodiment, since the rate of change in luminance when the charging period is increased with the control period of 0.2 μs of the CLOCK signal period being set to be less than 30%, the luminance unevenness LT is reduced. Shadowing control can be performed with a sufficient resolution to make it 0.7 or more.

(Second Embodiment) FIGS. 11 and 12 show a second embodiment of the present invention. The same parts as those of the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted. Only different parts will be described. FIG. 11 shows an electrical configuration of a data count circuit section (display pixel number coefficient means) 45 instead of the data count circuit section 7. According to the configuration of the first embodiment, the counter 38 and the DIS bar signal generation circuit 4
1, AND gate 42, PULSE bar signal generation circuit 4
3 has been deleted.

The output signal of the D flip-flop 40 is supplied to the EXOR gate 44 instead of the output signal from the PULSE bar signal creation circuit 43,
The OR gate 44 outputs a PC (NIGHT) signal. Then, an HSYNC bar signal is supplied to an input terminal of the OE bar signal creation circuit 46.
The OE bar signal generation circuit 46 causes the OE bar (NIGHT) signal to fall at the fall of the HSYNC bar signal, and outputs a signal such that the OE bar (NIGHT) signal rises after a certain period of time has passed since that time. ing.

Next, the operation of the second embodiment will be described with reference to FIG. That is, in the second embodiment, the OE bar
(NIGHT) The low-level pulse width of the signal is
The low level pulse width of the bar (NIGHT) signal changes according to the output data of the memory 50 based on the number of display pixels. Then, as shown in FIG. 12, the OE (NIGHT) signal and P
While the C bar (NIGHT) signal is low level,
The period during which the EL element 2a is charged, in which the OE (NIGHT) signal is at a low level and the PC bar (NIGHT) signal is at a high level, is a discharge period of the EL element 2a.

Therefore, in the case of the second embodiment, unlike the first embodiment, there is no period for maintaining the state of charge after charging the EL element 2a, and discharge is performed immediately after charging. ing. The charging period of the EL element 2a is determined by the low level period of the PC (NIGHT) signal. According to the second embodiment configured as described above, the same effect as that of the first embodiment can be obtained.

The present invention is not limited to the embodiment described above and shown in the drawings, and the following modifications or extensions are possible. In the first embodiment, only the OE bar signal may be switched between day and night, and the PC bar signal generated in the control circuit 3 or the data count circuit unit 7 may be commonly used day and night. Conversely, in the second embodiment, only the PC bar signal may be switched between day and night. The same control may be performed not only on the scanning electrode side but also on the data electrode side. Instead of changing the charging period, the charging voltage for the EL element 2a may be changed to change the charge amount of the EL element 2a. An ON / OFF signal of a lighting switch may be used as the day / night switching signal D / N. Although the luminance change rate according to the control unit is set to be less than ± 6.4%, it is ± 30% depending on the design specifications and the required control resolution.
What is necessary is just to set suitably within the range below.

Further, the luminance unevenness which is hardly recognized by the occupant of the vehicle is not limited to the case where LT ≧ 0.7,
What is necessary is just to set suitably according to the kind of an in-vehicle display, etc.
In addition, the luminance change rate when the charge amount is changed corresponding to the reference unit is not limited to less than ± 30% and may be set as appropriate. The address map of the memory illustrated in FIG. 4 is an example, and may be changed as appropriate according to design conditions and the like. The lower limit of the number of display pixels may be set to two or more according to the display pattern of the screen. The control unit of the pulse width is not limited to the clock signal period, but may be の of the clock signal period. In-vehicle display is EL
The present invention is not limited to the panel 2 and can be applied as long as a pixel having a capacitive load is formed at each intersection of the scanning electrode and the data electrode. Further, the present invention is not limited to a matrix-type display such as the EL panel 2, but may be applied to, for example, a segment-type display as long as it is driven by scanning electrodes and data electrodes.

[Brief description of the drawings]

FIG. 1 is a first embodiment of the present invention, and is a functional block diagram showing an overall electrical configuration.

FIG. 2 is a diagram showing a more detailed electrical configuration centering on an EL panel, a scanning side, and a data side driver;

FIG. 3 is a diagram showing a detailed electrical configuration of a data count circuit unit and a selector.

FIG. 4 is a diagram showing a part of an address map of a memory;

FIG. 5 is a timing chart of each part.

FIG. 6 is a diagram showing the relationship between the number of light-emitting pixels (ND) and the luminance (L) of an EL panel when the pulse width of an applied voltage to a scanning electrode is changed in the daytime as a parameter.

FIG. 7 is a diagram corresponding to FIG. 6 at night;

FIG. 8 is a diagram illustrating an output state of a signal switched between daytime and nighttime by a selector.

FIG. 9 is a diagram showing a relationship between the number of light emitting pixels and a pulse width in a charging period.

FIG. 10 is a diagram showing a relationship between a control unit of a pulse width and a luminance change rate.

FIG. 11 is a view corresponding to FIG. 3, showing a second embodiment of the present invention;

FIG. 12 is a diagram showing an example of a pulse width change of a PC bar signal according to a difference in the number of light emitting pixels.

[Explanation of symbols]

2 is an EL panel (vehicle display), 2a is an EL element (pixel), 4 is a scanning driver (first voltage applying means) 4, 5
Denotes a data driver (second voltage applying unit), 7 denotes a data count circuit unit (display pixel number counting unit), 8 denotes a selector (display control unit), and 45 denotes a data count circuit unit (display pixel number counting unit). .

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masahiko Nagata 1-1-1 Showa-cho, Kariya-shi, Aichi F-term in DENSO Corporation (reference) 5C080 AA06 BB05 DD05 EE28 FF12 GG02 HH09 JJ02 JJ03 JJ20 JJ05 KK20

Claims (5)

[Claims] 1. An in-vehicle display having a plurality of pixels each having a capacitive load formed at each intersection of a scanning electrode and a data electrode, by applying a voltage to each of the scanning electrode and the data electrode. A driving device for an in-vehicle display configured to selectively emit light in the pixel to be in a display state, wherein a first voltage application unit that sequentially applies a scanning voltage pulse to the scanning electrode; A second voltage applying means for applying a display voltage pulse, and a first voltage applying means provided in correspondence with one of the first and second voltage applying means. A display pixel number counting means for counting the number of pixels to be set, and configured to switch the in-vehicle display between a daytime display state and a nighttime display state, and to perform daytime display, to an adjacent electrode. In the case where the charge amount of each pixel is set to be constant so that the luminance unevenness between each of the arranged pixels is hardly recognized by the occupant of the vehicle and night display is performed, the pixels counted by the display pixel number counting means are used. A display control unit that performs shadowing control so that the luminance unevenness is hardly recognized by an occupant of the vehicle by changing the charge amount according to the number of the charged electric charges. Drive. 2. The in-vehicle display according to claim 1, wherein said display control means is configured to change a charging period in accordance with the number of pixels counted by said display pixel number counting means. Device drive. 3. The luminance unevenness LT is defined as (minimum light emission luminance).
/ (Maximum light emission luminance), the display control means sets the charge amount so that LT ≧ 0.7 as luminance unevenness which is hardly recognized by the occupant of the vehicle. 4. The driving device for a vehicle-mounted display according to any one of claims 1 to 3. 4. The method according to claim 1, wherein when the display image of the vehicle-mounted display is specified in advance, the display control unit determines a range of the number of pixels to be subjected to the shadowing control based on the predetermined display image. 4. The driving device for a vehicle-mounted display according to claim 1, wherein the setting is performed. 5. The display control means is configured to perform the shadowing control in synchronization with a clock signal, and to change a charge amount with at least a half of a clock signal cycle as a reference unit. 5. The driving method for a vehicle-mounted display according to claim 1, wherein a rate of change in luminance when the charge amount is changed corresponding to the above is set to be less than ± 30%. apparatus.