JP2001068277A - Electric power source device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce fluctuation of a current flowing in a load, even when the impedance is low, for example, as just after start of a high intensity discharge lamp. SOLUTION: This device is provided with an inverter circuit INV1 wherein a direct current power source BT, a series circuit of capacitors Ce1, Ce2 and a series circuit of FETs Q1, Q2 are connected in parallel, wherein an inductor L1 is connected in series in a parallel circuit of a high intensity discharge lamp DL and a capacitor C1 so as to constitute an LC circuit, and wherein the LC circuit is connected between a connection point for the capacitors Ce1, Ce2 and a connection point for the FETs Q1, Q2, and a control circuit 1. The control circuit 1 switches alternately the first period and the second period with low frequency, to make an ON-time of the FET Q1 shorter than that of the FET Q2 just after polarity of a substantially rectangular voltage is inversed, in the case of the first period, and to make the ON-period of the FET Q2 shorter than that of the the ON-time of the FET Q1 just after the polarity of the rectangular voltage is inversed, in the case of the second period.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device for performing switching control on a switching element at a high frequency and applying a substantially rectangular wave voltage having a lower frequency than the switching to a load.

[0002]

2. Description of the Related Art FIG. 14 is a circuit diagram showing a conventional power supply device of this kind, and FIG. 15 is an operation waveform diagram of each section shown in FIG. 14 (see Japanese Patent Application No. 10-338154).

[0003] A power supply device shown in FIG.
And a series circuit of smoothing capacitors Ce1 and Ce2;
Reverse conduction type FETs Q1 and Q that cannot block reverse current
2 and a series circuit of a high-intensity discharge lamp (HID lamp) DL and an inductor L1 in series with a parallel circuit of a capacitor C1 to form an LC circuit. The LC circuit is composed of capacitors Ce1 and Ce2. , And an inverter INV1 that is connected between the connection point of the FETs Q1 and Q2.
Q2 is switched at a frequency of several tens of kHz,
The switching is performed so that the period A and the period B as shown in FIG. 15 occur at a frequency considerably lower than the switching frequency, and the magnitude relation of the duty of the FETs Q1 and Q2 is switched. By performing the switching operation in this manner, as shown in FIG. 15, a low-frequency rectangular wave current Ila is supplied to the high-intensity discharge lamp DL as a load.
(Voltage is applied). To elaborate,
In the on / off control for the FETs Q1 and Q2 shown in FIG. 15, the FETs Q1 and Q2 are alternately turned on / off at a high frequency, and the period A and the period B are alternately switched at a low frequency. The control is such that the ON period is longer than the ON period of the FET Q2, and in the case of the period B, the ON period of the FET Q2 is longer than the ON period of the FET Q1.

[0006] One cycle of the high frequency is the FET Q
1 and Q2, and both FETs Q1 and Q
Assuming that the so-called pause period in which the second switch 2 is turned off can be almost ignored, if the on-duty of the FET Q1 is further increased and the on-duty of the FET Q2 is further reduced in the period A, the current flowing to the load can be further increased. Similarly, in the period B, if the on-duty of the FET Q1 is further reduced and the on-duty of the FET Q2 is further increased, the current flowing to the load can be further increased.

[0005]

In the conventional power supply device described above, when the capacitances of the capacitors Ce1 and Ce2 are as large as that of a battery, the current flowing through the load and the product of the cycle in which the polarity of the output is inverted are obtained. Even if a current flows through the load, the voltage of the capacitor does not change, and the load current has a rectangular waveform even when the duty is constant in a half cycle of a low frequency.

However, it is not practical to use an extremely large-capacity capacitor whose voltage does not change even when a current flows, due to restrictions on the physical size of the power supply device and costs. Therefore, since such a large-capacity capacitor cannot be used, the voltages Ve1 and Ve2 of the capacitors Ce1 and Ce2 fluctuate as shown in FIG. As a result, as shown in the figure, when each FET operates at a constant duty in each of the periods A and B, the load current I is changed with the fluctuations of the voltages Ve1 and Ve2.
la will also fluctuate.

In this situation, the load impedance is low,
Appears remarkably when the load voltage is extremely low compared to the voltages Ve1 and Ve2. At this time, even if a current flows through the load, almost no power is consumed by the load, and the capacitors Ce1 and Ce2 are not consumed.
2 is in a state where charges move. In particular, if the load is a high-intensity discharge lamp, its impedance immediately after starting is extremely low, and a sufficient current will not be supplied.
The lamp current decreases, and in some cases, the problem of extinguishing occurs. That is, stable lighting cannot be maintained.

The present invention has been made in view of the above circumstances, and provides a power supply device capable of reducing fluctuations in current flowing through a load even when the impedance of the load is low, for example, immediately after starting a high-intensity discharge lamp. The purpose is to provide.

[0009]

According to a first aspect of the present invention, there is provided a power supply apparatus comprising: a DC power supply;
A circuit in which a series circuit of a capacitor and a second capacitor is connected in parallel with a series circuit of a reverse conducting first switching element and a second switching element, and at least a load and a third capacitor are connected in parallel. First
An inductor is connected in series to form an LC circuit.
An inverter circuit configured by connecting a C circuit between a connection point of the first capacitor and the second capacitor and a connection point of the first switching element and the second switching element, and an inverter that operates the inverter circuit Wherein the first switching element and the second switching element are alternately turned on / off at a high frequency, and the first period and the second period are alternately switched at a low frequency. The on-period of the first switching element is longer than the on-period of the second switching element, and in the case of the second period, the on-period of the second switching element is longer than the on-period of the first switching element. And a control circuit for applying a low-frequency substantially rectangular-wave voltage to the load, wherein the polarity of the substantially rectangular-wave voltage is inverted. Immediately thereafter, in the case of the first period, the on-period of the first switching element is made shorter than the on-period of the second switching element, and in the case of the second period, the on-period of the second switching element is shortened. This is shorter than the ON period of the first switching element.

In this configuration, the ON period of the first switching element is shorter than the ON period of the second switching element in the first period, and the ON period of the second switching element is shorter in the second period. Since the period is shorter than the ON period of one switching element, the fluctuation of the load current due to the fluctuation of the voltage of each of the first and second capacitors is reduced. Thereby, even if the impedance of the load is low, for example, immediately after the start of the high-intensity discharge lamp, the fluctuation of the current flowing through the load can be reduced.

In the power supply according to the first aspect,
For a predetermined period immediately after the polarity of the substantially rectangular wave voltage is inverted, in the case of the first period, the ON period of the first switching element is shortened and the ON period of the second switching element is increased, In the case of the period, the ON period of the second switching element may be shortened and the ON period of the first switching element may be extended. According to this configuration, fluctuations in the load current due to fluctuations in the voltages of the first capacitor and the second capacitor are reduced, so that even if the impedance of the load is low, for example, immediately after starting a high-intensity discharge lamp, In addition, it is possible to reduce the fluctuation of the current flowing to the load.

Further, in the power supply device according to the first aspect,
When the polarity of the low frequency substantially rectangular wave voltage is reversed, the on-duty of both the first switching element and the second switching element may not be changed suddenly (claim 3). According to this configuration, even if the impedance of the load is high, for example, when the high-intensity discharge lamp is started and not discharging, the first inductor, the first switching element, and the first switching element are used when the polarity of the load current (voltage) is reversed. It becomes possible to prevent an excessive current from flowing through the two switching elements.

Further, in the power supply device according to the first aspect,
A configuration may be adopted in which the rate of change of the on-duty in the first period and the second period is set according to the capacities of the first capacitor and the second capacitor. According to this configuration, even if the impedance of the load is low, for example, immediately after the start of the high-intensity discharge lamp, it is possible to reduce the fluctuation of the current flowing through the load.

Further, in the power supply device according to the first aspect,
Current detection means for detecting a current flowing to the load, target current generation means for generating a voltage which is a reference of a current to be passed to the load, and a current detection means for detecting a current to be passed to the load. An error amplifier for amplifying a signal corresponding to an error, and a PWM for adjusting a duty ratio of an oscillation signal for the first switching element and the second switching element in accordance with an output signal of the error amplifier
Circuit and an output signal of the PWM circuit,
Polarity switching means for switching the oscillation signal for the first switching element and the second switching element according to the period and the second period may be provided (claim 5). Even with this configuration, even if the impedance of the load is low, for example, immediately after the start of the high-intensity discharge lamp, fluctuations in the current flowing through the load can be reduced.

Further, in the power supply device according to the first aspect,
First average value detection means for detecting the average value of the voltage value across the first capacitor; second average value detection means for detecting the average value of the voltage value across the second capacitor; An error amplifier that detects the difference as an error,
A configuration may be adopted in which the duties of both the first switching element and the second switching element are adjusted such that the difference between the average values as the error is minimized.
According to this configuration, it is possible to reduce the fluctuation of the current flowing to the load with a simple circuit configuration.

Further, in the power supply device according to any one of claims 1 to 6, the load may be a high-intensity discharge lamp (claim 7). According to this configuration, the high-intensity discharge lamp can be stably turned on.

Further, in the power supply device according to any one of claims 1 to 7, the first switching element and the second switching element of the reverse conduction type may be constituted by FETs. According to this configuration, the high-intensity discharge lamp can be stably turned on.

[0018]

FIG. 1 is a block diagram of a power supply device according to a first embodiment of the present invention, and FIG. 2 is an operation waveform diagram of each unit shown in FIG. 1 when the impedance of a load is extremely low. The first embodiment will be described below with reference to FIG. However, the duties of Q1 and Q2 in FIG. 2 are schematically shown, and in fact, the switching frequency of Q1 and Q2 is higher than the schematic frequency of FIG. Frequency.

The power supply device shown in FIG.
The high-intensity discharge lamp DL is connected to the output as a load.

The inverter circuit INV1 includes a DC power supply BT composed of, for example, a battery and a capacitor Ce1,
A series circuit of Ce2 and a series circuit of reverse conduction type FETs Q1 and Q2 which cannot block current in the reverse direction are connected in parallel, and both ends are connected in parallel with the high-intensity discharge lamp DL and both ends are connected to both output terminals of the power supply device. An inductor L1 is connected in series to the capacitor C1, which is a parallel circuit of the high-intensity discharge lamp DL and the capacitor C1, to form an LC circuit. This LC circuit is connected to the connection point of the capacitors Ce1 and Ce2 and FE.
It is configured by connecting between the connection point of TQ1 and Q2.

The control circuit 1 turns on / off the FETs Q1 and Q2.
In the off-control, for example, the FETs Q1 and Q2 are alternately turned on / off at a high frequency, and the periods A and B are alternately switched at a low frequency.
The ON period of the ETQ1 is longer than the ON period of the FET Q2, and in the case of the period B, the ON period of the FET Q2 is longer than the ON period of the FET Q1 (see FIG. 15).
A low-frequency substantially rectangular-wave voltage is applied to the high-intensity discharge lamp DL.

Further, as a feature of the first embodiment, the control circuit 1 changes the duty in each of the above periods when the voltage of the capacitors Ce1 and Ce2 fluctuates. In the first embodiment, when the impedance of the load is extremely low, that is, immediately after the start of the operation when the impedance of the high-intensity discharge lamp DL is extremely low, the duty in each of the above periods is changed.

That is, in the case of the period A, immediately after the polarity of the substantially rectangular wave voltage is inverted, the ON period of the FET Q1 is set to FE.
It is shorter than the ON period of TQ2. Specifically, as shown in FIG. 2, the ON period of the FET Q1 is made shorter than the original ON period to return to the original ON period, and the ON period of the FET Q2 is made longer than the original ON period. Then, control to return to the original ON period is performed. On the other hand, in the case of the period B, immediately after the polarity of the substantially rectangular wave voltage is inverted, the ON period of the FET Q2 is
It is shorter than the ON period of ETQ1. Specifically, FIG.
As shown in the figure, the ON period of the FET Q1 is made longer than the original ON period so as to return to the original ON period, and the ON period of the FET Q2 is made shorter than the original ON period to make the original ON period longer. The control to return to is performed. However, as shown in FIG.
The above-described switching control is performed so that the duty becomes approximately 100% when the duties of both 1 and Q2 are added. In addition,
As long as it does not affect the operation, a configuration in which a dead time is provided may be adopted. The rate of change of the on-duty in the periods A and B is determined by the capacitors Ce1 and Ce2.
May be set in accordance with the capacity of the device.

Next, the reason why the duty in each period is changed when the load impedance is extremely low will be described.

When the impedance of the load is extremely low, almost no power is consumed in the high-intensity discharge lamp DL, so that the charge moves alternately between the capacitors Ce1 and Ce2 every time the periods A and B change.

At this time, if a large-capacity capacitor is used for the capacitors Ce1 and Ce2 so that the voltage level does not fluctuate and is always constant, the capacitors Ce1 and Ce2 can be used even at low impedance and low load voltage. If the present power supply device is operated such that each voltage of the power supply device is substantially half the level of the output voltage Vbt of the DC power supply BT, the discharge is stabilized and the internal pressure of the high-intensity discharge lamp DL is increased. A sufficient current can be supplied to the electric light DL.

However, mounting such a large-capacity capacitor causes various problems such as an increase in the size of the device.
In reality, a capacitor having a capacity that cannot satisfy the above conditions is used. In this case, when the electric charge moves alternately between the capacitors Ce1 and Ce2 as described above, as shown by “Ve1” and “Ve2” in FIG. 2, the voltage Ve across the capacitors Ce1 and Ce2 according to the electric charge movement.
1, the level of Ve2 fluctuates continuously.

Here, the voltages Ve1 and Ve2 are respectively set to m
× Ve1, (1-m) × Ve1, and FETs Q1, Q
Duty Dq1 and Dq2 for d2 are d,
With (1-d), the steady value Vla of the load voltage is given by the following equation (Equation 1).

Vla = (2 × m × d−0.5) × Vbt The current Vla flowing through the load can be obtained by dividing Vla by the impedance of the load. However, m and d are 0 to
It shall take the value of 1.

As can be seen from the above equation and FIG. 2, for example, when the period A starts, the voltage Ve1 decreases, that is, m decreases, and the duty Dq1, that is, d increases.
The fluctuation of la is suppressed, and as a result, as shown in FIG.
The fluctuation of the current Vla flowing through the load is suppressed. Similarly,
When the period B starts, m increases and d decreases, so that V
The fluctuation of la is suppressed. As a result, the fluctuation of the current Ila flowing through the load is suppressed. Thus, for example, period A
Starts, the duty Dq1 starts with a value smaller than 50%, and in the period B, starts with a value larger than 50%, so that the current can be surely made into a substantially rectangular waveform, and reliable lighting can be achieved. Will be possible.

As described above, a sufficient current can be supplied to the high-intensity discharge lamp DL in order to stabilize the discharge and increase the internal pressure of the high-intensity discharge lamp DL. FIG. 3 shows output characteristics of the power supply device when the load is a general high-intensity discharge lamp.

In the first embodiment, the FETs Q1 and Q2 are used as the switching elements. However, the present invention is not limited to this. For example, a transistor and a diode connected in antiparallel to the transistor may be used. Needless to say, it is good.

FIG. 4 is a block diagram of a power supply unit according to a second embodiment of the present invention, FIG. 5 is a block diagram of a control unit shown in FIG. 4, and FIGS. FIG. 8 and FIG. 9 are characteristic diagrams of the PWM circuit, and FIG. 8 and FIG. 9 are operation waveform diagrams of each part in the present power supply device when the impedance of the load is extremely low and high, respectively. Do.

In FIGS. 8 and 9, VL and IL indicate output signal waveforms of the load voltage detection circuit and the load current detection circuit shown in FIG. 5, respectively. Further, IM of FIG. 6 and EV of FIG. 7 are output signals of the target current generating circuit and the error amplifier shown in FIG. 5, respectively.

The power supply device shown in FIG.
NV1 is provided in the same manner as in the first embodiment, and a control circuit 2 is provided as a difference from the first embodiment, and a high-intensity discharge lamp DL is connected to the output as a load.

The control circuit 2 includes a drive circuit 21 for driving the FETs Q1 and Q2, and
1 and Q2.

As in the control circuit 1 of the first embodiment, the control unit 20 alternately turns on / off the FETs Q1 and Q2 at a high frequency and alternately switches the period A and the period B at a low frequency. In the case of A, the ON period of the FET Q1 is made longer than the ON period of the FET Q2,
In this case, the on-period of the FET Q2 is longer than the on-period of the FET Q1, and a low-frequency substantially rectangular-wave voltage is applied to the high-intensity discharge lamp DL. Further, as shown in FIG. 8, the control unit 20 includes the capacitors Ce1,
When the voltage of Ce2 fluctuates, that is, when the load impedance is extremely low, the duty in each of the above periods is changed.

Further, the control section 20 has a function of adjusting the power supplied to the load so as to obtain the output characteristics shown in FIG. 3, and as shown in FIG. 5, from the connection point side of the capacitors Ce1 and Ce2 as shown in FIG. A load current detection circuit 200 for detecting a current Ila flowing through the load as a voltage, a load voltage detection circuit 201 for detecting a load voltage Vla from both ends of the load, and a voltage Vl
and a target current generating circuit 202 for generating a voltage which is a reference of a current to be supplied to the load from a.
An error amplifier 203 for amplifying an error voltage of the voltage from the load current detection circuit 200 with respect to the voltage from the
4 and a capacitor C204, and a delay circuit 204 connected to the output of the error amplifier 203, and adjusts the duty ratio of the oscillation signal to the FETs Q1 and Q2 in accordance with the output signal from the error amplifier 203 via the delay circuit 204. To output signal DU1 (see FIG. 8)
M circuit 205 and low frequency oscillation circuit 206 for periods A and B
And a timing generation circuit 20 which receives the output signal of the low frequency oscillation circuit 206 and generates a predetermined timing signal.
7, a duty adjustment circuit 208 that adjusts the signal DU1 from the PWM circuit 205 to a signal DU2 (see FIG. 8) by the output signal of the timing generation circuit 207 to improve the rise, and a PWM through the duty adjustment circuit 208. A polarity switching circuit 209 receives an output signal from the circuit 205 and switches the oscillation signal for the FETs Q1 and Q2 in accordance with the signal from the low frequency oscillation circuit 206. The operation of the duty adjustment circuit 208 when the load impedance is high will be described later.

In the configuration of the control unit 20, a delay circuit 204 as a delay element is provided at the output of the error amplifier 203 to stably operate the control system. When the delay circuit 204 is provided, as shown in FIG.
5, the rising of the output signal DU1 becomes dull. When the output signal DU1 is input to the polarity switching circuit 209 in this state, the duty of the drive signal for the FETs Q1 and Q2 is
, The current changes as indicated by the broken lines Dq1 and Dq2, and an excessive current flows to the load. That is, as shown in FIG. 8, when the period A starts, Dq
When 1 (= d) exceeds 50% and becomes excessive, and when the period B starts, Dq2 exceeds 50% (d becomes excessively small), so that an excessive current flows to the load.

For this reason, as shown in FIG. 5, a timing generation circuit 207 and a duty adjustment circuit 208 are provided to improve the rise of the output signal DU1 of the PWM circuit 205, and the signal DU2 shown in FIG. 209. As a result, the FETs Q1, Q
2 is equal to Dq shown by the solid line in FIG.
It becomes a waveform like 1, Dq2, and it is possible to prevent an excessive current from flowing to the load. Therefore, an increase in stress on the inductor and the FET can be prevented, and the size of the power supply device can be reduced by employing the same control as in the first embodiment.

Next, a case where the load impedance is high will be described with reference to FIG. In the high-intensity discharge lamp DL, the impedance as a load increases when the lamp is not discharged after being started. In this case, no current flows through the load, and the amount of charge transfer between the capacitors Ce1 and Ce2 is not so large. Therefore, as shown in FIG. 9, the voltages Ve1 and Ve2 of the capacitors Ce1 and Ce2 become substantially constant.

If no current flows through the load, no detection is made, and the PWM circuit 205 outputs the maximum duty. At this time, if the output of the PWM circuit 205 is directly input to the polarity switching circuit 209, the duty of the drive signal for the FETs Q1 and Q2 changes as shown by the broken lines Dq1 and Dq2 in FIG. Then, when the polarity is reversed, the duty starts from a large duty, and an excessive current flows because the electric charge in the opposite direction is accumulated in the capacitor C1.

Therefore, the duty adjustment circuit 208 is adjusted so that the signal DU1 which is always zero from the PWM circuit 205 is adjusted to a pulse signal DU2 which rises at the start of each of the periods A and B as shown in FIG. If configured, FE
The duty of the drive signals of TQ1 and Q2 is shaped into waveforms such as Dq1 and Dq2 indicated by solid lines in FIG. Thereby, Dq1 and Dq2 can be prevented from suddenly changing discontinuously. As a result, it is possible to prevent an excessive current from flowing through the inductor or the FET at the time of polarity reversal, and it is possible to reduce the size and cost of the power supply device.

FIG. 10 is a configuration diagram of a power supply device according to a third embodiment of the present invention, and FIG. 11 is a PWM diagram of the control unit shown in FIG.
FIG. 12 is a characteristic diagram of the circuit, and FIG. 12 is an explanatory diagram using a PWM circuit having the characteristic shown in FIG. 11. The third embodiment will be described below with reference to these diagrams.

The power supply device shown in FIG. 10 includes an inverter circuit INV1 in the same manner as in the second embodiment.
A difference from the embodiment is that a control circuit 3 is provided, and a high-intensity discharge lamp DL is connected to the output as a load.

As shown in FIG. 10, the control circuit 3 includes a control unit 20 substantially in the same manner as in the second embodiment, a DC power supply DC, capacitors C30 and C31, and a diode D.
And a so-called charge pump type driving circuit 31 comprising a driving IC 31 for driving a high side switch which is generally used.

Here, the PWM circuit 205 in the control unit 20
Of the duty is 0% to 1 as in the second embodiment.
FIG. 12 (a) shows that it changes within the range of 00%.
As shown in FIG. 12, when the high-intensity discharge lamp DL normally operates and its impedance is high, there is no problem as a matter of course. However, when the impedance of the load becomes extremely high, for example, when there is no load, FIG. As shown in b), the duty becomes maximum and the reverse FET is completely turned off. In this case, in the charge pump type driving circuit 31 shown in FIG. 10, the high-side power is not supplied.

Therefore, in the third embodiment, as shown in FIG. 11, a PWM circuit having a characteristic in which the duty is limited to a predetermined range larger than 0% and smaller than 100%, and in which the maximum and minimum duties are set, is provided. Use for 20,
FETs Q1 and Q2 are forcibly turned on / off and drive IC
That is, 31 power supplies are supplied. Thus, the circuit can be simplified and the size can be reduced.

FIG. 13 is a block diagram of a power supply device according to a fourth embodiment of the present invention, and the fourth embodiment will be described below with reference to FIG.

The power supply device shown in FIG. 13 includes an inverter circuit INV2 and a control circuit 4 for operating the inverter circuit INV2, and the output is connected to a high-intensity discharge lamp DL as a load.

The inverter circuit INV2 includes a DC power supply BT composed of, for example, a battery and capacitors Ce1,
A series circuit of Ce2 and a series circuit of reverse conduction type switching elements SW1 and SW2 which cannot block a current in the reverse direction are connected in parallel, and an inductor L1 is connected in series with a parallel circuit of high-intensity discharge lamp DL and capacitor C1. Connected to form an LC circuit, and this LC circuit is connected to a capacitor Ce.
1 and Ce2 and the switching elements SW1 and SW2
Is connected between the connection points.

The control circuit 4 includes switching elements SW1,
It is composed of a drive circuit 41 for driving SW2 and a control unit 40 for performing on / off control of the switching elements SW1 and SW2 via the drive circuit 41. For example, the switching elements SW1 and SW2 are alternately turned on / off at a high frequency, and , The first period and the second period are alternately switched at a low frequency, and in the case of the first period, the switching element SW
1 is longer than the ON period of the switching element SW2, and in the second period, the switching element S
The on-period of W2 is made longer than the on-period of switching element SW1, and a low-frequency substantially rectangular-wave voltage is applied to high-intensity discharge lamp DL. Further, as in the first embodiment, when the impedance of the load is extremely low, the control circuit 4 changes the duty in each of the above periods.

In the example shown in FIG. 13, the control unit 40 includes a low-frequency oscillation circuit 206 and a polarity switching circuit 209 in the same manner as in the second embodiment, and has a resistance value connected in series between both ends of a DC power supply BT. Are substantially the same as resistors R40 and R41,
A filter circuit 400 including a resistor R400 and a capacitor C400, and a voltage (Vbt / 2) obtained from a connection point between the resistors R40 and R41 and the filter circuit 400
And an amplifier 401 for comparing and amplifying the voltage of the capacitor Ce2 obtained through the load circuit, and the load voltage Vl from both ends of the load.
a load voltage detection circuit 402 for detecting the
a, a target duty generating circuit 403 for obtaining a reference signal for generating a target duty from a, a PWM circuit 404 for outputting an oscillation signal to the switching elements SW1 and SW2 according to the reference signal, and a PWM circuit 4
And a duty adjustment circuit 405 that corrects a target duty value in accordance with the output signal of the amplifier 401 with respect to the signal from the amplifier 04 and outputs the corrected value to the polarity switching circuit 209.

In this configuration, the voltage (Vbt / 2) obtained by dividing the output voltage Vbt from the DC power supply BT and the voltage of the capacitor Ce2 are compared and amplified, and the target duty value is corrected. To remove the DC component of the load current.

Generally, in the half bridge configuration, it is difficult to detect the load current based on the lowest potential, and in some cases, the load current may not be detected. In this case, a DC component may be superimposed on the load current due to variations in the drive circuit or other factors. Therefore, the duty adjustment circuit 4
In step 05, the signal amplified and compared is input and the correction is performed. As a result, it is possible to prevent a DC component from being superimposed on the load current without detecting the load current.

[0056]

As is apparent from the above, according to the first aspect of the present invention, a DC power supply, a series circuit of a first capacitor and a second capacitor, a first switching element and a second switching element of a reverse conduction type. An LC circuit is configured by connecting a series circuit of two switching elements in parallel and connecting a first inductor in series to a circuit formed by connecting at least a load and a third capacitor in parallel. An inverter circuit configured to be connected between a connection point between the first capacitor and the second capacitor and a connection point between the first switching element and the second switching element, and to operate the inverter circuit;
The first switching element and the second switching element are alternately turned on / off at a high frequency, and the first period and the second period are alternately switched at a low frequency.
In the case of the period, the ON period of the first switching element is longer than the ON period of the second switching element, and in the case of the second period, the ON period of the second switching element is A control circuit that is longer than the on-period of one switching element and applies a low-frequency substantially rectangular-wave voltage to the load, and in the first period immediately after the polarity of the substantially rectangular-wave voltage is inverted. The on-period of the first switching element is shorter than the on-period of the second switching element, and in the case of the second period, the on-period of the second switching element is shorter than the on-period of the first switching element. Therefore, even when the impedance of the load is low, for example, immediately after the start of the high-intensity discharge lamp, the fluctuation of the current flowing through the load can be reduced.

According to the second aspect of the present invention, in the power supply device according to the first aspect, in the case of the predetermined period immediately after the polarity of the substantially rectangular wave voltage is inverted, or in the case of the first period, the first period.
The ON period of the switching element is shortened and the ON period of the second switching element is lengthened. In the case of the second period, the ON period of the second switching element is shortened and the ON period of the first switching element is shortened. Since the length is increased, for example, even when the impedance of the load is low, for example, immediately after the start of the high-intensity discharge lamp, it is possible to reduce the fluctuation of the current flowing through the load.

According to the third aspect of the present invention, in the power supply device according to the first aspect, when the polarity of the low-frequency substantially rectangular wave voltage is reversed, both the first switching element and the second switching element are used. Is not suddenly changed, so that the first inductor or the first switching element is used when the load current (voltage) reverses polarity even if the load impedance is high, for example, when the high-intensity discharge lamp is not started and discharged. In addition, it is possible to prevent an excessive current from flowing through the second switching element.

According to a fourth aspect of the present invention, in the power supply device of the first aspect, the first capacitor and the second capacitor are connected to each other.
Since the rate of change of the on-duty in the first period and the second period is set in accordance with the capacitance of the capacitor, even if the impedance of the load is low, for example, immediately after the start of a high-intensity discharge lamp, the current flowing through the load is reduced. Fluctuations can be reduced.

According to a fifth aspect of the present invention, in the power supply device according to the first aspect, current detecting means for detecting a current flowing through the load, and a target for generating a voltage serving as a reference of the current to flow through the load. Current generating means, an error amplifier for amplifying a signal corresponding to an error of a current detected by the current detecting means with respect to a current to be passed through the load, and the first switching element and the second switching element according to an output signal of the error amplifier. A PWM circuit for adjusting a duty ratio of an oscillation signal for the two switching elements, an output signal of the PWM circuit being input, and an oscillation signal for the first switching element and the second switching element according to the first period and the second period. And a polarity switching means for exchanging the power, so that the impedance of the load is low, for example, immediately after the start of the high-intensity discharge lamp. Also, it is possible to reduce the variation of the current flowing through the load.

According to a sixth aspect of the present invention, in the power supply device of the first aspect, the first average value detecting means for detecting an average value of the voltage value across the first capacitor;
A second average value detecting means for detecting an average value of the voltage values across the capacitor; and an error amplifier for detecting a difference between the two average values as an error, so that a difference between the average values as the error is minimized. In addition, since the duty of both the first switching element and the second switching element is adjusted, the fluctuation of the current flowing to the load can be reduced with a simple circuit configuration.

According to the invention of claim 7, claims 1 to 1
7. In the power supply device according to any one of 6, the high-intensity discharge lamp can be stably turned on when the load is a high-intensity discharge lamp.

According to the invention as set forth in claim 8, claims 1 to 1 are provided.
In the power supply device according to any one of the first to seventh aspects, the first and second switching elements of the reverse conduction type are formed of FETs, so that the high-intensity discharge lamp can be stably turned on.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a power supply device according to a first embodiment of the present invention.

FIG. 2 shows a case where the load impedance is extremely low.
3 is an operation waveform diagram of each part of FIG.

FIG. 3 shows a first case where the load is a general high-intensity discharge lamp.
4 is an output characteristic of the power supply device according to the embodiment.

FIG. 4 is a configuration diagram of a power supply device according to a second embodiment of the present invention.

FIG. 5 is a configuration diagram of a control unit shown in FIG. 4;

6 is a characteristic diagram of the target current generation circuit shown in FIG.

FIG. 7 is a characteristic diagram of the PWM circuit shown in FIG.

FIG. 8 shows a second case where the impedance of the load is extremely low.
FIG. 4 is an operation waveform diagram of each unit in the power supply device according to the embodiment.

FIG. 9 is an operation waveform diagram of each unit in the power supply device according to the second embodiment when the impedance of the load is high.

FIG. 10 is a configuration diagram of a power supply device according to a third embodiment of the present invention.

11 is a characteristic diagram of a PWM circuit in the control unit shown in FIG.

FIG. 12 is an explanatory diagram using a PWM circuit having the characteristics shown in FIG. 11;

FIG. 13 is a configuration diagram of a power supply device according to a fourth embodiment of the present invention.

FIG. 14 is a circuit diagram showing a conventional power supply device.

15 is an operation waveform diagram of each section shown in FIG.

16 is a diagram showing a state of a change in load current in the case of the power supply device shown in FIG.

[Explanation of symbols]

 DL High-intensity discharge lamp INV1, INV2 Inverter circuit BT DC power supply Ce1, Ce2 Capacitor Q1, Q2 FET SW1, SW2 Switching element C1 Capacitor L1 Inductor 1, 2, 3, 4 Control circuit 20, 40 Control unit 21, 31, 41 Drive Circuit 200 Load current detection circuit 201 Load voltage detection circuit 202 Target current generation circuit 203 Error amplifier 204 Delay circuit 205 PWM circuit 206 Low frequency oscillation circuit 207 Timing generation circuit 208 Duty adjustment circuit 209 Polarity switching circuit 400 Filter circuit 401 Amplifier 402 Load voltage Detection circuit 403 Target duty generation circuit 404 PWM circuit 405 Duty adjustment circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takeshi Kamoi 1048 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Works Co., Ltd. (72) Inventor Tamotsu Shiomi 1048 Kadoma Kazuma Kadoma City Osaka Prefecture Futari Matsushita Electric Works F Terms (reference) 3K072 AA11 AC01 BA03 BB01 BC01 EB05 EB07 GA02 GB12 GC04 HA10 HB03 3K082 AA01 AA13 AA51 BA04 BA24 BA33 BD03 BD04 BD26 BD32 CA32 5H007 BB03 CA02 CB12 DB01 DC05 EA02

Claims (8)

[Claims] A DC power supply, a first capacitor and a second capacitor.
A series circuit of a capacitor and a series circuit of a reverse conduction type first switching element and a second switching element are connected in parallel, and a first inductor is connected to a circuit formed by connecting at least a load and a third capacitor in parallel. It is configured by connecting in series to form an LC circuit, and connecting the LC circuit between a connection point of the first capacitor and the second capacitor and a connection point of the first switching element and the second switching element. An inverter circuit for operating the inverter circuit, wherein the first switching element and the second switching element are alternately turned on / off at a high frequency, and the first period and the second period are alternately operated at a low frequency. Switching, and in the case of the first period, the ON period of the first switching element is switched to the second switching period. In the case of the second period, the on-period of the second switching element is longer than the on-period of the first switching element. Immediately after the polarity of the substantially rectangular wave voltage is inverted, in the case of the first period, the on-period of the first switching element is set to be shorter than the on-period of the second switching element. A power supply device, wherein the ON period of the second switching element is shorter than the ON period of the first switching element in the case of the second period. 2. The method according to claim 1, wherein in the first period, the on-period of the first switching element is shortened and the on-period of the second switching element is extended for a predetermined period immediately after the polarity of the substantially rectangular wave voltage is inverted. The power supply device according to claim 1, wherein in the case of the second period, the ON period of the second switching element is shortened and the ON period of the first switching element is lengthened. 3. The power supply device according to claim 1, wherein the on-duty of both the first switching element and the second switching element is not suddenly changed when the polarity of the low frequency substantially rectangular wave voltage is inverted. 4. The power supply device according to claim 1, wherein a change rate of an on-duty in the first period and the second period is set according to the capacitance of the first capacitor and the second capacitor. 5. A current detecting means for detecting a current flowing through the load, a target current generating means for generating a voltage which is a reference of a current to be passed through the load, and a current detecting means for detecting a current flowing through the load. An error amplifier for amplifying a signal corresponding to a detected current error; a PWM circuit for adjusting a duty ratio of an oscillation signal for the first switching element and the second switching element in accordance with an output signal of the error amplifier; The power supply device according to claim 1, further comprising: a polarity switching unit that receives an output signal of the PWM circuit and switches an oscillation signal for the first switching element and the second switching element according to the first period and the second period. 6. A first average value detecting means for detecting an average value of a voltage value between both ends of the first capacitor; a second average value detecting means for detecting an average value of a voltage value between both ends of the second capacitor; And an error amplifier that detects a difference between the two average values as an error, wherein the duty of both the first switching element and the second switching element is adjusted so that the difference between the average values as the error is minimized. Item 7. The power supply according to Item 1. 7. The load according to claim 1, wherein the load is a high-intensity discharge lamp.
The power supply device according to any one of claims 1 to 6. 8. The first switching element and the second switching element of the reverse conduction type are FETs.
The power supply device according to any one of claims 1 to 7.