JP2001053448A - Printed wiring board, solder resist resin composition, and method for manufacturing printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of cracks, etc., in a solder resist layer due to the difference between the thermal expansion of the solder resist layer and other parts by incorporating an inorganic filler in the resist layer. SOLUTION: In a printed wiring board in which at least one layer of conductor circuit is formed on a substrate and a solder resist layer 14 is formed as the uppermost layer, an inorganic filler is incorporated in the resist layer 14. Using the printed wiring board, the difference between the coefficients of linear expansion of the resist layer 14 and an interlayer resin insulating layer 2, etc., surrounding the resist layer 4 becomes smaller, because the coefficient of thermal expansion of the resist layer 14 is lowered by the inorganic filler incorporated in the layer 14. Consequently, the cracking, peeling, etc., of the solder resist layer 14 can be prevented in the manufacturing process of the printed wiring board or after electronic parts are mounted on the manufactured printed wiring board.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board in which cracks and peeling are less likely to occur in a solder resist layer.
The present invention relates to a solder resist resin composition used for the production and a method for producing the printed wiring board.

[0002]

2. Description of the Related Art A multilayer printed wiring board called a so-called multilayer build-up wiring board is manufactured by a semi-additive method or the like.
m on a resin substrate reinforced with glass cloth, etc.
It is manufactured by alternately laminating a conductor circuit made of copper or the like and an interlayer resin insulating layer. The connection between the conductor circuits via the interlayer resin insulation layer of the multilayer printed wiring board is performed by via holes.

Conventionally, build-up multilayer printed wiring boards have been manufactured by a method disclosed in, for example, Japanese Patent Application Laid-Open No. 9-130050. That is, first, a through-hole is formed in the copper-clad laminate on which the copper foil is stuck, and then a through-hole is formed by performing an electroless copper plating process. Subsequently, a conductive circuit is formed by etching the surface of the substrate into a conductive pattern, and a roughened surface is formed on the surface of the conductive circuit by electroless plating, etching, or the like. Then, after forming a resin insulation layer on the conductor circuit having the roughened surface, exposure and development are performed to form an opening for a via hole, and then an interlayer resin insulation layer is formed through UV curing and main curing. I do.

Further, after roughening the interlayer resin insulating layer with an acid or an oxidizing agent, a thin electroless plating film is formed, a plating resist is formed on the electroless plating film, and then electrolytic plating is performed. Thickening is performed and etching is performed after the plating resist is stripped to form a conductive circuit connected to the lower conductive circuit via holes. After repeating this process, finally, a solder resist layer for protecting the conductor circuit was formed, and a portion where an opening was exposed for connection with an electronic component such as an IC chip or a motherboard was plated. Thereafter, the solder paste is printed to form solder bumps, thereby completing the manufacture of the build-up multilayer printed wiring board.

[0005] The multilayer printed wiring board thus manufactured is reflowed after the IC chip is mounted thereon, the solder bumps and the pads of the IC chip are connected, and an underfill (resin layer) is formed under the IC chip. ) To form an encapsulation layer made of resin or the like on the IC chip.
The manufacture of the semiconductor device on which the chip is mounted is completed.

In the semiconductor device manufactured as described above, the expansion coefficient (linear expansion coefficient) of each layer is usually different due to the material of each layer. That is,
The linear expansion coefficient of an IC chip, an underfill, and an interlayer resin insulation layer is usually 20 × 10 ⁻⁶ K ⁻¹ or less. However, the solder resist layer has a low linear expansion coefficient due to a difference in resin used. It is as high as 60 × 10 ⁻⁶ to 80 × 10 ⁻⁶ K ^−1, and the highest one is more than 100 × 10 ⁻⁶ K ⁻¹ .

[Problems to be solved by the invention]

When the semiconductor device having such a configuration is operated, the IC chip generates heat, and this heat is transmitted to the solder resist layer, the interlayer resin insulation layer, and the like via the underfill,
These layers expand thermally with increasing temperature. On this occasion,
Since there is almost no difference in linear expansion coefficient between the IC chip and the underfill, the degree of expansion due to temperature rise does not change much, and no large stress is generated due to the difference in thermal expansion between the two. The layer and the solder resist layer sandwiched between these layers have greatly different linear expansion coefficients, so the degree of thermal expansion also differs greatly, and accordingly, a large stress occurs in the solder resist layer, and in some cases, the solder resist layer Cracks and peeling occur.

[0008] Such cracks and peeling may also occur due to heating or the like when forming solder bumps.
In a heat cycle test in which the printed wiring board is exposed to severe conditions and a reliability test under high temperature and high humidity, cracks and the like are more likely to occur. If cracks occur, the insulation between the conductor circuit under the solder resist layer and the solder bumps or the like cannot be maintained, resulting in a decrease in insulation and reliability.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method of manufacturing a printed wiring board and a method of mounting an IC chip on the printed wiring board, and forming a solder resist layer and other parts. Printed wiring board without the occurrence of cracks or the like due to the difference in thermal expansion from the portion, the solder resist resin composition used for manufacturing the printed wiring board, and the printed wiring board using the solder resist resin composition It is to propose a manufacturing method.

[0010]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies to achieve the above object, and as a result, by forming a solder resist layer containing an inorganic filler on a printed wiring board, the thermal expansion of the solder resist layer has been improved. And the difference in the coefficient of linear expansion from the surrounding interlayer resin insulation layer and the like can be reduced. As a result, the manufacturing process of the printed wiring board or the printed The inventors have found that it is possible to prevent the occurrence of cracks and the like in the solder resist layer after mounting components, and have arrived at the invention having the following content as a gist configuration.

That is, the printed wiring board of the present invention is a printed wiring board in which at least one conductive circuit is formed on a substrate and a solder resist layer is formed on the uppermost layer. It is characterized by containing.

In the printed wiring board, the inorganic filler is desirably at least one selected from the group consisting of an aluminum compound, a calcium compound, a potassium compound, a magnesium compound, and a silicon compound. The inorganic filler preferably has a particle size in the range of 0.1 to 5.0 μm.
It is particularly desirable to be in the range of 3 to 2.0 μm.

[0013] The solder resist resin composition of the present invention comprises:
A solder resist resin composition used for manufacturing the printed wiring board, wherein an inorganic filler is compounded in a paste containing a resin for a solder resist layer.

The method for manufacturing a printed wiring board according to the present invention is a method for manufacturing a printed wiring board in which at least one conductive circuit is formed on a substrate and a solder resist layer is formed on the uppermost layer. It is characterized by using a composition.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION The printed wiring board of the present invention is a printed wiring board having at least one conductive circuit formed on a substrate and a solder resist layer formed on the uppermost layer,
The solder resist layer contains an inorganic filler.

According to the printed wiring board, since the solder resist layer contains an inorganic filler, the thermal expansion coefficient of the solder resist layer is reduced due to the inorganic filler, and the interlayer resin insulating layer existing around the solder resist layer has a reduced thermal expansion coefficient. The difference in the coefficient of linear expansion between the solder resist layer and the underfill etc. is reduced, and as a result, cracks and peeling of the solder resist layer after the electronic component such as an IC chip is mounted on the printed wiring board manufacturing process or the manufactured printed wiring board are reduced. Generation can be prevented.

That is, since the above-mentioned inorganic filler has a lower linear expansion coefficient than the resin constituting the solder resist layer, the solder resist layer expands due to heat, and has a lower linear expansion coefficient than the underfill or the interlayer resin insulating layer. When a large internal stress is generated in the solder resist layer due to the difference, it plays a role of relieving it. As described above, as a result of the internal stress being relieved by the inorganic filler, cracks and peeling of the solder resist layer can be prevented from occurring.

The inorganic filler is not particularly restricted but includes, for example, aluminum compounds, calcium compounds, potassium compounds, magnesium compounds,
And silicon compounds. These compounds may be used alone or in combination of two or more.

Examples of the aluminum compound include alumina and aluminum hydroxide. Examples of the calcium compound include calcium carbonate and
Calcium hydroxide and the like.

The potassium compound includes, for example, potassium carbonate. The magnesium compound includes, for example, magnesia, dolomite and basic magnesium carbonate. The silicon compound includes
For example, silica, zeolite and the like can be mentioned.

The shape of the inorganic filler is not particularly limited, but examples include a spherical shape, an elliptical spherical shape, and a polyhedral shape. Among them, a spherical shape, an elliptical spherical shape, and the like are desirable because a sharp tip easily causes cracks.

The size of the inorganic filler is desirably such that the length (or diameter) of the longest portion is in the range of 0.1 to 5.0 μm. If it is less than 0.1 μm, it is difficult to relieve the internal stress generated when the solder resist layer thermally expands, and the coefficient of thermal expansion cannot be adjusted. If it exceeds 5.0 μm, the solder resist layer itself becomes hard and brittle, In addition, when performing photo-curing or thermal curing, the inorganic filler inhibits the reaction between the resins, and as a result, cracks are likely to occur. From such a point, the inorganic filler is more preferably transparent.

When SiO ₂ is blended as the above-mentioned inorganic filler, its blending amount is preferably in the range of 3 to 50% by weight. If the amount is less than 3% by weight, the coefficient of thermal expansion of the solder resist layer does not decrease. On the other hand, if the amount exceeds 50% by weight, the resolution is reduced and the openings are abnormal. More preferably, 5-
40% by weight. The content of the inorganic filler in the solder resist layer is preferably 5 to 40% by weight. By using the inorganic filler in the above content ratio, the coefficient of linear expansion of the solder resist layer can be effectively reduced, and the stress generated by thermal expansion can be effectively reduced.

Further, it is desirable that a resin composed of an elastomer is blended in the solder resist layer. Since the elastomer itself is rich in flexibility and rebound resilience, even if it receives stress, it absorbs the stress or relieves the stress, so that cracking and peeling can be prevented. In addition, the sea-island structure can prevent cracks and peeling due to the stress.

Examples of the elastomer used in the present invention include natural rubber, synthetic rubber, thermoplastic resin, thermosetting resin and the like. In particular, an elastomer made of a thermosetting resin can sufficiently reduce stress. Examples of the elastomer composed of the thermosetting resin include a polyester elastomer, a styrene elastomer, a vinyl chloride elastomer, a fluorine elastomer, an amide elastomer, and an olefin elastomer.

The solder resist layer constituting the printed wiring board of the present invention may be made of, for example, a thermosetting resin, a thermoplastic resin, a composite of a thermosetting resin and a thermoplastic resin, in addition to the above-mentioned inorganic filler and elastomer. And the like.
As such a resin layer, for example, a (meth) acrylate of a novolak type epoxy resin, a bifunctional (meth) acrylate monomer, a polymer of a (meth) acrylate having a molecular weight of about 500 to 5,000, a bisphenol type epoxy resin Examples thereof include those obtained by polymerizing and curing a composition composed of a thermosetting resin composed of a resin or the like, or a photosensitive monomer such as a polyvalent acrylic monomer.

The difunctional (meth) acrylic acid ester monomer is not particularly restricted but includes, for example, acrylic acid or methacrylic acid esters of various diols, and commercially available products manufactured by Nippon Kayaku Co., Ltd. R-60
4, PM2, PM21, and the like.

(Meth) of the above novolak type epoxy resin
Examples of the acrylate include an epoxy resin obtained by reacting glycidyl ether of phenol novolak or cresol novolac with acrylic acid, methacrylic acid, or the like.

Next, the solder resist resin composition of the present invention will be described. The solder resist resin composition of the present invention is characterized in that a paste containing a resin for a solder resist layer is mixed with an inorganic filler.

As the inorganic filler, those described above can be used. Further, the compounding amount is preferably such that the content ratio in the formed solder resist layer is 5 to 20% by weight.

The solder resist resin composition of the present invention comprises:
In addition to the inorganic filler, the above-mentioned novolak-type epoxy resin (meth) acrylate, imidazole curing agent, bifunctional (meth) acrylate monomer, polymer of (meth) acrylate having a molecular weight of about 500 to 5,000, A paste-like fluid containing a thermosetting resin such as a bisphenol-type epoxy resin, a photosensitive monomer such as a polyvalent acrylic monomer, or a glycol ether-based solvent is desirable.
It is desirable that the pressure be adjusted to 10 Pa · s.

The imidazole curing agent is not particularly limited, but it is desirable to use an imidazole curing agent which is liquid at 25 ° C. This is because uniform kneading is difficult with powder, and liquid can be kneaded more uniformly. As such a liquid imidazole curing agent, for example, 1-
Benzyl-2-methylimidazole (Shikoku Chemicals, 1
B2MZ), 1-cyanoethyl-2-ethyl-4-methylimidazole (2E4MZ-CN, manufactured by Shikoku Chemicals),
4-methyl-2-ethylimidazole (manufactured by Shikoku Chemicals, Inc.
2E4MZ).

As the above glycol ether solvent,
For example, those having the chemical structure represented by the following general formula (1) are desirable, and more specifically, it is more desirable to use at least one selected from diethylene glycol dimethyl ether (DMDG) and triethylene glycol dimethyl ether (DMTG). These solvents are
This is because benzophenone, Michler's ketone, and ethylaminobenzophenone, which are polymerization initiators, can be completely dissolved by heating at about 30 to 50 ° C. CH ₃ O— (CH ₂ CH ₂ O) _n —CH ₃ (1) (in the above formula, n is an integer of 1 to 5.)

When a solder resist layer is formed using such a solder resist resin composition, first, a plurality of conductive circuits and an interlayer resin insulating layer are formed by a process described later, and the conductive circuit is formed on the uppermost layer. On the formed substrate,
A paste having the above composition is applied by a roll coater method or the like and dried. Thereafter, an opening for forming a solder bump is formed in a portion of the solder resist layer corresponding to a predetermined position of the lower conductive circuit, and if necessary, a curing process is performed to form a solder resist layer.

The linear expansion coefficient of the resin or the resin composite constituting the solder resist layer is 60 × 10 ^-6 to 80.
× 10 ⁻⁶ K ⁻¹ , but by including the inorganic filler in this layer, the coefficient of linear expansion is increased to 40 to 50 × 10
^{-6K- 1} can be reduced.

Next, the method for manufacturing a printed wiring board of the present invention will be briefly described. (1) In the method for manufacturing a printed wiring board of the present invention, first, a substrate having a conductive circuit formed on a surface of an insulating substrate is prepared.

As the insulating substrate, a resin substrate is desirable, and specific examples thereof include a glass epoxy substrate, a polyimide substrate, a bismaleimide-triazine resin substrate, a fluororesin substrate, a ceramic substrate, and a copper-clad laminate. . In the present invention, a through hole is formed in the insulating substrate by a drill or the like, and the wall surface of the through hole and the surface of the copper foil are subjected to electroless plating to form a surface conductive film and a through hole. Copper plating is preferred as the electroless plating.

After the electroless plating, a roughening treatment is usually performed on the inner wall of the through hole and the surface of the electrolytic plating film.
Examples of the roughening forming treatment method include blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, treatment with Cu-Ni-P needle-like alloy plating, and the like.

(2) Next, a conductive circuit-shaped etching resist is formed on the electroless-plated substrate, and the conductive circuit is formed by etching. Next, a resin filler is applied to the surface of the substrate on which the conductive circuit is formed, dried to a semi-cured state, then polished, the resin filler layer is ground, and the upper part of the conductive circuit is also ground. Then, both main surfaces of the substrate are flattened. Thereafter, the layer of the resin filler is completely cured. When forming the resin filler layer, using a mask having openings formed in the conductor circuit non-forming portions, only the conductor circuit non-forming portions in which the concave portions are formed by etching are filled with the resin filler, and then, The above-described polishing treatment or the like may be performed.

(3) Next, a roughened layer or a roughened surface (hereinafter, referred to as a roughened layer) is formed on the conductor circuit. As a roughening treatment method, for example, blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, Cu-Ni
-P alloy plating.

(4) Next, a coating layer made of tin, zinc, copper, nickel, cobalt, thallium, lead, or the like is formed on the surface of the formed roughened layer, if necessary, by electroless plating, vapor deposition, or the like. By depositing the coating layer in the range of 0.01 to 2 μm, the conductor circuit exposed from the interlayer insulating layer can be protected from a roughening solution or an etching solution, and discoloration and dissolution of the inner layer pattern can be reliably prevented. Because.

(5) Thereafter, an interlayer resin insulating layer is provided on the conductor circuit on which the roughened layer has been formed. As a material of the interlayer resin insulating layer, a thermosetting resin, a thermoplastic resin, a resin obtained by sensitizing a part of the thermosetting resin, or a composite resin thereof can be used. The interlayer insulating layer may be formed by applying an uncured resin, or may be formed by thermocompression bonding an uncured resin film. Further, a resin film in which a metal layer such as a copper foil is formed on one surface of an uncured resin film may be attached. When such a resin film is used, an opening is formed by irradiating a laser beam after etching a metal layer in a via hole forming portion. As the resin film having the metal layer formed thereon, a resin-coated copper foil or the like can be used.

In forming the interlayer insulating layer, an adhesive layer for electroless plating can be used. The most suitable adhesive for electroless plating is one in which heat-resistant resin particles soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or oxidizing agent. is there. By treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.

In the above-mentioned adhesive for electroless plating, the heat-resistant resin particles which have been particularly cured include (a) a heat-resistant resin powder having an average particle diameter of 10 μm or less, and (b) an average particle diameter of 2 μm or less. Aggregated particles obtained by aggregating heat-resistant resin powder,
(c) a mixture of a heat-resistant resin powder having an average particle diameter of 2 to 10 μm and a heat-resistant resin powder having an average particle diameter of 2 μm or less, (d)
Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle diameter of 2 μm or less to the surface of a heat-resistant resin powder having an average particle diameter of 2 to 10 μm, A mixture of 0.1 to 0.8 μm heat-resistant powder resin powder and a heat-resistant resin powder having an average particle diameter of more than 0.8 μm and less than 2 μm, (f) an average particle diameter of 0.1 to 1.0 μm It is desirable to use heat-resistant resin powder. They are,
This is because a more complicated anchor can be formed.

Examples of the heat-resistant resin hardly soluble in an acid or an oxidizing agent include a “resin composite composed of a thermosetting resin and a thermoplastic resin” and a “resin composite composed of a photosensitive resin and a thermoplastic resin”. desirable. This is because the former has high heat resistance, and the latter can form an opening for a via hole by photolithography.

As the thermosetting resin, for example, epoxy resin, phenol resin, polyimide resin and the like can be used. Examples of the photosensitized resin include those obtained by subjecting a thermosetting group to methacrylic acid or acrylic acid to undergo an acrylation reaction. In particular, an acrylated epoxy resin is most suitable. As the epoxy resin, a novolak type epoxy resin such as a phenol novolak type and a cresol novolak type, and an alicyclic epoxy resin modified with dicyclopentadiene can be used.

As the thermoplastic resin, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PP
E), polyetherimide (PI), fluororesin and the like can be used. The mixing ratio of the thermosetting resin (photosensitive resin) and the thermoplastic resin is preferably thermosetting resin (photosensitive resin) / thermoplastic resin = 95/5 to 50/50. This is because a high toughness value can be secured without impairing the heat resistance.

The mixing ratio by weight of the heat-resistant resin particles is preferably from 5 to 50% by weight, more preferably from 10 to 40% by weight, based on the solid content of the heat-resistant resin matrix. As the heat-resistant resin particles, an amino resin (a melamine resin, a urea resin, a guanamine resin), an epoxy resin or the like is desirable.

(6) Next, while the interlayer insulating resin layer is cured, an opening for forming a via hole is provided in the interlayer resin layer. Opening of the interlayer insulating resin layer is performed using laser light or oxygen plasma when the resin matrix of the adhesive for electroless plating is a thermosetting resin, and exposed when the resin matrix is a photosensitive resin. Performed by development processing. In the exposure and development process, a photomask (preferably a glass substrate) on which a circular pattern for forming a via hole is drawn is brought into close contact with the photosensitive interlayer resin insulating layer on the circular pattern side. After mounting, the substrate is exposed and immersed in a developing solution or sprayed with the developing solution. By curing the interlayer resin insulating layer formed on the conductor circuit having a roughened surface with a sufficient unevenness, an interlayer resin insulating layer having excellent adhesion to the conductor circuit can be formed.

(7) Next, the surface of the interlayer resin insulating layer (the adhesive layer for electroless plating) having the via hole opening is roughened. Usually, the roughening is performed by dissolving and removing the heat-resistant resin particles present on the surface of the adhesive layer for electroless plating with an acid or an oxidizing agent. The height of the roughened surface formed by acid treatment or the like is desirably Rmax = 0.01 to 20 μm. This is for ensuring adhesion to the conductor circuit. In particular, in the semi-additive method, 0.1 to 5 μm is desirable. This is because the electroless plating film can be removed while ensuring adhesion.

When performing the above acid treatment, phosphoric acid, hydrochloric acid,
Sulfuric acid or an organic acid such as formic acid or acetic acid can be used, and it is particularly preferable to use an organic acid. This is because the metal conductor layer exposed from the via hole is hardly corroded when the roughening treatment is performed. The oxidation treatment is performed using chromic acid,
It is desirable to use permanganate (such as potassium permanganate).

(8) Next, a thin electroless plating film is formed on the entire surface of the roughened interlayer insulating resin. The electroless plating film is preferably formed by electroless copper plating, and has a thickness of 1 to 3.
5 μm is desirable, and 2-3 μm is more desirable.

(9) Further, a plating resist is provided thereon. As the plating resist, a commercially available photosensitive dry film or liquid resist can be used. Then, after applying a photosensitive dry film or applying a liquid resist, an ultraviolet exposure process is performed, and a developing process is performed with an alkaline aqueous solution.

(10) Then, after the substrate subjected to the above treatment is immersed in an electroplating solution, direct current electroplating is performed using the electroless plating layer as a cathode and the metal to be plated as an anode, and plating the openings for via holes. While filling
An upper conductor circuit is formed. As the electrolytic plating, electrolytic copper plating is preferable, and its thickness is preferably 10 to 20 μm.

(11) Next, the plating resist is peeled off with a strong alkali aqueous solution and then etched to remove the electroless plating layer, thereby forming the upper conductor circuit and the via hole into an independent pattern. As the etching solution, a sulfuric acid / hydrogen peroxide aqueous solution, an aqueous solution of a persulfate such as ferric chloride, cupric chloride, or ammonium persulfate is used. The palladium catalyst nuclei exposed on the non-conductor circuit portion are dissolved and removed with chromic acid, sulfuric acid, hydrogen peroxide or the like.

(12) If necessary, the steps (3) to (11) are repeated, and the uppermost conductive circuit is subjected to electroless plating, etching, or the like under the same conditions as in the above step (3). A roughened layer or a roughened surface is formed on the conductor circuit.

Next, the above-described solder resist resin composition is applied to the surface of the substrate including the uppermost conductive circuit by a roll coater method or the like, and the above-described opening treatment, curing treatment, and the like are performed. Thereby, a solder resist layer is formed. Then, after this, the manufacture of the printed wiring board is completed by forming solder bumps in the openings of the solder resist layer. In addition, a plasma treatment with oxygen, carbon tetrachloride, or the like may be performed as needed for a character printing process for forming a product recognition character or the like or for modifying a solder resist layer. Although the above method is based on the semi-additive method, a full additive method may be employed.

[0058]

The present invention will be described in more detail with reference to the following examples. Example 1 A. Preparation of adhesive for electroless plating (adhesive for upper layer) (i) 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80% by weight of diethylene glycol dimethyl ether (DMDG) 35 parts by weight of a resin solution dissolved in water, photosensitive monomer (Aronix M315, manufactured by Toa Gosei Co., Ltd.) 3.1
5 parts by weight, antifoaming agent (S-65, manufactured by San Nopco) 0.5
Parts by weight and 3.6 parts by weight of N-methylpyrrolidone (NMP) were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight, 7.2 parts by weight of an epoxy resin particle (manufactured by Sanyo Kasei Co., polymer pole) having an average particle diameter of 1.0 μm and 3.09 parts by weight of an epoxy resin particle having an average particle diameter of 0.5 μm were placed in another container, After stirring and mixing, 30 parts by weight of NMP was further added and stirred and mixed with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), a photopolymerization initiator (Irgacure, manufactured by Ciba Specialty Chemicals)
I-907) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku Co., Ltd., DE
TX-S) 0.2 part by weight and 1.5 parts by weight of NMP were further placed in another container, and mixed by stirring to prepare a mixed composition. Then, an adhesive for electroless plating was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

B. Preparation of adhesive for electroless plating (adhesive for lower layer) (i) 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80% by weight of diethylene glycol dimethyl ether (DMDG) 35 parts by weight of a resin solution, 4 parts by weight of a photosensitive monomer (manufactured by Toagosei Co., Aronix M315), 0.5 parts by weight of an antifoaming agent (S-65 manufactured by Sannopco) and N-methylpyrrolidone (NMP) 3.6 parts by weight were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight and epoxy resin particles (manufactured by Sanyo Chemical Industries,
14.4 having an average particle size of 0.5 μm
9 parts by weight were placed in another container and mixed with stirring.
30 parts by weight of MP was added and mixed by stirring with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), a photopolymerization initiator (Irgacure, manufactured by Ciba Specialty Chemicals)
I-907) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku Co., Ltd., DE
TX-S) 0.2 part by weight and 1.5 parts by weight of NMP were further placed in another container, and mixed by stirring to prepare a mixed composition. Then, an adhesive for electroless plating was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

C. Preparation of resin filler (i) 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., molecular weight: 310, YL983U),
SiO ₂ spherical particles having an average particle diameter of 1.6 μm and a maximum particle diameter of 15 μm or less (manufactured by Admatechs, CRS 11)
01-CE) 170 parts by weight and 1.5 parts by weight of a leveling agent (Perenol S4 manufactured by San Nopco) are placed in a container and mixed by stirring to obtain a resin filler having a viscosity of 23 ± 1 ° C. and 40 to 50 Pa · s. Prepared. As a curing agent, an imidazole curing agent (2E, manufactured by Shikoku Chemicals Co., Ltd.)
4MZ-CN) 6.5 parts by weight.

D. Manufacturing method of printed wiring board (1) 1 mm thick glass epoxy resin or BT (bismaleimide triazine) resin
A copper-clad laminate on which an 8 μm copper foil 8 was laminated was used as a starting material (see FIG. 1A). First, the copper-clad laminate was drilled, subjected to electroless plating, and etched in a pattern to form a lower conductor circuit 4 and through holes 9 on both surfaces of the substrate 1.

(2) Through hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reduction bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 1 (b)). .

(3) After the resin filler described in C above is prepared, the resin filler 10 is applied to one surface of the substrate using a roll coater, so that the resin filler 10 is provided between the lower conductor circuits 4 or in the through holes 9. After being dried by heating, the other surface was similarly filled with a resin filler 10 between the conductor circuits 4 or in the through holes 9 and dried by heating (see FIG. 1 (c)).

(4) One side of the substrate after the treatment of the above (3) was subjected to belt sander polishing using # 600 belt abrasive paper (manufactured by Sankyo Rikagaku Co., Ltd.) to fill the resin formed on the outer periphery of the conductor circuit. The upper portion of the layer of the material 10 and the layer of the resin filler 10 formed on the portion where the conductive circuit was not formed were polished, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. If necessary, the lands 9a of the through holes 9 and the roughened surface 4a formed in the lower conductor circuit 4 may be planarized by etching before and after polishing. Thereafter, a heat treatment was performed at 100 ° C. for 1 hour and at 150 ° C. for 1 hour to completely cure the resin filler layer.

In this way, the surface layer of the resin filler 10 and the surface of the lower conductor circuit 4 formed in the through holes 9 and the portions where the conductor circuit is not formed are flattened, and the resin filler 10 and the side surfaces of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was obtained, thereby obtaining an insulating substrate firmly adhered through the roughened surface (see FIG. 1D).

(5) Next, the insulated substrate on which the conductor circuit was formed in the above-mentioned step was alkali-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid to remove the Pd catalyst. To activate the catalyst.

Next, copper sulfate (3.9 × 10 ^-2 mol /
l), nickel sulfate (3.8 × 10 ^-3 mol / l), sodium citrate (7.8 × 10 ^-3 mol / l), sodium hypophosphite (2.3 × 10 ^-1 mol / l) ), Surfactant (Sufinol 465, manufactured by Nissin Chemical Industry Co., Ltd.)
(1.0 g / l), the substrate was immersed in an electroless copper plating bath of pH = 9 consisting of an aqueous solution containing 1 g of an aqueous solution, and after 1 minute of immersion, vibrated in the vertical and horizontal directions at a rate of once per 4 seconds. Cu-N on the surface of the land of the lower conductor circuit and the through hole
A roughened layer 11 of a needle-shaped alloy made of iP was provided (FIG. 2).
(A)).

(6) Further, tin borofluoride (0.1 mol
1 / l), temperature 3 containing thiourea (1.0 mol / l)
Using a tin-substituted plating solution at 5 ° C. and a pH of 1.2, a Cu—Sn substitution reaction was performed for 10 minutes in an immersion time to provide a 0.3 μm-thick Sn layer on the surface of the roughened layer. However, this Sn layer is not shown.

(7) Adhesive for lower layer electroless plating described in B above (viscosity: 1.5 Pa ·
s) was applied using a roll coater within 24 hours after preparation, allowed to stand in a horizontal state for 20 minutes, and then dried at 60 ° C. for 30 minutes. Next, the adhesive for electroless plating (viscosity: 7 Pa · s) for the upper layer described in the above A was applied using a roll coater within 24 hours after preparation, and similarly left for 20 minutes in a horizontal state, After drying at 60 ° C. for 30 minutes, a 35 μm-thick electroless plating adhesive layer 2
a and 2b were formed (see FIG. 2B).

(8) A photomask film on which a black circle having a diameter of 85 μm is printed is brought into close contact with both surfaces of the substrate on which the adhesive layer for electroless plating is formed in the above (7), and is 500 mJ / cm by an ultra-high pressure mercury lamp. After exposure at ^two intensities, it was spray-developed with a DMDG solution. Thereafter, the substrate was further exposed at 3000 mJ / cm ² intensity using an ultra-high pressure mercury lamp,
A heat treatment at 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours is performed.
(See FIG. 2 (c)). Note that the tin plating layer was partially exposed in the opening serving as the via hole.

(9) The substrate having the via hole opening 6 formed thereon is immersed in a chromic acid aqueous solution (7500 g / l) for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the interlayer resin insulating layer. Was roughened to obtain a roughened surface. Then, it was immersed in a neutralizing solution (manufactured by Shipley) and washed with water (see FIG. 2D). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, catalyst nuclei were attached to the surface of the interlayer insulating material layer and the inner wall surface of the via hole opening.

(10) Next, the substrate is immersed in an aqueous solution of electroless copper plating having the following composition, and has a thickness of 0.6 to 1.
An electroless copper plating film 12 of 2 μm was formed (FIG. 3A)
reference). [Electroless plating aqueous solution] EDTA 0.08 mol / l Copper sulfate 0.03 mol / l HCHO 0.05 mol / l NaOH 0.05 mol / l α, α'-bipyridyl 80 mg / l PEG 0.10 g / L (polyethylene glycol) [Electroless plating conditions] at a liquid temperature of 65 ° C for 20 minutes

(11) A commercially available photosensitive dry film is affixed to the electroless copper plating film 12, a mask is placed thereon, and
Exposure at mJ / cm ² and development with a 0.8% aqueous sodium carbonate solution provided a plating resist 3 having a thickness of 15 μm (see FIG. 3B).

(12) Next, the copper-free copper plating film 13 having a thickness of 15 μm was formed on the non-resist-formed portion under the following conditions (see FIG. 3C). [Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l (manufactured by Atotech Japan, capparaside HL) [electroplating conditions] current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(13) Further, after the plating resist is peeled and removed with a 5% KOH aqueous solution, the electroless plating film under the plating resist is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide to form an independent upper layer. The conductor circuit 5 (including the via hole 7) was used (see FIG. 3D).

(14) With respect to the substrate on which the conductor circuit is formed,
Perform the same treatment as in (5), and apply a 2 μm thick
The alloy roughened layer 11 made of Cu—Ni—P was formed (see FIG. 4A). (15) Subsequently, the above steps (6) to (14) were repeated to form a further upper layer conductive circuit. (FIG. 4 (b)
To FIG. 5 (b)).

(16) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) so as to have a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer for imparting property (molecular weight: 4000), 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent ( (Shikoku Chemicals, trade name: 2E4MZ-CN)
6 parts by weight, 3 parts by weight of polyfunctional acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and polyvalent acrylic monomer (trade name: DP, manufactured by Kyoei Chemical Co., Ltd.)
E6A) 1.5 parts by weight, as an inorganic filler, 12.0 parts by weight of elliptical spherical alumina particles having an average particle diameter of the longest portion of 1.0 μm, a dispersion defoaming agent (manufactured by San Nopco, trade name: S- 65) 0.71 part by weight was placed in a container, stirred and mixed to prepare a mixed composition, and benzophenone (manufactured by Kanto Chemical Co., Ltd.) was used as a photopolymerization initiator for the mixed composition.
0 parts by weight and 0.2 parts by weight of Michler's ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer were added, and the viscosity was increased to 2.0 P at 25 ° C.
A solder resist resin composition adjusted to a · s was obtained.
The viscosity was measured using a B-type viscometer (DVL, manufactured by Tokyo Keiki Co., Ltd.).
-B type) and at 60 rpm, the rotor No. 4, 6r
pm, the rotor No. According to 3.

(17) Next, the above-mentioned solder resist composition is applied to both sides of the multilayer wiring board in a thickness of 20 μm, and
After performing a drying process under the conditions of 20 ° C. for 20 minutes and 70 ° C. for 30 minutes, a 5 mm-thick photomask on which a pattern of the opening of the solder resist is drawn is brought into close contact with the solder resist layer, and an ultraviolet ray of 1000 mJ / cm ² is applied. Exposure with DM
Development was performed with a TG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour, and at 100 ° C. for 1 hour.
The solder resist layer was cured by performing heat treatment under the conditions of 1 hour at 120 ° C. for 1 hour and 3 hours at 150 ° C., and a solder resist layer (organic resin insulating layer) having an opening in the solder pad portion and having a thickness of 20 μm. 14) was formed.

(18) Next, a solder resist layer (organic resin
The substrate on which the insulating layer (14) was formed was coated with nickel chloride (2.3).
× 10^-1mol / l), sodium hypophosphite (2.8
× 10 ^-1mol / l), sodium citrate (1.6 ×
10^-1mol / l) and pH = 4.5
Immersion in a plating solution for 20 minutes, and a 5 μm thick
A nickel plating layer 15 was formed. In addition, the board
Potassium gold cyanide (7.6 × 10^-3mol / l), salt
Ammonium iodide (1.9 × 10^-1mol / l), quenched
Sodium acid (1.2 × 10^-1mol / l), phosphorus hypophosphite
Sodium acid (1.7 × 10^-1mol / l)
Immerse in a plating solution at 80 ° C for 7.5 minutes,
0.03 μm thick gold plating layer on the Kell plating layer 15
No. 16 was formed.

(19) Thereafter, a solder paste is printed in the openings of the solder resist layer 14 and reflowed at 200 ° C. to form the solder bumps 17, thereby manufacturing a multilayer wiring printed board having the solder bumps 17 ( FIG. 5C).

Example 2 A. Preparation of adhesive for electroless plating (adhesive for upper layer), preparation of adhesive for electroless plating (adhesive for lower layer), and
Preparation of the resin filler was performed in the same manner as in Example 1.

B. Manufacturing method of printed wiring board (1) 1.0 mm thick glass epoxy resin or BT
A starting material was a copper-clad laminate in which 18 μm copper foils 8 were laminated on both sides of a substrate 1 made of (bismaleimide triazine) resin (see FIG. 6A). First, the copper-clad laminate was drilled, subjected to an electroless plating treatment, and etched in a pattern to form a lower conductor circuit 4 and a through hole 9 on both surfaces of the substrate 1.

(2) Through-hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reduction bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 6B). .

(3) After preparing the resin filler described in C above, within 24 hours after the preparation by the following method, the conductive circuit non-formed portion in the through hole 9 and on one side of the substrate 1 and the conductive circuit A layer of the resin filler 10 was formed on the outer edge portion of No. 4. That is, first, the resin filler was pushed into the through holes using a squeegee, and then dried at 100 ° C. for 20 minutes. Next, a mask having an opening corresponding to the conductor circuit non-forming portion is placed on the substrate, and a layer of the resin filler 10 is formed in the conductor circuit non-forming portion having a concave portion using a squeegee. It was dried at 20 ° C. for 20 minutes (see FIG. 6C).

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku) to form the surface of the inner layer copper pattern 4 and the through holes 9. Polishing was performed so that the resin filler 10 did not remain on the land surface, and then buffing was performed to remove scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Next, at 100 ° C. for 1 hour, at 120 ° C. for 3 hours, at 150 ° C.
For 1 hour and a heat treatment at 180 ° C. for 7 hours to cure the resin filler 10.

In this manner, the surface layer of the resin filler 10 and the surface of the lower conductor circuit 4 formed in the through hole 9 and the portion where the conductor circuit is not formed are flattened, and the resin filler 10 and the side surfaces of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was firmly adhered via the roughened surface to obtain an insulating substrate (see FIG. 6D).

(5) The substrate is washed with water and acid-degreased, and then soft-etched. Then, an etching solution is sprayed on both surfaces of the substrate by spraying, so that the surface of the lower conductor circuit 4 and the land surface of the through hole 9 and the inner wall are formed. Thus, roughened surfaces 4a and 9a were formed on the entire surface of the lower conductive circuit 4 (see FIG. 7A). As an etching solution, an etching solution (Mec etch bond, manufactured by Mec Co.) comprising 10 parts by weight of an imidazole copper (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride was used.

(6) An adhesive for lower layer electroless plating (viscosity: 1.5 Pa · s) is applied to both sides of the substrate using a roll coater within 24 hours after preparation, and left in a horizontal state for 20 minutes After that, drying was performed at 60 ° C. for 30 minutes. Next, an adhesive for electroless plating for the upper layer (viscosity: 7 Pa ·
s) was applied using a roll coater within 24 hours after preparation, and was similarly left standing in a horizontal state for 20 minutes, followed by drying at 60 ° C. for 30 minutes to obtain a 35 μm thick adhesive for electroless plating. The layers 2a and 2b were formed (see FIG. 7B).

(7) A photomask film in which a black circle with a diameter of 85 μm is drawn with light-shielding ink is brought into close contact with both surfaces of the substrate 1 on which the electroless plating adhesive layers 2a and 2b are formed in (6) above, 3000mJ / c by ultra-high pressure mercury lamp
Exposure at m ² intensity. Then, at 100 ° C. for 1 hour, 12
A heat treatment of 1 hour at 0 ° C. and 3 hours at 150 ° C. has a diameter of 8 with excellent dimensional accuracy equivalent to a photomask film.
An interlayer resin insulating layer 2 having a thickness of 35 μm and having a via hole opening 6 of 5 μm was formed (see FIG. 7C). Note that the tin plating layer was partially exposed in the opening serving as the via hole.

(8) The substrate in which the via hole opening 6 is formed is immersed in a solution containing chromic acid for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the interlayer resin insulating layer 2, whereby the interlayer resin is removed. The surface of the insulating layer 2 is made rough (depth 6
μm), and then immersed in a neutralizing solution (manufactured by Shipley) and washed with water (see FIG. 7D). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, catalyst nuclei were attached to the surface of the interlayer resin insulating layer 2 and the inner wall surface of the via hole opening 6.

(9) Next, the substrate was immersed in an electroless copper plating aqueous solution having the following composition, and the thickness of the substrate was reduced to 0.6 to 1.
An electroless copper plating film 12 of 2 μm was formed (FIG. 8A).
reference). [Electroless plating aqueous solution] NiSO ₄ 0.003 mol / l tartaric acid 0.200 mol / l copper sulfate 0.030 mol / l HCHO 0.050 mol / l NaOH 0.100 mol / l α, α′-bipyridyl 40 mg / l Polyethylene glycol (PEG) 0.10 g / l [Electroless plating conditions] 40 minutes at a liquid temperature of 35 ° C

(10) A commercially available photosensitive dry film is adhered to the electroless copper plating film 12 by thermocompression bonding, a mask is placed thereon, and the film is exposed at 100 mJ / cm ² .
It was developed with 8% sodium carbonate to provide a plating resist 3 having a thickness of 15 μm (see FIG. 8B).

(11) Next, electrolytic copper plating was performed under the following conditions to form an electrolytic copper plating film 13 having a thickness of 15 μm (see FIG. 8C). [Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l (manufactured by Atotech Japan, Capparaside HL) [electroplating conditions] current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(12) After the plating resist 3 is peeled and removed with 5% KOH, the electroless plating film 12 under the plating resist 3 is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide. Copper plating film 12 and electrolytic copper plating film 1
A conductor circuit (including the via hole 7) 5 made of 3 and having a thickness of 18 μm was formed (see FIG. 8D).

(13) By repeating the above steps (5) to (12), a further upper interlayer resin insulating layer and a conductive circuit were formed, and a multilayer wiring board was obtained. However, the rough surface of the surface layer has S
No coating layer was formed due to n-substitution or the like (FIG. 9A)
To FIG. 10 (b)). (14) Next, diethylene glycol dimethyl ether (D
MDG) to a concentration of 60% by weight.
Cresol novolak epoxy resin (Nippon Kayaku)
46.67 parts by weight of a photosensitizing oligomer (molecular weight: 4000) in which 50% of epoxy groups are acrylated, and 80% by weight of a bisphenol A type epoxy resin dissolved in methyl ethyl ketone (trade name: Epicoat, manufactured by Yuka Shell Co., Ltd.) 1001) 15.0 parts by weight, 1.6 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals), 3 parts by weight of a polyvalent acrylic monomer (R604, manufactured by Nippon Kayaku Co., Ltd.) as a photosensitive monomer 1.5 parts by weight of a polyvalent acrylic monomer (DPE6A manufactured by Kyoeisha Chemical Co., Ltd.)
As inorganic filler, spherical silica with an average particle size of 1.0 μm
10 parts by weight of a dispersion antifoaming agent (manufactured by San Nopco, S
-65) 0.71 part by weight was placed in a container, stirred and mixed to prepare a mixed composition, and 2.0 parts by weight of benzophenone (manufactured by Kanto Kagaku) as a photopolymerization initiator was added to the mixed composition. Michler's ketone as sensitizer (Kanto Chemical Co., Ltd.)
By adding 0.2 parts by weight, the viscosity at 25 ° C.
A solder resist resin composition adjusted to 0 Pa · s was obtained. The viscosity was measured using a B-type viscometer (manufactured by Tokyo Keiki Co., Ltd., D
VL-B) and at 60 rpm, the rotor No. 4,
In the case of 6 rpm, the rotor No. According to 3.

(15) Next, the above-mentioned solder resist composition is applied to both sides of the multilayer wiring board in a thickness of 20 μm,
After performing a drying process under the conditions of 20 ° C. for 20 minutes and 70 ° C. for 30 minutes, a 5 mm-thick photomask film on which a pattern of the solder resist opening is drawn is brought into close contact with the solder resist layer, and a thickness of 1000 mJ / cm ² is applied. It was exposed to ultraviolet light and developed with a DMTG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour,
Heat treatment is performed at 0 ° C. for 1 hour, at 120 ° C. for 1 hour, and at 150 ° C. for 3 hours to cure the solder resist layer. The solder resist layer 1 has an opening and a thickness of 20 μm.
4 was formed.

(16) Thereafter, the concentration of the etching solution containing sodium persulfate as a main component was adjusted so as to have an etching rate of about 2 μm per minute, and the substrate subjected to the above steps was immersed in this etching solution for 1 minute. , Average surface roughness (R
a) was 1 μm. (17) Next, the substrate subjected to the above-described roughening treatment was treated with nickel chloride (2.3 × 10 ^-1 mol / l), sodium hypophosphite (2.8 × 10 ^-1 mol / l), PH = 4.5 containing sodium acidate (1.6 × 10 ⁻¹ mol / l)
Was immersed in an electroless nickel plating solution for 20 minutes to form a nickel plating layer 15 having a thickness of 5 μm in the opening. Further, the substrate was subjected to potassium potassium cyanide (7.6 × 10 ^−3).
mol / l), ammonium chloride (1.9 × 10 ⁻¹ m)
ol / l), sodium citrate (1.2 × 10 ⁻¹ m
ol / l), sodium hypophosphite (1.7 × 10 ⁻¹⁾
(mol / l) at a temperature of 80 ° C. for 7.5 minutes to form a gold plating layer 16 having a thickness of 0.03 μm on the nickel plating layer 15.

(18) Thereafter, a solder paste is printed on the opening of the solder resist layer 14 and reflowed at 200 ° C. to form solder bumps 17, thereby manufacturing a multilayer wiring printed board having the solder 17 ( FIG. 10 (c)).

Example 3 A multilayer resist was prepared in the same manner as in Example 1, except that 7 parts by weight of an epoxidized polybutadiene was added as an elastomer in the step (16) of preparing the solder resist resin composition. A printed wiring board was manufactured.

(Example 4) In the same manner as in Example 2, except that 7 parts by weight of an epoxidized polybutadiene was added as an elastomer in the step of preparing the solder resist resin composition of (14). A printed wiring board was manufactured.

Comparative Example 1 Printing was performed in the same manner as in Example 1 except that a solder resist resin composition including a resin layer was used in the same ratio as in Example 1 except that no inorganic filler was added. A wiring board was obtained.

Comparative Example 2 Printing was performed in the same manner as in Example 2 except that a solder resist resin composition containing a resin layer was used in the same ratio as in Example 2 except that no inorganic filler was added. A wiring board was obtained. As described above, the printed wiring boards obtained in Examples 1 to 4 and Comparative Examples 1 and 2 were subjected to a relative humidity of 85% and an atmosphere of 130 ° C. for 300 hours.
After a reliability test in which the solder bumps were left for a time, the solder bumps were observed with a microscope. The printed wiring board after the test was cut with a cutter, and the solder resist layer was observed with a microscope.

Further, a cycle of maintaining for 3 minutes in an atmosphere of -65 ° C. and then for 3 minutes in an atmosphere of 130 ° C.
A heat cycle test was repeated 00 times, and then the printed wiring boards were cut with a cutter to observe whether cracks or the like occurred in the solder resist layer.

As a result, in the printed wiring boards obtained in Examples 1 to 4, no crack or peeling was observed, and no damage or destruction of the solder bumps was observed.
It was found that cracks occurred in the solder resist layer after the reliability test in the printed wiring board obtained in (1). In addition, the solder bumps were also damaged. Regarding the heat cycle test, no cracks or the like were observed in the printed wiring boards obtained in Examples 1 to 4, but Comparative Example 1
In the printed wiring boards obtained in Nos. 1 to 2, cracks were observed.

[0109]

As described above, according to the printed wiring board of the present invention, since the solder resist layer of the printed wiring board contains an inorganic filler, the coefficient of linear expansion is reduced, and In a manufacturing process or after mounting an electronic component such as an IC chip on the printed wiring board, it is possible to prevent occurrence of cracks or the like due to a difference in thermal expansion between the solder resist layer and other portions.

Further, according to the solder resist resin composition of the present invention, since the solder resist resin composition contains an inorganic filler, the use of the solder resist resin composition makes it possible to form a printed wiring board. A solder resist layer containing an inorganic filler can be formed, and as a result, in a manufacturing process of a printed wiring board or the like, occurrence of cracks or the like due to a difference in thermal expansion between the solder resist layer and another portion is prevented. Can be.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views illustrating a part of a manufacturing process of a printed wiring board according to the present invention.

FIGS. 2A to 2D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 3A to 3D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 4A to 4C are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 5A to 5C are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 6A to 6D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 7A to 7D are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 8A to 8D are cross-sectional views illustrating a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 9A to 9C are cross-sectional views showing a part of the manufacturing process of the printed wiring board of the present invention.

FIGS. 10A to 10C are cross-sectional views illustrating a part of the manufacturing process of the printed wiring board of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2a, 2b Adhesive layer for electroless plating 2 Interlayer resin insulating layer 4 Lower conductor circuit 4a Roughened surface 5 Upper layer conductor circuit 6 Via hole opening 7 Via hole 8 Copper foil 9 Through hole 9a Roughened surface 10 Resin filling Material 11 Roughened layer 12 Electroless plated layer 13 Electroplated layer 14 Solder resist layer 15 Nickel plated film 16 Gold plated film 17 Solder bump

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor 1-1, northern Ibikawa-cho, Ibi-gun, Gifu Prefecture F-term in the Ogaki-kita Plant (reference) 5E314 AA32 AA42 BB02 BB06 BB11 BB12 CC01 FF05 GG08 5E346 AA06 AA12 AA15 AA17 BB01 CC08 CC09 CC16 CC32 CC33 CC37 DD03 DD22 FF04 GG02 GG15 GG17 GG27 HH11 HH16

Claims (6)

[Claims] 1. A printed wiring board having at least one conductive circuit formed on a substrate and a solder resist layer formed on an uppermost layer, wherein the solder resist layer contains an inorganic filler. And printed wiring board. 2. The printed wiring board according to claim 1, wherein the inorganic filler is at least one selected from the group consisting of an aluminum compound, a calcium compound, a potassium compound, a magnesium compound, and a silicon compound. 3. The inorganic filler has a particle size of 0.1.
The printed wiring board according to claim 1, wherein the thickness is in a range from about 5.0 μm to about 5.0 μm. 4. The printed wiring board according to claim 1, wherein said solder resist layer contains an elastomer. 5. A solder resist resin composition used for producing the printed wiring board according to claim 1, wherein an inorganic filler is compounded in a paste containing a resin for a solder resist layer. A solder resist resin composition comprising: 6. A method for manufacturing a printed wiring board comprising at least one conductive circuit formed on a substrate and a solder resist layer formed on the uppermost layer, wherein the solder resist resin composition according to claim 5 is used. A method for manufacturing a printed wiring board, comprising: