JP2001052950A - Laminated ceramic electronic part and manufacture thereof - Google Patents
Laminated ceramic electronic part and manufacture thereofInfo
- Publication number
- JP2001052950A JP2001052950A JP11222620A JP22262099A JP2001052950A JP 2001052950 A JP2001052950 A JP 2001052950A JP 11222620 A JP11222620 A JP 11222620A JP 22262099 A JP22262099 A JP 22262099A JP 2001052950 A JP2001052950 A JP 2001052950A
- Authority
- JP
- Japan
- Prior art keywords
- sintered body
- ceramic
- internal electrode
- ceramic sintered
- multilayer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 114
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 238000005498 polishing Methods 0.000 claims description 13
- 238000010304 firing Methods 0.000 claims description 11
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 238000005245 sintering Methods 0.000 claims 2
- 238000005336 cracking Methods 0.000 abstract description 2
- 239000003990 capacitor Substances 0.000 description 25
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 18
- 239000010953 base metal Substances 0.000 description 7
- 239000011800 void material Substances 0.000 description 7
- 238000007747 plating Methods 0.000 description 5
- 239000002002 slurry Substances 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- 229910002113 barium titanate Inorganic materials 0.000 description 4
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 3
- 229910000510 noble metal Inorganic materials 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 238000007606 doctor blade method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、例えば積層コンデ
ンサのような積層セラミック電子部品及びその製造方法
に関し、より詳細には、セラミック焼結体の外表面に引
き出された内部電極の該引き出されている部分の構造が
改良された積層セラミック電子部品及びその製造方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer ceramic electronic component such as a multilayer capacitor and a method of manufacturing the same, and more particularly, to an internal electrode drawn to an outer surface of a ceramic sintered body. TECHNICAL FIELD The present invention relates to a multilayer ceramic electronic component in which the structure of a part is improved and a method of manufacturing the same.
【0002】[0002]
【従来の技術】積層コンデンサなどの積層セラミック電
子部品の製造に際しては、内部電極とセラミックスとを
交互に積層してなる積層体を焼成することによりセラミ
ック焼結体を得る。そして、セラミック焼結体をバレル
研磨等して内部電極を焼結体端面に露出させる。次に、
このセラミック焼結体の外表面に内部電極と電気的に接
続されるように外部電極を形成する。2. Description of the Related Art When manufacturing a multilayer ceramic electronic component such as a multilayer capacitor, a ceramic sintered body is obtained by firing a laminate formed by alternately laminating internal electrodes and ceramics. Then, the ceramic sintered body is subjected to barrel polishing or the like to expose the internal electrodes to the end surface of the sintered body. next,
External electrodes are formed on the outer surface of the ceramic sintered body so as to be electrically connected to the internal electrodes.
【0003】BaTiO3 を主成分とする通常の誘電体
セラミックスでは、内部電極としてパラジウムや白金な
どの貴金属が挙げられる。しかしながら、上記のような
貴金属を内部電極材料として用いた場合、積層セラミッ
ク電子部品のコストが上昇するという問題があった。[0003] In ordinary dielectric ceramics mainly composed of BaTiO 3 , noble metals such as palladium and platinum are used as internal electrodes. However, when such a noble metal is used as the internal electrode material, there is a problem that the cost of the multilayer ceramic electronic component increases.
【0004】そこで、上記のような問題を解決するた
め、ニッケルなどの安価な卑金属材料を内部電極として
用いることが提案されている。しかしながら、内部電極
材料として卑金属を用い、従来の条件で焼成すると、卑
金属からなる内部電極が酸化され、電極としての機能を
果たさなくなる。Therefore, in order to solve the above-mentioned problems, it has been proposed to use an inexpensive base metal material such as nickel as the internal electrode. However, if a base metal is used as the internal electrode material and firing is performed under the conventional conditions, the internal electrode made of the base metal is oxidized and no longer functions as an electrode.
【0005】そのため、卑金属を内部電極として用いる
場合には、酸素分圧が低い中性または還元性の雰囲気で
焼成されたとしても半導体化しないセラミックスを用い
ることが必要となる。このような条件を満たすセラミッ
ク材料として、従来より、種々の組成のチタン酸バリウ
ム系セラミックスが提案されている(例えば、特開昭6
2−256422号公報、特開昭63−103861号
公報など)。Therefore, when a base metal is used as an internal electrode, it is necessary to use a ceramic which does not turn into a semiconductor even when fired in a neutral or reducing atmosphere having a low oxygen partial pressure. As a ceramic material satisfying such conditions, barium titanate-based ceramics having various compositions have been proposed (for example, see Japanese Unexamined Patent Publication No.
2-256422, JP-A-63-103861, etc.).
【0006】[0006]
【発明が解決しようとする課題】積層セラミック電子部
品では、焼成に際し、内部電極とセラミックスとの収縮
率差や熱膨張率差により、内部電極とセラミックスとの
界面に残留応力が生じる。積層コンデンサなどにおい
て、内部電極間のセラミック層の厚みが薄く、かつ内部
電極積層数が多くなると、上記残留応力の影響が大きく
なる。従って、得られたセラミック焼結体に外部電極を
焼き付ける際の熱により、セラミック焼結体にクラック
が発生することがあった。In a multilayer ceramic electronic component, upon firing, residual stress is generated at the interface between the internal electrode and the ceramic due to the difference in the contraction rate and the difference in thermal expansion between the internal electrode and the ceramic. In a multilayer capacitor and the like, when the thickness of the ceramic layer between the internal electrodes is small and the number of internal electrodes stacked is large, the influence of the residual stress increases. Therefore, cracks may occur in the ceramic sintered body due to heat generated when the external electrodes are baked on the obtained ceramic sintered body.
【0007】ところで、積層セラミック電子部品の製造
に際して、セラミック焼結体を得た後に湿式バレル研磨
を行い、セラミック焼結体端面に確実に内部電極を露出
させることが行われている。ところがこの場合、バレル
研磨の初期段階でセラミック焼結体端面の内部電極露出
部分の空孔からバレル研磨に使用した水が入り込み、バ
レル研磨終了時までにセラミック焼結体に水が閉じ込め
られることがある。従って、その後の外部電極焼き付け
の際に、閉じ込められていた水の急激な気化が生じたり
することも、上記クラックが生じる一因と考えられる。[0007] In the production of multilayer ceramic electronic components, after a ceramic sintered body is obtained, wet barrel polishing is performed to ensure that the internal electrodes are exposed at the end faces of the ceramic sintered body. However, in this case, at the initial stage of barrel polishing, water used for barrel polishing enters through holes in exposed portions of the internal electrodes on the end surfaces of the ceramic sintered body, and water is trapped in the ceramic sintered body by the end of barrel polishing. is there. Therefore, a sudden vaporization of the trapped water during the subsequent baking of the external electrode is also considered to be one of the causes of the crack.
【0008】本発明の目的は、外部電極焼き付け時等の
熱によるセラミック焼結体のクラックが発生し難い、積
層セラミック電子部品及びその製造方法を提供すること
にある。An object of the present invention is to provide a multilayer ceramic electronic component in which cracks in a ceramic sintered body due to heat during baking of an external electrode and the like are less likely to occur, and a method of manufacturing the same.
【0009】[0009]
【課題を解決するための手段】本発明は、セラミック焼
結体と、前記セラミック焼結体内に配置されており、該
セラミック焼結体の外表面に引き出された複数の内部電
極と、前記セラミック焼結体の外表面に形成されてお
り、いずれかの内部電極に電気的に接続されている外部
電極とを備え、前記内部電極のセラミック焼結体外表面
に引き出されている部分において、各内部電極露出面積
に占める該内部電極露出部分中の空孔の割合が30%以
下とされていることを特徴とする。According to the present invention, there is provided a ceramic sintered body, a plurality of internal electrodes disposed in the ceramic sintered body, drawn out to the outer surface of the ceramic sintered body, and the ceramic sintered body. An external electrode formed on the outer surface of the sintered body and electrically connected to any one of the internal electrodes; The ratio of voids in the exposed portion of the internal electrode to the electrode exposed area is not more than 30%.
【0010】本発明においては、好ましくは、上記空孔
の割合は、10%以下とされる。また、本発明の特定の
局面によれば、上記内部電極は、NiまたはNi合金を
用いて構成される。[0010] In the present invention, preferably, the percentage of the vacancies is 10% or less. According to a specific aspect of the present invention, the internal electrode is formed using Ni or a Ni alloy.
【0011】本発明に係る積層セラミック電子部品の製
造方法は、導電ペーストからなる複数の内部電極パター
ンがセラミック層を介して積層されている構造を有する
積層セラミック電子部品単位の積層体を得る工程と、前
記積層体を焼成してセラミック焼結体を得る焼成工程
と、前記セラミック焼結体をバレル研磨するバレル研磨
工程と、バレル研磨されたセラミック焼結体の外表面に
外部電極を形成する外部電極形成工程とを備え、焼成後
に焼結体外表面における内部電極の露出面積に占める該
内部電極露出部分中の空孔の割合が30%以下となるよ
うに、前記積層体を得る工程において、導電ペーストか
らなる内部電極パターンを形成することを特徴とする。The method for manufacturing a multilayer ceramic electronic component according to the present invention includes a step of obtaining a multilayer ceramic electronic component unit having a structure in which a plurality of internal electrode patterns made of a conductive paste are laminated via a ceramic layer. A firing step of firing the laminate to obtain a ceramic sintered body, a barrel polishing step of barrel polishing the ceramic sintered body, and an external step of forming an external electrode on an outer surface of the barrel-polished ceramic sintered body. An electrode forming step, wherein in the step of obtaining the laminated body, the ratio of voids in the exposed portion of the internal electrode to the exposed area of the internal electrode on the outer surface of the sintered body after firing is 30% or less. It is characterized in that an internal electrode pattern made of paste is formed.
【0012】本発明に係る積層セラミック電子部品の製
造方法の特定の局面では、上記内部電極が、Niまたは
Ni合金を用いて構成される。In a specific aspect of the method for manufacturing a multilayer ceramic electronic component according to the present invention, the internal electrode is made of Ni or a Ni alloy.
【0013】[0013]
【発明の実施の形態】以下、図面を参照しつつ本発明の
具体的な実施例を説明することにより、本発明を明らか
にする。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.
【0014】図1(a)及び(b)は、本発明の一実施
例に係る積層セラミック電子部品としての積層コンデン
サの縦断面図及び該積層コンデンサの焼結体端面を模式
的に示す断面図である。FIGS. 1A and 1B are a vertical sectional view of a multilayer capacitor as a multilayer ceramic electronic component according to an embodiment of the present invention and a cross-sectional view schematically showing an end face of a sintered body of the multilayer capacitor. It is.
【0015】積層コンデンサ1は、セラミック焼結体2
を有する。セラミック焼結体2は、直方体状の形状を有
し、かつチタン酸バリウム系セラミックスなどの誘電体
セラミックスにより構成されている。The multilayer capacitor 1 includes a ceramic sintered body 2
Having. The ceramic sintered body 2 has a rectangular parallelepiped shape, and is made of a dielectric ceramic such as a barium titanate-based ceramic.
【0016】セラミック焼結体2内には、複数の内部電
極3〜8がセラミック層を介して厚み方向に重なり合う
ように配置されている。内部電極3,5,7は、セラミ
ック焼結体2の第1の端面2aに引き出されており、内
部電極4,6,8は、第1の端面2aとは反対側の第2
の端面2bに引き出されている。In the ceramic sintered body 2, a plurality of internal electrodes 3 to 8 are arranged so as to overlap in the thickness direction via a ceramic layer. The internal electrodes 3, 5, 7 are drawn out to the first end face 2a of the ceramic sintered body 2, and the internal electrodes 4, 6, 8 are connected to the second end face 2a opposite to the first end face 2a.
Is drawn out to the end face 2b.
【0017】端面2a,2bを覆うように外部電極9,
10が形成されている。外部電極9,10は、端面2
a,2bだけでなく、セラミック焼結体2の上面2c、
下面2d及び側面2e,2f(図1(b)参照)に至る
ように形成されている。External electrodes 9 are provided so as to cover the end faces 2a and 2b.
10 are formed. The external electrodes 9 and 10 are connected to the end face 2
a, 2b, the upper surface 2c of the ceramic sintered body 2;
It is formed so as to reach the lower surface 2d and the side surfaces 2e and 2f (see FIG. 1B).
【0018】外部電極9,10は、導電ペーストの塗布
・焼付により形成された第1の外部電極層の表面に、メ
ッキにより第2,第3の外部電極層を積層した構造を有
する。第2の外部電極層は、NiやCuをメッキするこ
とにより形成され、第3の外部電極層は、半田や錫など
の半田付け性に優れた金属材料をメッキすることにより
形成されている。The external electrodes 9 and 10 have a structure in which second and third external electrode layers are laminated by plating on the surface of a first external electrode layer formed by applying and baking a conductive paste. The second external electrode layer is formed by plating Ni or Cu, and the third external electrode layer is formed by plating a metal material having excellent solderability such as solder or tin.
【0019】本実施例の積層コンデンサ1の特徴は、内
部電極3〜8の端面2a,2bに露出している部分の該
内部電極露出面積に対して、内部電極中の空孔の占める
面積の割合(以下、空孔面積比と略す)が30%以下、
好ましくは10%以下とされていることにある。The feature of the multilayer capacitor 1 of this embodiment is that the area occupied by the holes in the internal electrodes is larger than the exposed area of the internal electrodes 3 to 8 at the end faces 2a and 2b. A ratio (hereinafter abbreviated as a void area ratio) of 30% or less;
Preferably, it is set to 10% or less.
【0020】すなわち、図1(b)及び図2に示すよう
に、端面2aには、内部電極3,5,7が露出されてい
る。内部電極3を例にとると、内部電極3の露出部分の
面積をSとし、内部電極3の端面2aに露出している部
分中において現れている空孔11の面積の合計をAとし
たとき、空孔面積比=A/S×100(%)が、30%
以下、好ましくは10%とされている。That is, as shown in FIGS. 1B and 2, the internal electrodes 3, 5, and 7 are exposed on the end face 2a. Taking the internal electrode 3 as an example, when the area of the exposed part of the internal electrode 3 is S, and the total area of the holes 11 appearing in the part exposed on the end face 2a of the internal electrode 3 is A , Void area ratio = A / S × 100 (%) is 30%
Hereinafter, it is preferably 10%.
【0021】積層コンデンサ1では、上記空孔面積比が
30%以下とされているので、後述の実験例から明らか
なように、外部電極9,10の形成に際し、導電ペース
トを塗布し、焼き付けたとしても、セラミック焼結体2
にクラックが生じ難い。In the multilayer capacitor 1, the above-mentioned hole area ratio is set to 30% or less, so that a conductive paste is applied and baked when forming the external electrodes 9 and 10 as will be apparent from an experimental example described later. As the ceramic sintered body 2
Cracks are less likely to occur.
【0022】なお、内部電極3〜8を構成する材料とし
ては、特に限定されず、NiまたはNi合金のような卑
金属、あるいはAg、Pdまたはこれらの合金のような
貴金属のいずれをも用いることができる。The material constituting the internal electrodes 3 to 8 is not particularly limited, and any of a base metal such as Ni or a Ni alloy or a noble metal such as Ag, Pd or an alloy thereof can be used. it can.
【0023】もっとも、前述したように、従来、Niま
たはNi合金のような卑金属を内部電極材料として用い
た場合、セラミックスにクラックが生じ易かった。これ
に対して、本実施例の積層コンデンサ1では、空孔面積
比が30%以下とされているので、NiまたはNiのよ
うな卑金属を内部電極材料として用いた場合であって
も、セラミック焼結体におけるクラックの発生を抑制し
得る。従って、NiまたはNi合金を好適に用い得る。However, as described above, conventionally, when a base metal such as Ni or a Ni alloy is used as an internal electrode material, cracks are easily generated in ceramics. On the other hand, in the multilayer capacitor 1 of the present embodiment, the void area ratio is set to 30% or less, so that even if Ni or a base metal such as Ni is used as the internal electrode material, the ceramic firing is performed. The generation of cracks in the consolidated body can be suppressed. Therefore, Ni or a Ni alloy can be suitably used.
【0024】次に、具体的な実験例につき説明する。 (実施例1)先ず、チタン酸バリウム系セラミック粉末
を主体とするセラミックスラリーを用意した。次に、上
記セラミックスラリーをドクターブレード法により成形
し、厚み11μmの矩形のセラミックグリーンシートを
得た。Next, specific experimental examples will be described. (Example 1) First, a ceramic slurry mainly composed of barium titanate-based ceramic powder was prepared. Next, the ceramic slurry was formed by a doctor blade method to obtain a rectangular ceramic green sheet having a thickness of 11 μm.
【0025】上記セラミックグリーンシートの片面に、
内部電極を構成するために、Niを主体とする導電ペー
ストをスクリーン印刷した。しかる後、導電ペーストが
印刷された複数枚のセラミックグリーンシートを、導電
ペーストが引き出されている側が交互に反対の側となる
ように積層し、さらに上下に無地のセラミックグリーン
シートを適宜の枚数積層し、積層体を得た。On one side of the ceramic green sheet,
In order to form the internal electrodes, a conductive paste mainly composed of Ni was screen-printed. Thereafter, a plurality of ceramic green sheets on which the conductive paste is printed are stacked such that the side from which the conductive paste is drawn is alternately opposite, and an appropriate number of plain ceramic green sheets are stacked on top and bottom. Thus, a laminate was obtained.
【0026】上記積層体を、窒素雰囲気中にて、350
℃の温度に加熱し、バインダーを燃焼させた後、H2 、
N2 及びH2 O混合ガスからなる還元性雰囲気中におい
て焼成し、セラミック焼結体を得た。なお、焼成は、1
300℃の温度に2時間保持することにより行った。ま
た、昇温速度及び冷却速度はいずれも200℃/hとし
た。The above laminated body is placed in a nitrogen atmosphere at 350
After heating to a temperature of 0 ° C. and burning the binder, H 2 ,
It was fired in a reducing atmosphere consisting of a mixed gas of N 2 and H 2 O to obtain a ceramic sintered body. In addition, firing is 1
This was performed by maintaining the temperature at 300 ° C. for 2 hours. Further, the temperature raising rate and the cooling rate were both 200 ° C./h.
【0027】上記のようにして得られたセラミック焼結
体を、水及び研磨剤と共にバレルポット内に投入し、湿
式バレル研磨を行い、内部電極をセラミック焼結体端面
に露出させた。しかる後、セラミック焼結体の両端面
に、Cuペーストを塗布し、窒素雰囲気中において60
0℃の温度で焼き付け、第1の外部電極層を形成した。The ceramic sintered body obtained as described above was put into a barrel pot together with water and an abrasive, and wet barrel polishing was performed to expose the internal electrodes to the end faces of the ceramic sintered body. Thereafter, a Cu paste is applied to both end surfaces of the ceramic sintered body, and the paste is applied in a nitrogen atmosphere.
Baking was performed at a temperature of 0 ° C. to form a first external electrode layer.
【0028】しかる後、第1の外部電極層上に、Niメ
ッキ膜及び半田メッキ膜をこの順序で積層した。上記の
ようにして、図1(a)に示した積層コンデンサ1を得
た。なお、得られた積層コンデンサ1の外形寸法は、幅
1.6mm×長さ3.2mm×厚さ1.2mmであり、
内部電極間のセラミック層の厚みは6μm、内部電極間
に挟まれたセラミック層の総数は150である。Thereafter, a Ni plating film and a solder plating film were laminated in this order on the first external electrode layer. As described above, the multilayer capacitor 1 shown in FIG. 1A was obtained. The external dimensions of the obtained multilayer capacitor 1 are 1.6 mm in width × 3.2 mm in length × 1.2 mm in thickness.
The thickness of the ceramic layer between the internal electrodes is 6 μm, and the total number of ceramic layers sandwiched between the internal electrodes is 150.
【0029】上記製造方法において、内部電極を構成す
るための導電ペーストのスクリーン印刷による塗布厚み
を、0.5、0.7、1.0及び1.5μmとすること
により、内部電極中の空孔の割合を変更し、試料番号1
〜4の各積層コンデンサ1を得た。すなわち、内部電極
を構成するための導電ペースト塗布厚みを、0.5、
0.7、1.0及び1.5μmとすることにより、上述
した空孔面積比が50%、30%、10%及び0%の4
種類の積層コンデンサを用意した。なお、上記空孔面積
比は、走査型電子顕微鏡を用い、湿式バレル研磨後にセ
ラミック焼結体端面を観察することにより求めた。In the above manufacturing method, the thickness of the conductive paste for forming the internal electrode by screen printing is set to 0.5, 0.7, 1.0, and 1.5 μm, so that the empty space in the internal electrode is reduced. Change the percentage of holes and change the sample number 1
To 4 were obtained. That is, the thickness of the conductive paste applied to form the internal electrodes is 0.5,
By setting the pore area ratio to 0.7, 1.0, and 1.5 μm, the above-mentioned hole area ratio of 50%, 30%, 10%, and 0%
Various types of multilayer capacitors were prepared. In addition, the said hole area ratio was calculated | required by observing the end face of a ceramic sintered compact after wet barrel polishing using a scanning electron microscope.
【0030】また、上記4種類のセラミック焼結体の外
表面に上記のようにして外部電極を形成し、積層コンデ
ンサを得た後に、各積層コンデンサにおけるクラックの
発生割合を評価した。結果を下記の表1に示す。External electrodes were formed on the outer surfaces of the four types of ceramic sintered bodies as described above, and after obtaining multilayer capacitors, the rate of occurrence of cracks in each multilayer capacitor was evaluated. The results are shown in Table 1 below.
【0031】[0031]
【表1】 [Table 1]
【0032】表1から明らかなように、試料番号1で
は、空孔面積比が50%であるため、多くの積層コンデ
ンサにおいてクラックが発生していたのに対し試料番号
2〜4の各積層コンデンサでは、空孔面積比が30%以
下であるため、クラックの発生数は著しく少なく、特に
空孔面積比が10%以下である試料番号3及び4の積層
コンデンサでは、クラックの発生がほとんど生じなかっ
た。As is clear from Table 1, the sample No. 1 had a void area ratio of 50%, and thus cracks occurred in many multilayer capacitors. Since the hole area ratio is 30% or less, the number of occurrences of cracks is extremely small. In particular, cracks hardly occur in the multilayer capacitors of Sample Nos. 3 and 4 in which the hole area ratio is 10% or less. Was.
【0033】なお、セラミック焼結体を得た後に湿式バ
レル研磨を行った後では、セラミック焼結体端面を観察
したとしても、上記空孔の多少を判断し難いため、湿式
バレル研磨前にセラミック焼結体端面を観察して、空孔
面積比を求めることが望ましい。また、このようにして
求められた空孔面積比が30%以下となるように、上述
したように内部電極を構成するための導電ペーストの塗
布厚みを調整すればよい。After the wet barrel polishing is performed after the ceramic sintered body is obtained, even if the end face of the ceramic sintered body is observed, it is difficult to determine the size of the above-mentioned pores. It is desirable to determine the hole area ratio by observing the end face of the sintered body. Further, the applied thickness of the conductive paste for forming the internal electrode may be adjusted as described above so that the hole area ratio obtained in this manner is 30% or less.
【0034】もっとも、導電ペーストの塗布厚みの調整
だけでなく、他の方法により内部電極露出部分における
空孔面積比を調整してもよい。例えば、後述の実施例2
のように、内部電極を構成する金属粒子の粒径を調整し
てもよく、あるいは内部電極を構成する導電ペーストの
セラミックグリーンシートに対する濡れ性、導電ペース
トの塗布密度等を調整してもよい。Of course, not only the adjustment of the thickness of the conductive paste applied but also the ratio of the void area in the exposed portion of the internal electrode may be adjusted by another method. For example, Example 2 described later
As described above, the particle size of the metal particles forming the internal electrode may be adjusted, or the wettability of the conductive paste forming the internal electrode to the ceramic green sheet, the application density of the conductive paste, and the like may be adjusted.
【0035】(実施例2)実施例1と同様にして、チタ
ン酸バリウム系セラミックスラリーを用い、セラミック
スラリーを調製した。このセラミックスラリーをドクタ
ーブレード法によりシート成形し、厚み11μmの矩形
のセラミックグリーンシートを得た。Example 2 In the same manner as in Example 1, a ceramic slurry was prepared using a barium titanate-based ceramic slurry. This ceramic slurry was formed into a sheet by a doctor blade method to obtain a rectangular ceramic green sheet having a thickness of 11 μm.
【0036】上記のようにして得たセラミックグリーン
シートの片面に、実施例1と同様にして、内部電極を構
成するためのNiを主体とする導電ペーストをスクリー
ン印刷した。On one side of the ceramic green sheet obtained as described above, a conductive paste mainly composed of Ni for forming an internal electrode was screen-printed in the same manner as in Example 1.
【0037】もっとも、この印刷に際し、最終的に空孔
面積比が50%、30%、10%及び0%となるよう
に、1.0μm、0.5μm、0.3μm及び0.1μ
mの4種類の粒径のNi粉末を用意し、各粒径のNi粉
末を用いて構成された導電ペーストを使用し、試料番号
5〜8の積層コンデンサを作製することとした。However, at the time of printing, 1.0 μm, 0.5 μm, 0.3 μm and 0.1 μm are used so that the hole area ratio is finally 50%, 30%, 10% and 0%.
Samples Nos. 5 to 8 were prepared by preparing Ni powders having four different particle sizes of m and using a conductive paste composed of the Ni powders having the respective particle sizes.
【0038】上記セラミックグリーンシートの片面に、
いずれかの導電ペーストをスクリーン印刷し、実施例1
と同様にして積層し、積層体を得た。また、この積層体
を、実施例1と同様にして焼成し、焼結体を得た。On one side of the ceramic green sheet,
Example 1 Screen printing of any conductive paste
Were laminated in the same manner as in the above to obtain a laminate. This laminate was fired in the same manner as in Example 1 to obtain a sintered body.
【0039】得られたセラミック焼結体について、10
00℃の大気中に0.5時間保持することにより再酸化
処理を行った。しかる後、セラミック焼結体を、水及び
研磨剤と共にバレルポットに投入し、バレル研磨を行
い、セラミック焼結体端面に内部電極を露出させた。With respect to the obtained ceramic sintered body, 10
The re-oxidation treatment was performed by holding in the atmosphere at 00 ° C. for 0.5 hour. Thereafter, the ceramic sintered body was put into a barrel pot together with water and an abrasive, and barrel polishing was performed to expose an internal electrode on the end face of the ceramic sintered body.
【0040】次に、セラミック焼結体の両端面に、実施
例1と同様にして外部電極を形成した。このようにし
て、幅1.6mm×長さ3.2mm×厚さ1.2mmで
あり、内部電極間のセラミック層の厚みが6μm、内部
電極間に挟まれたセラミック層の総数が150である種
類の積層コンデンサを得た。Next, external electrodes were formed on both end surfaces of the ceramic sintered body in the same manner as in Example 1. Thus, the width is 1.6 mm × the length 3.2 mm × the thickness 1.2 mm, the thickness of the ceramic layer between the internal electrodes is 6 μm, and the total number of ceramic layers sandwiched between the internal electrodes is 150. Various kinds of multilayer capacitors were obtained.
【0041】上記のようにして、Ni粉末の粒径が異な
る導電ペーストを用いた試料番号5〜8の各積層コンデ
ンサを得た。なお、試料番号5〜8の各積層コンデンサ
における空孔面積比は、セラミック焼結体を得た直後に
走査型電子顕微鏡により観察し、評価した。As described above, multilayer capacitors of Sample Nos. 5 to 8 using conductive pastes having different particle diameters of Ni powder were obtained. The void area ratio in each of the multilayer capacitors of Sample Nos. 5 to 8 was observed and evaluated by a scanning electron microscope immediately after obtaining the ceramic sintered body.
【0042】試料番号5〜8の各積層コンデンサにおい
て、外部電極形成後のクラック発生割合を実施例1と同
様にして評価した。結果を下記の表2に示す。In each of the multilayer capacitors of Sample Nos. 5 to 8, the rate of occurrence of cracks after forming the external electrodes was evaluated in the same manner as in Example 1. The results are shown in Table 2 below.
【0043】[0043]
【表2】 [Table 2]
【0044】表2から明らかなように、試料番号5で
は、空孔面積比が50%であるため、クラックの発生割
合が非常に高かったのに対し、試料番号6〜8では、空
孔面積比が30%以下であるため、クラックの発生が著
しく少なく、特に試料番号7,8では、空孔面積比が1
0%以下であるため、クラックの発生はほとんど認めら
れなかった。As is clear from Table 2, the sample 5 had a very high cracking rate because the hole area ratio was 50%, whereas the sample Nos. 6 to 8 had the hole area ratio of 50%. Since the ratio is 30% or less, the occurrence of cracks is extremely small.
Since the content was 0% or less, almost no cracks were observed.
【0045】なお、上記実施例1,2では、積層コンデ
ンサの製造方法を例にとり説明したが、本発明は、積層
バリスタなどの他の積層セラミック電子部品にも適用す
ることができる。In the first and second embodiments, the method for manufacturing a multilayer capacitor has been described as an example. However, the present invention can be applied to other multilayer ceramic electronic components such as a multilayer varistor.
【0046】[0046]
【発明の効果】本発明に係る積層セラミック電子部品で
は、内部電極のセラミック焼結体が表面に引き出されて
いる部分において、内部電極露出面積に占める空孔の割
合が30%以下とされているので、内部電極を導電ペー
ストの塗布・焼付により形成したり、あるいはプリント
回路基板実装時の半田の熱等が加わったとしても、セラ
ミック焼結体におけるクラックが生じ難い。従って、積
層セラミック電子部品の良品率を高めることができ、信
頼性に優れた積層セラミック電子部品を提供することが
可能となる。In the multilayer ceramic electronic component according to the present invention, the ratio of the porosity to the exposed area of the internal electrode in the portion where the ceramic sintered body of the internal electrode is drawn out to the surface is 30% or less. Therefore, even if the internal electrodes are formed by applying and baking a conductive paste, or even if the heat of solder at the time of mounting on a printed circuit board is applied, cracks are not easily generated in the ceramic sintered body. Therefore, the yield rate of the multilayer ceramic electronic component can be increased, and a multilayer ceramic electronic component having excellent reliability can be provided.
【0047】特に、上記空孔の割合が10%以下である
場合には、上記クラックの発生をより効果的に抑制する
ことができ、より一層信頼性に優れた積層セラミック電
子部品を提供することができる。In particular, when the proportion of the vacancies is 10% or less, it is possible to more effectively suppress the occurrence of the cracks and to provide a more reliable multilayer ceramic electronic component. Can be.
【0048】また、内部電極をNiまたはNi合金を用
いて構成した場合には、従来、クラックが生じ易かった
のに対し、本発明によれば、クラックの発生を効果的に
抑制することができるので、安価であり、かつ信頼性に
優れた積層セラミック電子部品を安定に提供することが
できる。When the internal electrodes are made of Ni or a Ni alloy, cracks have conventionally been liable to occur, but according to the present invention, cracks can be effectively suppressed. Therefore, a multilayer ceramic electronic component that is inexpensive and has excellent reliability can be stably provided.
【0049】本発明の積層セラミック電子部品の製造方
法では、最終的に内部電極露出面積に占める空孔の割合
が30%以下となるように、内部電極パターンが形成さ
れるので、外部電極形成時やプリント回路基板実装時に
クラックが生じ難い、本発明に係る積層セラミック電子
部品を安定に提供することができる。In the method for manufacturing a multilayer ceramic electronic component according to the present invention, the internal electrode pattern is formed so that the ratio of voids to the internal electrode exposed area is 30% or less. And a multilayer ceramic electronic component according to the present invention, in which cracks hardly occur during mounting on a printed circuit board, can be stably provided.
【0050】本発明に係る積層セラミック電子部品の製
造方法においても、内部電極としてNiまたはNi合金
を用いて構成した場合には、安価であるだけでなく、上
記のようにクラックが生じ難い信頼性に優れた積層セラ
ミック電子部品を提供することができる。In the method for manufacturing a multilayer ceramic electronic component according to the present invention, when Ni or a Ni alloy is used as the internal electrode, not only is it inexpensive, but also the reliability in which cracks are unlikely to occur as described above. It is possible to provide a multilayer ceramic electronic component having excellent characteristics.
【図1】(a)及び(b)は、本発明の一実施例に係る
積層コンデンサの縦断面図及び(a)に示した積層コン
デンサのセラミック焼結体端面を模式的に示す断面図。1A and 1B are a longitudinal sectional view of a multilayer capacitor according to an embodiment of the present invention and a sectional view schematically showing an end face of a ceramic sintered body of the multilayer capacitor shown in FIG.
【図2】図1に示した積層コンデンサの要部を拡大して
示す部分切欠断面図。FIG. 2 is a partially cutaway cross-sectional view showing an enlarged main part of the multilayer capacitor shown in FIG.
1…積層コンデンサ 2…セラミック焼結体 2a,2b…端面 3〜8…内部電極 9,10…外部電極 11…空孔 DESCRIPTION OF SYMBOLS 1 ... Multilayer capacitor 2 ... Ceramic sintered body 2a, 2b ... End surface 3-8 ... Internal electrode 9, 10 ... External electrode 11 ... Void
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E001 AB03 AC03 AC04 AC09 AD03 AE02 AE03 AF00 AF06 AH01 AH09 AJ01 5E082 AA01 AB03 BC33 BC38 BC40 EE04 EE23 EE35 EE42 FG06 FG26 FG27 FG52 FG54 GG10 GG11 GG26 GG28 JJ03 JJ05 JJ12 JJ21 JJ23 LL01 LL35 MM24 PP10 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 5E001 AB03 AC03 AC04 AC09 AD03 AE02 AE03 AF00 AF06 AH01 AH09 AJ01 5E082 AA01 AB03 BC33 BC38 BC40 EE04 EE23 EE35 EE42 FG06 FG26 FG27 FG52 FG54 GG10 GG11 GG11 GG23 LL35 MM24 PP10
Claims (5)
ク焼結体の外表面に引き出された複数の内部電極と、 前記セラミック焼結体の外表面に形成されており、いず
れかの内部電極に電気的に接続されている外部電極とを
備え、 前記内部電極のセラミック焼結体外表面に引き出されて
いる部分において、各内部電極露出面積に占める該内部
電極露出部分中の空孔の割合が30%以下とされている
ことを特徴とする、積層セラミック電子部品。1. A ceramic sintered body, a plurality of internal electrodes disposed in the ceramic sintered body, drawn out on an outer surface of the ceramic sintered body, and formed on an outer surface of the ceramic sintered body. And an external electrode electrically connected to any one of the internal electrodes, wherein the internal electrode occupies each internal electrode exposed area in a portion of the internal electrode that is drawn to the outer surface of the ceramic sintered body. A multilayer ceramic electronic component, characterized in that the proportion of holes in the exposed portion is 30% or less.
を特徴とする、請求項1に記載の積層セラミック電子部
品。2. The multilayer ceramic electronic component according to claim 1, wherein the proportion of the holes is 10% or less.
いて構成されていることを特徴とする、請求項1または
2に記載の積層セラミック電子部品。3. The multilayer ceramic electronic component according to claim 1, wherein the internal electrode is made of Ni or a Ni alloy.
ターンがセラミック層を介して積層されている構造を有
する積層セラミック電子部品単位の積層体を得る工程
と、 前記積層体を焼成してセラミック焼結体を得る焼成工程
と、 前記セラミック焼結体をバレル研磨するバレル研磨工程
と、 バレル研磨されたセラミック焼結体の外表面に外部電極
を形成する外部電極形成工程とを備え、 焼成後に焼結体外表面における内部電極の露出面積に占
める該内部電極露出部分中の空孔の割合が30%以下と
なるように、前記積層体を得る工程において、導電ペー
ストからなる内部電極パターンを形成することを特徴と
する、積層セラミック電子部品の製造方法。4. A step of obtaining a multilayer ceramic electronic component unit having a structure in which a plurality of internal electrode patterns made of a conductive paste are laminated via a ceramic layer, and firing the multilayer body to perform ceramic sintering. A firing step of obtaining a body, a barrel polishing step of barrel polishing the ceramic sintered body, and an external electrode forming step of forming an external electrode on an outer surface of the barrel polished ceramic sintered body, and sintering after firing. In the step of obtaining the laminate, an internal electrode pattern made of a conductive paste is formed such that a ratio of voids in the exposed portion of the internal electrode to an exposed area of the internal electrode on the external surface of the body becomes 30% or less. A method for manufacturing a multilayer ceramic electronic component, which is characterized by the following.
含む、請求項4に記載の積層セラミック電子部品の製造
方法。5. The method according to claim 4, wherein the internal electrode contains Ni or a Ni alloy.
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|---|---|---|---|
| JP11222620A JP2001052950A (en) | 1999-08-05 | 1999-08-05 | Laminated ceramic electronic part and manufacture thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11222620A JP2001052950A (en) | 1999-08-05 | 1999-08-05 | Laminated ceramic electronic part and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001052950A true JP2001052950A (en) | 2001-02-23 |
Family
ID=16785316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11222620A Pending JP2001052950A (en) | 1999-08-05 | 1999-08-05 | Laminated ceramic electronic part and manufacture thereof |
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| Country | Link |
|---|---|
| JP (1) | JP2001052950A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006126562A1 (en) * | 2005-05-26 | 2006-11-30 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
| KR101141417B1 (en) * | 2010-11-22 | 2012-05-03 | 삼성전기주식회사 | Multilayer ceramic capacitor and method for manufactuaring the same |
| JP2014170911A (en) * | 2013-02-28 | 2014-09-18 | Samsung Electro-Mechanics Co Ltd | Multilayer ceramic electronic component and method of manufacturing the same |
| JP2021022723A (en) * | 2019-07-29 | 2021-02-18 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer electronic component |
| CN115483029A (en) * | 2021-06-16 | 2022-12-16 | 株式会社村田制作所 | Laminated ceramic electronic component |
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Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006126562A1 (en) * | 2005-05-26 | 2006-11-30 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
| US7466538B2 (en) | 2005-05-26 | 2008-12-16 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic device |
| KR100908984B1 (en) | 2005-05-26 | 2009-07-22 | 가부시키가이샤 무라타 세이사쿠쇼 | Laminated Ceramic Electronic Components |
| KR101141417B1 (en) * | 2010-11-22 | 2012-05-03 | 삼성전기주식회사 | Multilayer ceramic capacitor and method for manufactuaring the same |
| US8456799B2 (en) | 2010-11-22 | 2013-06-04 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic capacitor and method of manufacturing the same |
| JP2014170911A (en) * | 2013-02-28 | 2014-09-18 | Samsung Electro-Mechanics Co Ltd | Multilayer ceramic electronic component and method of manufacturing the same |
| JP2021022723A (en) * | 2019-07-29 | 2021-02-18 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer electronic component |
| US11037727B2 (en) | 2019-07-29 | 2021-06-15 | Samsung Electro-Mechanics Co., Ltd. | Multilayer electronic component |
| JP2021168413A (en) * | 2019-07-29 | 2021-10-21 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Laminated electronic components |
| US11450481B2 (en) | 2019-07-29 | 2022-09-20 | Samsung Electro-Mechanics Co., Ltd. | Multilayer electronic component |
| US11682521B2 (en) | 2019-07-29 | 2023-06-20 | Samsung Electro-Mechanics Co., Ltd. | Multilayer electronic component |
| US12009150B2 (en) | 2019-07-29 | 2024-06-11 | Samsung Electro-Mechanics Co., Ltd. | Multilayer electronic component |
| CN115483029A (en) * | 2021-06-16 | 2022-12-16 | 株式会社村田制作所 | Laminated ceramic electronic component |
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