JP2000332060A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device using a flip-chip mounting method, in which a defective soldering does not occur even when a flexible printed wiring board is used as a wiring board and connection with good yield is possible. It is an object of the present invention to realize a manufacturing method. SOLUTION: A step of forming a solder bump 8 on an electrode pad 7 of a semiconductor chip 6, a step of applying a flux 3 on a land 2 of a wiring board 1, and a step of applying a solder bump 8 to the land 2 using a bonding tool 5. A step of contacting the solder bumps 8 with the lands 2 to heat and activate the flux 3, a step of temporarily separating the solder bumps 8 and the lands 2 by a predetermined distance A, and a step of heating the solder bumps 8. Melting step and the molten solder bump 8
And contacting the land with the land to perform soldering.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device and a method of manufacturing the same which are compatible with high speed, high pin count, small size, and high density mounting.

[0002]

2. Description of the Related Art In order to further reduce the size of electronic devices, it is important to improve the component mounting density. As for semiconductor ICs, as a substitute for the conventional package mounting, development of a high-density mounting technology using a flip chip has been actively performed in the bare chip mounting. Flip chip mounting, which is one form of bare chip mounting, is a method of mounting a bare chip directly on a wiring substrate using solder bumps formed on electrode pads of a semiconductor chip. According to this method,
Since the solder bumps can be arranged not only on the periphery of the chip but also on any plane position of the chip, hundreds to 10,000 I
The number of / O can be easily provided on the chip.

FIGS. 5 and 6 are explanatory views showing a conventional flip-chip mounting process. 5 and 6, reference numeral 1 denotes a wiring board, reference numeral 2 denotes a land on the wiring substrate 1, reference numeral 3 denotes a flux, reference numeral 6 denotes a semiconductor chip, reference numeral 7 denotes an electrode pad, reference numeral 8 denotes a solder bump, and reference numeral 9 denotes a solder. Reference numeral 5 in FIG. 6 denotes a bonding tool.

In the method of FIG. 5, first, a flux 3 is applied to the land 2 of the wiring board 1 (FIG. 5A), and a solder bump 8 is formed on the land 2. This solder bump 8
After alignment, the semiconductor chip 6 on which is formed is mounted (FIG. 5B), and connection is made by high-temperature heating by reflow (FIG. 5C). On the other hand, in the method of FIG.
The flux 3 is applied to the land 2 portion of the wiring board 1 (FIG. 6A), and the solder bump 8 is formed on the land 2.
The semiconductor chip 6 on which the solder bumps 8 are formed is aligned by the bonding tool 5 (FIG. 6B), and the solder of the solder bumps 8 is melted by a heater (not shown) built in the bonding tool 5. Then, solder connection is made (FIG. 6C).

[0005] In the above-described conventional flip-chip mounting method, it is difficult to perform reflow connection when a flexible wiring board is used as the wiring board. This is because the flexible wiring board undulates during the reflow heating, and the distance between the solder bump and the land differs for each bump. This is shown in FIG. In FIG.
1 is a flexible wiring board, 2 is a land on the wiring board 1, 6 is a semiconductor chip, 7 is an electrode pad, 8 is a solder bump, 9A and 9B are defective solder joints. is there.

Since the wiring board 1 is thus wavy, defective solder joints are generated in some portions, where the solder bumps 8 are crushed and a bridge is generated between the lands 2 as shown in FIG. 9A. In a certain part, 9 in FIG.
As shown in B, a defective soldered joint which is open due to the increase in the distance between the wiring board 1 and the semiconductor chip 6 occurs. On the other hand, in the case of connection using a bonding tool of a flip chip bonder, such a problem of waving can be solved by vacuum suction of a flexible substrate.

However, as the pitch of the electrode pads of the semiconductor chip becomes finer, the gap between the solder bumps becomes smaller, so that a short circuit between the molten solder bumps tends to occur. This is shown in FIG. In FIG. 8, reference numeral 1 denotes a flexible wiring board, reference numeral 2 denotes a land on the wiring board 1, reference numeral 6 denotes a semiconductor chip, reference numeral 7 denotes an electrode pad, reference numeral 8 denotes a solder bump, and reference numeral 9A denotes a defect in which a bridge has occurred. This is a solder joint. A similar phenomenon occurs when an under bump metal (UBM) using electroless plating is used for the electrode pad. This is shown in FIG. In FIG. 9, reference numeral 6 denotes a semiconductor chip, reference numeral 7 denotes an electrode pad, reference numeral 8 denotes a solder bump, reference numeral 13 denotes a passivation film, and reference numeral 14 denotes a bump base metal (UBM).

Since the electroless plating grows isotropically, the electroless plating also grows between the electrode pads 7 (FIG. 9).
(A)). Therefore, the gap between the electrodes becomes narrower than that of the original electrode pad 7 itself, and when the solder bump 8 is formed on the UBM 14, the gap between the solder bumps 8 also becomes narrow (FIG. 9B). ).

FIG. 10 shows a process diagram of the formation of the solder bump 8 when the electroless plating UBM is not used. FIG.
Reference numeral 6 denotes a semiconductor chip, reference numeral 7 denotes an electrode pad, reference numeral 8 denotes a solder bump, reference numeral 13 denotes a passivation film, reference numeral 14 denotes an under bump metal (UBM), and reference numeral 15 denotes a second passivation film.

FIG. 10A shows a portion of the electrode pad 7 of the semiconductor chip 6. The pitch of the electrode pads 7 is shown in FIG.
Is the same as FIG. 10B shows a state in which the second passivation film 15 is formed in order to reduce the opening area of the electrode pad 7. FIG. 10C shows a state in which the UBM 14 is formed of a metal to which the solder wets in the opening of the second passivation film 17. FIG. 10D shows the result of forming the solder bumps 8 on the UMB 14. The height of the solder bumps 8 is the same as that shown in FIG. The gap between the solder bumps 8 is narrower in FIG. 9 than in FIG. 10, and it can be seen that a bridge is more likely to occur in the case of electroless plating.

Further, conventionally, for the purpose of improving the connection reliability of the solder bumps, a process has been proposed in which the solder bumps are pulled up after melting. Even in such a case, when the electrode pad pitch becomes fine, there is a possibility that a bridge may already be generated when the solder is melted.

[0012]

As described above, in the conventional method, there is a problem that the flexible wiring board is wavy due to heat and the like, and the flexible wiring board is flipped at a fine electrode pad pitch. There were many problems in performing chip soldering with good yield. In addition, when a bonding tool is used, such a problem of waving can be solved. However, when an electrode pad is formed of a bump base metal formed by electroless plating, there is a problem that a bridge is easily generated between contacts. The present invention solves this problem by a relatively simple method, and uses a flip-chip mounting method that does not cause defective soldering even when a flexible wiring board is used and that can be connected at a yield. It is an object to realize a method of manufacturing a semiconductor device and a semiconductor device manufactured by such a method.

[0013]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention uses a metal brazing material for an electrode pad provided on one surface of a semiconductor chip having a built-in integrated circuit. Forming a protruding electrode, and using the protruding electrode to braze the electrode pad and a land on a wiring board aligned with the electrode pad, wherein the protruding electrode is formed on the electrode pad. A step of forming a projecting electrode, a flux applying step of applying a flux on the land, and adsorbing the semiconductor chip on which the projecting electrode is formed to a bonding tool of a flip-chip connecting device, to form the projecting electrode and the land. An alignment step of aligning, lowering the bonding tool, and bringing the protruding electrode into contact with the flux on the land. A step catalyst, and a flux activating step of activating said flux by heating the bonding tool, the bonding tool is raised a predetermined distance,
A separating step of separating the land and the protruding electrode that are in contact with each other; a melting step of heating the bonding tool to melt the protruding electrode; and lowering the bonding tool to lower the fused protruding electrode and the land. And a brazing step of performing brazing by contacting.

Further, in the semiconductor device according to the present invention, a protruding electrode using a metal brazing material is formed on an electrode pad provided on one surface of a semiconductor chip having a built-in integrated circuit. In a semiconductor device formed by brazing an electrode pad and a land on a wiring board aligned with the electrode pad, a protruding electrode forming step of forming a protruding electrode on the electrode pad; A flux applying step of applying a solder chip, a positioning step of causing the semiconductor chip on which the protruding electrodes are formed to be attracted to a bonding tool of a flip chip connection device, and positioning the protruding electrodes and the lands, and lowering the bonding tool. And contacting the projecting electrode and the flux on the land, and heating the bonding tool A flux activating step of activating the flux, the bonding tool is raised by a predetermined distance, a separation step of separating the land and the projecting electrode that are in contact with each other, and heating the bonding tool to cause the projecting electrode to It is characterized by being formed through a melting step of melting and a brazing step of lowering the bonding tool and bringing the melted projecting electrode into contact with the land to perform brazing.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The manufacturing method of the present invention is suitable for connecting a semiconductor chip to a flexible wiring board by a flip chip connection method using solder bumps.
Conventionally, when performing flip chip connection by heating the bonding tool of the flip chip bonder, the semiconductor chip is heated while the solder bump formed on the semiconductor chip is in contact with the land of the wiring board, and the solder bump is melted. Soldering was performed. However, in this method, when the electrode pad pitch becomes finer, when the solder bump is melted, there is a high possibility that a bridge occurs between the solder bump and an adjacent solder bump. Therefore, the operation of heating the semiconductor chip and melting the solder bumps is performed in a state where the solder bumps and the lands of the wiring board are not in contact with each other. After that, the bonding tool is pushed down to connect the melted solder and the land of the wiring board.
As a result, no bridge is generated, and it is possible to prevent the connection from being opened, so that good soldering connection can be performed. Further, instead of mechanically pushing down the bonding tool, it is also possible to use the thermal expansion caused by the temperature rise of the bonding tool and eventually lower the semiconductor chip to perform soldering.

Hereinafter, a semiconductor device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings. 1 and 2 show a process of an embodiment of a method for manufacturing a semiconductor device according to the present invention.

In the manufacturing method according to this embodiment, first, the flux 3 is applied to the land 2 of the wiring board 1. As a method of applying the flux, for example, a metal screen or a mesh screen (not shown) can be used (FIG. 1A). Further, since the wiring board 1 has flexibility, the wiring board 1 is vacuum-sucked on a suction plate 4 having a smooth surface to avoid waving due to heating.

Next, the semiconductor chip 6 is vacuum-sucked by the bonding tool 5 of the flip chip bonder,
The solder bumps 8 formed on the electrode pads 7 of the semiconductor chip 6 are aligned with each other (FIG. 1B). Although not shown, a U space is provided between the electrode pad 7 and the solder bump 8.
BM is formed. Next, the bonding tool 5 is lowered until the electrode pad 7 contacts the land 2 (FIG. 1C).

Next, a heater (not shown) built in the bonding tool 5 is energized to raise the temperature of the bonding tool 5, thereby heating the semiconductor chip 6. This heating is performed to activate the flux 3 applied on the land 2 so that the soldering to be performed later is favorably performed. Next, the bonding tool 5 is raised by a predetermined amount A (FIG. 2).
(A)). Next, with the bonding tool 5 pulled up, the bonding tool 5 is further heated by a built-in heater to raise the temperature to a temperature at which the solder melts.

Next, the bonding tool 5 is lowered while the solder bump 8 is in a molten state, that is, while the heater built in the bonding tool 5 is energized. When the bonding tool 5 is lowered, the molten solder bump 8 comes into contact with the flux 3 on the land 2 (FIG. 2B). Then, since the flux 3 is activated, the melted solder bump 8 immediately spreads on the land 2 (FIG. 2C). Subsequently, the temperature of the bonding tool is increased, and the lands 2 and the solder bumps 8 are brought into contact with each other so that sufficient connection strength is obtained, thereby forming the solder joints 9.

Specifically, the temperature of the bonding tool and the semiconductor chip is set to, for example, 15 when the flux is activated.
The temperature is set to 0 ° C., for example, 230 ° C. when melting the solder ball and when soldering. Further, for example, the pitch of the land of the wiring board 1 and the pitch of the electrode pads 7 of the semiconductor chip 6 are 150 μm, the material of the solder ball 8 is eutectic solder made of, for example, tin and lead, the height of the solder ball 8 is 70 μm, The quantity A is 20 μm. Further, a polyimide film is used as the flexible wiring board 1. When electroless plating is used for the UMB 14, electroless Ni is formed to 5 μm and flash Au plating is formed to 0.05 μm. By performing the above process, the electrode pad pitch is fine on the flexible wiring board.
The semiconductor chip with solder bumps can be easily flip-chip mounted.

Another embodiment of the present invention will be described. In the above-described embodiment, after the bonding tool 5 is pulled up by the lifting amount A in FIG.
Is heated by a built-in heater, and then the bonding tool 5 is lowered. In this embodiment, a process for performing bonding without mechanically lowering the bonding tool will be described.

FIG. 3 shows a bonding tool used in this embodiment. A bonding tool heater section 10 in which a heater for heating the bonding tool 5 is embedded, and a bonding tool expansion section 11 provided in front of the bonding tool heater section 10 are provided at the tip end (on the side where the semiconductor chip is sucked) of the bonding tool 5. And are provided. A through hole 12 is provided at the center of the bonding tool 5,
Through this through hole 12, a semiconductor chip can be vacuum-sucked using a vacuum pump (not shown).

The bonding tool heater section 10 is made of ceramics and has a relatively small coefficient of thermal expansion. on the other hand,
The bonding tool expansion part 11 is made of, for example, metal and has a large thermal expansion coefficient. For this reason, when the bonding tool heater section 10 is heated, the temperature of the bonding tool expansion section 11 also increases, and the bonding tool expansion section 11 has a larger thermal expansion coefficient than that of the bonding tool heater section 10. Will grow as a whole.

The material of the expansion portion 11 of the bonding tool is, for example, gold, and its thermal expansion coefficient is about 15 ppm / ° C.
The thickness of the bonding tool expansion section 10 is, for example, 8 mm,
Assuming that the temperature for activating the flux is 150 ° C. and the temperature for flip-chip mounting is 230 ° C., by raising the temperature from the flux activation temperature to the solder melting temperature,
The expansion portion of the bonding tool expands by about 10 μm. Therefore, if the lifting amount of the bonding tool 5 in FIG. 2A is 10 μm, the solder bumps 8 of the semiconductor chip 6 can be connected to the lands 2 only by raising the temperature of the bonding tool 5. Therefore, there is no need to lower the bonding tool as shown in FIG. 2B, and the process can be simplified.
Furthermore, since it is not necessary to control the amount of descent by the apparatus, the process can be stabilized.

In the above embodiment, the case where the eutectic solder of tin and lead is used for the solder bump 8 has been described, but it goes without saying that other solders can be used in the same manner. Furthermore, although polyimide has been described as an example of a flexible wiring board, other materials may be used.

Although the method of manufacturing a semiconductor device according to the present invention has been described above, a semiconductor device manufactured using this manufacturing method is also an object of the present invention. In addition,
Although the present invention has been described with respect to the soldering connection to a flexible wiring board, as shown in FIG. 4, the flip chip connection portion is resin-sealed with a sealing resin 19, and the semiconductor chip of the wiring board is An external electrode land 17 is provided on the side opposite to the mounting surface, and a solder ball 18 for an external electrode is mounted, whereby a BGA (Ball Grid Array) CS
It can be used as a semiconductor device of P (Chip Size Package) 16.

[0028]

As described above, according to the first aspect of the present invention, a projection electrode using a metal brazing material is formed on an electrode pad provided on one surface of a semiconductor chip having a built-in integrated circuit. In a method of manufacturing a semiconductor device in which an electrode pad and a land on a wiring substrate aligned with the electrode pad are brazed using the bump electrode, a bump electrode forming step of forming a bump electrode on the electrode pad; A flux application step of applying a flux to the semiconductor chip having the protruding electrodes formed thereon, and a bonding tool of a flip chip connection device, and a positioning step of positioning the protruding electrodes and the lands, and lowering the bonding tool. A contact step of bringing the projecting electrode into contact with the flux on the land, and a flux that heats the bonding tool to activate the flux The bonding tool is raised by a predetermined distance, a separation step of separating the land and the protruding electrode that are in contact with each other, a heating step of melting the protruding electrode by heating the bonding tool, and lowering the bonding tool. A brazing step of performing brazing by bringing the molten protruding electrode into contact with the land.
As a result, flip chip soldering using solder bumps of a semiconductor chip having a fine electrode pad pitch can be performed with good yield without generating defective soldering such as a bridge or an open.

According to a second aspect of the present invention, a flexible printed wiring board is used as a wiring board. In this way, even when a flexible wiring board is used, no defective soldering such as bridge or open occurs, and flip-chip soldering using solder bumps of a semiconductor chip having a fine electrode pad pitch is used. Can be implemented with good yield.

A third aspect of the present invention is characterized in that a solder bump formed of eutectic solder of tin and lead is used as the protruding electrode. This makes it possible to carry out flip chip soldering using solder bumps of a semiconductor chip at a relatively low temperature with a relatively high yield using a relatively available brazing material.

A fourth aspect of the present invention is characterized in that the lowering of the bonding tool in the brazing step is performed by using the thermal expansion of the bonding tool itself. This eliminates the need to lower the bonding tool,
Since there is no need to control the amount of descent with the device,
The process can be simplified and stabilized.

A fifth aspect of the present invention is characterized in that a step of providing an external electrode on the other surface of the semiconductor chip to form a chip size package is provided. As a result, a manufacturing method for easily realizing a multifunctional, high-package-density chip-size package semiconductor device can be obtained.

According to the sixth aspect of the present invention, the first aspect is provided.
Characterized by being manufactured using the method for manufacturing a semiconductor device according to (1). As a result, flip-chip soldering using solder bumps of semiconductor chips with fine electrode pad pitch can be realized with good yield without generating defective soldering such as bridges and open circuits, and a large number of relatively small packages can be mounted. It is possible to easily realize a multifunctional, high-package-density semiconductor device capable of obtaining input / output.

According to a seventh aspect of the present invention, the wiring substrate is a flexible printed wiring board.
As a result, even when a flexible wiring board is used, flip-chip soldering using solder bumps of a semiconductor chip having a fine electrode pad pitch can be realized with a good yield, and a large number of packaged packages can be formed from a relatively small package. A multifunctional, high-package-density semiconductor device capable of obtaining an output can be realized efficiently and easily.

The invention according to claim 8 of the present invention is characterized in that the protruding electrode is a solder bump formed of a eutectic solder of tin and lead. This makes it possible to carry out flip-chip soldering using solder bumps of a semiconductor chip at a relatively low temperature with a relatively high yield using a relatively available brazing material, thereby realizing a semiconductor device at low cost.

A ninth aspect of the present invention is characterized in that the lowering of the bonding tool in the brazing step is performed by using the thermal expansion of the bonding tool itself. This eliminates the need to lower the bonding tool, and further eliminates the need to control the amount of descent by the device, thereby simplifying and stabilizing the process, reducing the number of steps, and making the semiconductor device more efficient at lower cost. Can be realized.

A tenth aspect of the present invention is characterized in that the semiconductor chip has external electrodes on the other side to constitute a chip size package. As a result, a multifunctional, high-package density chip size package semiconductor device can be easily realized.

[Brief description of the drawings]

FIG. 1 is a process chart of one embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a process diagram of one embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 3 is a sectional view of a bonding tool used in a manufacturing process of the semiconductor device of the present invention.

FIG. 4 is a sectional view showing a chip size package according to another embodiment of the present invention.

FIG. 5 is a diagram showing a conventional flip chip mounting process.

FIG. 6 is a diagram showing a conventional flip chip mounting process.

FIG. 7 is an explanatory diagram of a case where flip-chip mounting is performed by heliflow heating of a flexible substrate.

FIG. 8 is a view showing a mounting failure in a conventional flip chip mounting process.

FIG. 9 is a view showing a solder bump forming step using an electroless plating method.

FIG. 10 is a view showing a solder bump forming step according to a conventional method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Wiring board, 2 ... Land, 3 ... Flux, 4 ... Suction plate, 5 ... Bonding tool, 6 ... Semiconductor chip, 7 ... Electrode pad, 8 ... Solder bump, 9 ... Solder joint, 10 ... Bonding tool heater Part, 11
... Expansion part of bonding tool, 12 ... Through hole, 13 ... Passivation film, 14 ... Bump base metal, 15 ... Second passivation film, 16 ... Chip size package,
17: external electrode, 18: solder ball for external electrode, 19
... sealing resin

Claims (10)

[Claims] 1. A protruding electrode using a metal brazing material is formed on an electrode pad provided on one surface of a semiconductor chip having a built-in integrated circuit, and the protruding electrode is used to position the protruding electrode on the electrode pad and the electrode pad. In a method of manufacturing a semiconductor device for brazing a land on a combined wiring substrate, a projecting electrode forming step of forming a projecting electrode on the electrode pad; a flux applying step of applying a flux on the land; A step of causing the semiconductor chip on which the protruding electrodes are formed to be attracted to a bonding tool of a flip-chip connecting device, and positioning the protruding electrodes and the lands; A contact step of bringing the flux into contact with a flux of the flux, and a flux for heating the bonding tool to activate the flux. A step of activating the bonding tool, raising the bonding tool by a predetermined distance, separating the land and the protruding electrode in contact with each other, and heating the bonding tool to melt the protruding electrode. A brazing step of lowering the bonding tool and bringing the molten protruding electrode into contact with the land to perform brazing. 2. The method according to claim 1, wherein a flexible printed wiring board is used as the wiring board. 3. The method according to claim 1, wherein a solder bump formed of a eutectic solder of tin and lead is used as the protruding electrode. 4. The method according to claim 1, wherein the lowering of the bonding tool in the brazing step is performed using thermal expansion of the bonding tool itself. 5. The method according to claim 1, further comprising the step of providing an external electrode on the other surface of the semiconductor chip to form a chip size package. 6. A semiconductor device manufactured by using the method of manufacturing a semiconductor device according to claim 1. 7. The semiconductor device according to claim 6, wherein the wiring board is a flexible printed wiring board. 8. The bump according to claim 6, wherein the protruding electrode is a solder bump formed of a eutectic solder of tin and lead.
3. The semiconductor device according to claim 1. 9. The semiconductor device according to claim 6, wherein the lowering of the bonding tool in the brazing step is performed using thermal expansion of the bonding tool itself. 10. The semiconductor device according to claim 6, wherein the semiconductor chip has external electrodes on the other side, and finally constitutes a chip size package.