JP2000324450A - Video data reproduction method, video data reproduction device, and video transmission system - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To display a multi-screen easily and inexpensively. A memory controller 142 temporarily stores video data DS of a desired video material in a memory unit 143.
The written video data for one display screen is divided into a plurality of areas. The video data is read out in a predetermined order for each area, and video data is generated by performing an interpolation process using the read video data. The read image data and the generated image data are used as output memories 144-1 to 144-1 corresponding to the areas.
The data is written into the data 44-4 and the video data for one display screen is stored. The video data is read from each output memory 144 to generate video data DV-1 to DV-4 for one display image.
The generated video data DV-1 to DV-4 are converted to a video conversion output unit 1
The video signals are supplied to video output devices 25-1 to 25-4 as video signals SV-1 to SV-4. Images of desired video material can be displayed on multiple screens by the video output devices 25-1 to 25-4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a video data reproducing method, a video data reproducing apparatus, and a video transmission system. More specifically, the video data is read and written in the first memory unit, the video data for one display image written in the first memory means is divided into a plurality of areas, and a plurality of second data corresponding to the areas is provided. A memory means is provided, and the second memory means is provided with video data read out from a corresponding area of the first memory means in a predetermined order and a video generated by performing an interpolation process using the read video data. By writing the data, the video data for one display image is stored, the video data is read from the second memory means, and a plurality of video output devices display a divided image based on the video data for each area. Thus, one image of a video material is displayed on a plurality of video output devices to perform multi-screen display.

[0002]

2. Description of the Related Art Conventionally, there has been provided a video transmission system capable of displaying one image on a multi-screen by dividing one image into a plurality of images and displaying a divided image on each of a plurality of video output devices. ing. In this video transmission system, for example, a video tape recorder or the like is time-managed, and 1
By processing one video signal by a video processor or the like, a video signal for each divided image is generated from one video signal. The multi-screen display is performed by supplying the video signal of the divided image to the corresponding video output device of the plurality of video output devices arranged according to the screen division.

In recent years, video servers using a non-linearly accessible recording medium such as a hard disk have been used in place of a video tape recorder or the like.

[0004] The video server uses a data recording / reproducing device including a plurality of hard disk devices capable of storing video / audio data and performing parallel processing, thereby achieving a higher data transfer rate and a larger capacity. Furthermore, an attempt has been made to record parity data so that reliability can be ensured even if any hard disk device fails. From this, multiple voices
VOD (video on demand) and NVOD (near video on) can be achieved by recording material consisting of video data in a distributed manner and simultaneously transmitting multiple channels or reproducing the same material on multiple channels with a different playback time. It is possible to cope with various usage forms, for example, by constructing a system such as demand).

[0005] In the video server, simultaneous recording / reproduction of a plurality of channels is realized by recording and reproducing data in a time-division manner in the assigned time slot. For example, when one channel is used for data recording and four channels are used for data reproduction, one period, for example, one second is divided into five time slots "T1" to "T1".
5, data of one channel is recorded during the time slot "T1", and data is read out during the time slot "T2" to reproduce and output the data of one channel. Furthermore, time slots "T3" to "T5"
In the same period, the process of reproducing and outputting data in each time slot is performed, so that the recording of data of one channel and the reproduction of data of four channels can be simultaneously processed.

In such a video server, an arbitrary video can be transmitted to an arbitrary channel at an arbitrary timing in response to a transmission request.

[0007]

By the way, the image based on one video signal Va output from the video server 50 is transmitted to, for example, four video output devices 60-1 to 60-4 as shown in FIG. When multi-screen display is performed using the double scan converter 70 and the video processor 75, the video signals Vb-1 to Vb-1 to V
Reconstruction of b-4 is performed. However, the use of the double scan converter 70 and the video processor 75 in this way increases the cost.

In view of the above, the present invention provides a video data reproducing method, a video data reproducing apparatus, and a video transmission system which are inexpensive and can easily perform multi-screen display.

[0009]

In a video data reproducing method according to the present invention, video data is written to a first memory means, and a plurality of video data for one display image written to the first memory means are written. And a plurality of second memory means are provided corresponding to the areas. The second memory means includes video data read out from a corresponding area of the first memory means in a predetermined order. By writing video data generated by performing interpolation processing using read video data, storing video data for one display image, and reading and outputting video data from each of the second memory means. It is.

[0010] The video data reproducing apparatus further comprises a first and a plurality of second memory means for temporarily storing video data;
Memory control means for controlling writing and reading of video data to and from the first and the plurality of second memory means, and generating video data by performing interpolation processing using the read video data; The means writes the video data into the first memory means, divides the written video data for one display screen into a plurality of areas, and reads the video data read out in a predetermined order for each area and the video generated by the interpolation processing. By writing data to the second memory means corresponding to the area, the video data for one display image is stored in each of the second memory means, and the video data is read out and output from each of the second memory units. Is what you do.

Further, the video transmission system records video data of a video material on a recording medium, and controls a data recording / reproducing apparatus for reproducing the video data recorded on the recording medium and an operation of the data recording / reproducing apparatus. A control device;
A video output device for displaying an image based on the video data reproduced by the data recording / reproducing device, wherein the control device controls the data recording / reproducing device, reads out the video data of the video material according to the request, and responds to the request. What is claimed is: 1. A video transmission system for displaying a video material on a video output device, wherein the data recording / reproducing device includes first and plural second memory units for temporarily storing video data, and first and plural second memory units. And memory control means for controlling writing and reading of video data to and generating video data by performing interpolation processing using the read video data, wherein the memory control means reads out the video data from the recording medium. While writing the video data to the first memory means,
The written video data for one display screen is divided into a plurality of areas, and video data read out in a predetermined order for each area and video data generated by interpolation processing are written to the second memory means corresponding to the area. Thus, the video data for one display image is stored in each of the second memory units, and the video data is read out from the second memory unit to generate video data for the number of areas, and the video output device outputs By providing video data for the number of areas generated by the data recording / reproducing device to the video output device at the corresponding position and displaying the image for each area on each video output device, Is displayed using a plurality of video output devices.

In the present invention, the encoded and compressed data stored in the hard disk device or the like is decoded and written into the first memory means. The video data for one display image written in the first memory means is divided into a plurality of areas, for example, two in the horizontal direction and the vertical direction, and divided into four areas. The video data read from the first memory means for each area in a predetermined order and the video data generated by performing an interpolation process using the read video data are written to the corresponding four second memory means.
The video data for one line is read twice, and the video data for one display image corresponding to each area is stored in the second memory means. By reading the video data from each of the second memory means, video data for the number of areas is generated and supplied to the corresponding video output device.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows the configuration of the video transmission system of the present invention. The video data DS of the video material is encoded by the encoder 5 and supplied to the video server 10 as compressed encoded data TD. The operation of the encoder 5 is controlled by a command signal C from a control device 20 using a computer or the like described later.
It is controlled based on the MD.

The video server 10 has a main control unit 11, a hard disk control unit (HDD control unit) 12, a hard disk unit (HDD unit) 13, a decoding unit 14, and an external interface unit 15. The main control unit 11, HDD control unit 12, decoding unit 14, and external interface unit 15 are connected to a command bus 17 and a data bus 18, respectively. Further, an HDD unit 13 is connected to the HDD control unit 12. In the case where, for example, simultaneous output of n channels is performed by performing a data reproducing operation for each time slot in the video server, the number of decoding units 14-1 to 14-n corresponding to the time slots is provided. .

An instruction signal CMD from an application executed by the control device 20 is supplied to the main control unit 11 via the external interface unit 15 and the data bus 18. Note that the command signal CMD is also supplied to the encoder 5.

In the main control section 11, a command signal C
HDD control unit 12, decryption unit 1 based on MD
4 to generate a control signal CT for controlling operations such as
It is supplied to each unit via the command bus 17.

Here, when the compressed coded data TD is supplied from the encoder 5, the compressed coded data TD is
The data is supplied to the HDD control unit 12 via the external interface unit 15 and the data bus 18.

The HDD control unit 12 receives the compressed encoded data T supplied in the assigned time slot based on the control signal CT from the main control unit 11.
D is written into the HDD unit 13 and a unit control signal CTH for reading out the compressed and encoded data TD of the video material requested by the control device 20 from the HDD unit 13 in the assigned time slot is generated. The unit control signal CTH is supplied to the HDD unit 13.

The HDD unit 13 has a structure like a disk array in which a plurality of hard disk devices are combined in parallel, for example.
2 based on the unit control signal CTH supplied from
Writing or reading of the compressed and encoded data TD to / from the hard disk device is performed in a non-linear manner.

The compressed coded data TD read in the time slot allocated from the HDD unit 13 is:
The data is supplied to the decoding unit 14 corresponding to the time slot via the data bus 18.

Here, when performing multi-screen display,
The decoding unit 14 is connected to at least the video output devices of the number of screen divisions. The decoding unit 14 generates video data DV of a divided image from the supplied compressed and encoded data TD and supplies the video data DV to a corresponding video output device 25 of a plurality of video output devices arranged according to the division of the screen. I do.

FIG. 2 shows the configuration of the decoding unit 14.
The decoding unit 14 includes a decoding processing unit 141, a memory control unit 14,
2, a memory unit 143, an output memory 144, and a video conversion output unit 145. The output memory 144 and the video conversion output units 145 are provided according to the number of the video output devices 25, and divide one image into two in the horizontal direction and the vertical direction, for example, as shown in FIG. When the four divided images MP-1 to MP-4 are displayed using the four video output devices 25-1 to 25-4, the four output memories 144-1 to 144-4 and the video conversion output Part 145-1 ~
145-n are provided.

The decoding processing section 141 decodes the compressed coded data TD supplied via the data bus 18 and converts it into digital video data DS. This video data D
S is supplied to the memory control unit 142. Here, the compression format of the compression encoded data TD is, for example, MPEG
(Moving Picture Experts Group) 2 When MP ＠ ML, the decoding processing unit 141 sets the compressed encoded data T
D is converted into video data DS in a format called CCIR-601. FIG. 4 schematically shows a format called CCIR-601.

The signal stream of the video data DS (FIG. 4
B) is in units of 1 byte and includes a horizontal control signal (FIG. 4).
Output in synchronization with A). The signal stream in which the signal level of the horizontal control signal is at the low level “L” is an active video portion, which is a signal for displaying an image. In the signal stream of the active video portion, “Y” represents luminance data, and “Y” represents “C”.
“B” and “CR” respectively represent color difference data. The signal stream in which the signal level of the horizontal control signal is at the high level “H” is an EAV code indicating the end of the active video portion, a SAV code indicating the start of the active video portion, and a signal stream of blanking data. is there.

In the memory control unit 142, the decoding processing unit 1 is controlled based on the control signal CT from the main control unit 11.
41, a process of writing the video data DS supplied from the memory unit 143 to the memory unit 143, and a process of reading out the video data DS written to the memory unit 143 in a predetermined order and outputting data 144-1
-4144-4 and perform interpolation processing using the read video data to generate new video data, write the new video data to the output memories 144-1 to 144-4, and output the output memory 144.
Processing for individually storing the divided image video data DV-1 to DV-4 in -1 to 144-4 is performed.

The memory unit 143 has, for example, two banks so that writing and reading of the video data DS can be performed in parallel. For this reason, for example, by writing the video data DS in the area of one bank A and reading out the video data DS written in the area of the other bank B and performing interpolation processing, the output memories 144-1 to 144- 4 can be used to simultaneously write video data of divided images.

As the output memories 144-1 to 144-4, those having, for example, two banks are used as in the memory section 143. Therefore, the video data supplied from the memory control unit 142 can be written, and the stored video data DV of the divided image can be read at the same time. Here, the video data DV-1 read from the output memory 144-1 is supplied to the video conversion output unit 145-1. Similarly, the video data DV-2 to DV-4 read from the output memories 144-2 to 144-4 are supplied to the video conversion output units 145-2 to 145-4.

The video conversion output section 145-1 converts the video data DV-1 into an analog video signal SV-1 and supplies it to the video output device 25-1. Similarly, the video conversion output unit 145
-2 to 145-4, the video data DV-2 to DV-4 are converted into analog video signals SV-2 to SV-4, and the video output device 2
5-2 to 25-4.

Next, the operation of the memory control unit 142 will be described. The memory unit 143 will be described as having two banks A and B, for example.

The flowchart shown in FIG.
43 shows a process of writing the video data DS. In step ST1-1, a write pointer indicating a write position is set in the two banks A and B of the memory unit 143.
Set to the top position of the writable bank and step S
Proceed to T1-2.

In step ST1-2, it is determined whether or not one byte of the video data DS has been received. Here, when the video data DS is not supplied from the decoding processing unit 141, the process returns to step ST1-2, and when one byte of the video data DS is supplied, the process proceeds to step ST1-3.

In step ST1-3, the supplied 1-byte data is written at the position of the set write pointer, and the process proceeds to step ST1-4.

In step ST1-4, it is determined whether or not data writing for one display image of the video data DS, for example, one frame has been completed. If the writing of data for one frame has not been completed, step S
Proceeds to T1-5 and sets the pointer value of the write pointer to "1".
Is added to move the position of the pointer, and the process returns to step ST1-2. Therefore, the video data DS is continuously stored in the memory unit 1 from the head position of the writable bank.
43 is written.

Thereafter, when data writing for one frame is completed, the process proceeds from step ST1-4 to step ST1-6.

In step ST1-6, the video output device 25
It is determined whether data writing for all frames of the video material to be displayed on the multi-screen has been completed based on -1 to 25-4. Here, when the data writing for all the frames has not been completed, the process proceeds to step ST1-7, the bank is switched, the write pointer is set to the head position of another bank, and the process returns to step ST1-2. Therefore, the video data DS is alternately written to the banks A and B of the memory unit 143 in units of one frame.

When it is determined in step ST1-6 that data writing for all frames has been completed, the writing process of the video data DS is completed.

FIG. 6 shows an outline of a memory map of the memory unit 143. The memory area of the memory unit 143 corresponds to the video data DS. For example, when the video data DS can be written to the bank A, the write pointer is first set to the position P [0,0]. .
FIG. 6 shows a case where the video data DS is in the 525/60 format.

The video data DS is sequentially written for each byte, and the position of the write pointer is moved in the horizontal direction. Here, when the video data DS is written for 1716 bytes, that is, for one line, the write pointer becomes P
It is moved from [0, n5] to the position of P [1, 0]. Similarly, the video data DS is sequentially written one line at a time, and the video data DS is written for one field in an area from P [0,0] to P [m4, n5].

Next, the write pointer is set to P [m5,0].
To perform P [m5,
0] to P [m9, n5], video data DS is written for one field. Thus, the video data DS for one frame is written to the bank A. Similarly, the video data DS for one frame is written to the bank B by sequentially writing the video data DS from P [0, 0] of the bank B.

Therefore, P [m2, n2] to P [m2, n
5], P [m2 + 1, n2] to P [m2 + 1, n5],.
, P [m4, n2] to P [m4, n5], and P [m
7, n2] to P [m7, n5], P [m7 + 1, n2] to P
[M7 + 1, n5],..., P [m9, n2] to P [m
9, n5], the data of the active video portion is written, and blanking data and the like are written in the other areas.

As described above, when one frame of the video data DS is written to the bank of the memory unit 143, the area where the data of the active video portion is written is divided into the number of screen divisions for each field. That is, the area AR1
-1 to AR1-4 and AR2-1 to AR2-4. Further, by performing a process for reading the written video data and generating new video data for each area, the video data DV-1 to DV-4 for displaying the divided image are displayed.
Is generated.

Here, when one frame of video data is generated using the data of the areas AR1-1 and AR2-1 of the bank A of the memory unit 143, the data amount of the areas AR1-1 and AR2-1 is as follows. The data amount is almost half in both the horizontal and vertical directions. Therefore, interpolation processing is performed using the read video data to generate new video data, thereby compensating for the shortage of the data amount in the horizontal direction.

In the vertical direction, one line of data is read out twice consecutively, and the data at the boundary between the area AR1-1 and the area AR1-3 and between the area AR2-1 and the area AR2-3 is one. By reading twice, the data amount in the vertical direction can be doubled.

Here, a process of generating new video data by interpolation will be described. FIG. 7A shows the video data DS of the active video portion stored in the memory unit 143, and FIG. 7B shows the read video data and the video data newly generated by the interpolation processing in the output memory 1.
44 shows the state written.

In order to simplify the description, for example, the area A
The horizontal position in R1-1 is represented by coordinates V [r], and the horizontal position in the active video portion of the output memory 144-1 to which the video data of the area AR1-1 is written is represented by coordinates. Let it be denoted by W [w].

When the video data DS written in the memory unit 143 is in the 525/60 format, the data amount of one line is 720 bytes, so that the video data DS is V [0] to V [719]. It is remembered.

The video data DS is read from the memory unit 143 every 4 bytes and written to the position of the output memory 144-1 represented by the equations (1) to (4). The value of “k” is “0” or a multiple of 8. V [k] → W [2k] (1) V [k + 1] → W [2k + 3] (2) V [k + 2] → W [2k + 6] (3) V [k + 3] → W [2k + 7] (4)

Next, new data is generated by the interpolation processing shown in equations (5) to (7) using the read 4-byte video data DS and written into the output memory 144-1. . (V [k-1] + V [k + 1]) ÷ 2 → W [2k + 1] (5) Note that when (k−1) <0 in equation (5), V
[K + 1] is written to W [2k + 1]. (V [k−2] + V [k + 2]) ÷ 2 → W [2k + 2] (6) When (k−2) <0 in equation (6), V
[K + 2] is written to W [2k + 2]. (V [k + 1] + V [k + 3]) ÷ 2 → W [2k + 5] (7)

When the next four bytes of video data DS are read from the memory unit 143, the video data DS is written to the position of the output memory 144-1 represented by the equations (8) to (11). V [k + 4] → W [2k + 8] (8) V [k + 5] → W [2k + 11] (9) V [k + 6] → W [2k + 14] (10) V [k + 7] → W [2k + 15] (11)

Next, interpolation processing is performed as shown in equations (12) to (16) using the read 4-byte video data DS and the video data DS already read. , The newly generated data is stored in the output memory 144-1.
Is written to. (V [k] + V [k + 4]) ÷ 2 → W [2k + 4] (12) (V [k + 3] + V [k + 5]) ÷ 2 → W [2k + 9] (13) (V [k + 2 ] + V [k + 6]) ÷ 2 → W [2k + 10] (14) (V [k + 8] + V [k + 4]) ÷ 2 → W [2k + 12] (15) In equation (15), When k + 8)> 719, V [k + 4] is written to W [2k + 12]. (V [k + 5] + V [k + 7]) ÷ 2 → W [2k + 13] (16)

Therefore, W [0] of output memory 144-1
Contains the color difference data “CB” of V [0] based on equation (1).
Is written into W [1], and V [1] is calculated based on equation (5).
The luminance data “Ya” of [1] is written. W [2]
Contains the color difference data “CR” of V [2] based on equation (6).
Is written into W [3], based on equation (2).
The luminance data “Ya” of [1] is written. further,
W [4] includes V [0] and V [4] based on equation (12).
The average value of the color difference data “CB” is written as new data, and the brightness data “Ya” of V [1] and the brightness data “Yb” of V [3] are written into W [5] based on the equation (7). Is written as new data. Similarly, W [1439] is replaced with V [71] based on the equation (11).
9] is written.

As described above, the read video data DS
And the video data newly generated by the interpolation processing is written into the output memory 144-1, so that the memory unit 143
The video data for one line of the active video portion can be written to the output memory 144-1 based on the video data DS for (1/2) lines of the above.

In the vertical direction, one line of data is read out twice consecutively as described above, and the area AR1-1 and the area AR1-3, the area AR2-1 and the area A
By reading the data at the boundary of R2-3 once, the data amount in the vertical direction can be doubled.

Further, when the video data DS is read from the memory unit 143, the blanking data and the like are also set to one.
By sequentially reading the data for each line and writing the data to the output memory 144-1, the output memory 144-1 can store the video data DV-1 for one frame. Note that the same processing is performed on the output memories 144-2 to 144-4, so that each output memory can store the video data DV of the divided image for one frame.

The flowchart shown in FIG. 8 shows the process of writing and reading video data to and from the output memory. The follow charts shown in FIGS. 9 and 10 show the process of reading the video data DS written in the memory unit 143. The figure illustrates a process of controlling and performing an interpolation process using the read video data and writing video data for displaying the divided image MP-1 to the output memory 144-1.
12 and 13, FIG. 14 and FIG.
6 and FIG. 17 show divided images MP-2, MP-3, and M, respectively.
Image data for displaying P-4 is output to memory 144-
2, writing processes to 2, 144-3 and 144-4 are shown.

In step ST2-1 in FIG. 8, P is the head position of the bank from which the read pointer can be read.
[0, 0] is set and the process proceeds to step ST2-2.

In step ST2-2, for example, one byte of video data read out by the video data writing process described later or one frame of video data generated by interpolation using the read video data is output to the output memory 144. Write to -1 and proceed to step ST2-3.
Similarly, in steps ST2-3 to ST2-5, video data is written to the output memories 144-2 to 144-3 by a video data writing process described later.

Next, in step ST2-6, one frame of video data is read from the output memories 144-1 to 144-4 and output as video data DV-1 to DV-4, and the process proceeds to step ST2-7.

In step ST2-7, it is determined whether or not the writing of the video data for all frames of the video material has been completed. If the writing of the video data for all the frames has not been completed, the process proceeds to step ST2-8, where the read pointer of the video data is set to the start position P "0,0] of the new bank, and the process proceeds to step ST2-. Returning to step 2, when it is determined in step ST2-7 that the writing of the video data for all the frames has been completed, the reading of the video data DS is terminated.

In the process shown in FIG. 8, one frame of video data is sequentially written to the output memories 1441 to 144-4. However, one byte of video data is written to the output memories 144-1 to 144-4. May be sequentially written, and video data for one frame is stored in the output memories 144-1 to 144-4 before outputting the video data.

Next, the process of writing video data to the output memory 144-1 will be described with reference to the flowcharts of FIGS. By performing this writing process, the video data DV-1 is stored in the output memory 144-1.

First, in step ST3-1, the divided image MP
P [0, P.0 in FIG. 6 which is vertical blanking data and the like necessary to construct the video data DV-1 for generating -1.
The data of [0] to P [m1, n5] is sequentially read out from P [0,0] for one line at a time in the horizontal direction for one line at a time and up to the “m1” line, and written to the output memory 144-1. When 1-byte data is read in step ST2-2, the process proceeds to step ST2.
-2, the process proceeds to step ST2-3, in which it is assumed that one byte of video data is read out by the process of writing video data to the output memory 144-2. The process of writing video data to 144-4 will be described individually.

When the output memory 144 has the map configuration shown in FIG. 11, P [0,0] to P [0,0]
The data of P [m1, n5] is the Q of the output memory 144-1.
It is written to [0,0] to Q [j1, k3].

Next, in step ST3-2, the variable y and the variable yblk representing the position in the vertical direction are set to "m2" which is the first line after the end of the vertical flyback period, and the process proceeds to step ST3-3. .

In step ST3-3, a flag Yfg for judging whether the video data has been read twice in the vertical direction.
Is set to “1” and the process proceeds to step ST3-4. here,
When the value of the flag Yfg is "1", it indicates that the video data of the same line is to be read again. When the value of the flag Yfg is "0", it is not necessary to read the video data of the same line again. Is shown.

In step ST3-4, P [yblk, 0]
, P [yblk, n1], and blanking data, etc., are read from Q [yblk, 0] to Q [yblk, k1] of the output memory 144-1, and the process proceeds to step ST3-5.

In step ST3-5, "1" is added to the value of the variable yblk to set a new value for the variable yblk. In addition, "n2", which is the head position of the area AR1-1 in which the data of the active video portion is written, is set to a variable x representing the horizontal position.

In step ST3-6, the position P of the area AR1-1 in which the data of the active video portion is written
4 bytes of video data are read from [y, x] to P [y, x + 3] and sequentially written to the position of the output memory 144-1 indicated based on the above equations (1) to (4). Go to -7.

In step ST3-7, the next 4 bytes of video data, that is, positions P [y, x + 4] to P [y, x
+7], and reads the video data from the above-described equations (8) to
The data is sequentially written to the position of the output memory 144-1 indicated based on (11), and the process proceeds to step ST3-8.

In step ST3-8, equations (5) to (7) and equations (12) to (1) are used by using the read video data.
New video data is generated based on 6) and written to the indicated position of the output memory 144-1, and the process proceeds to step ST3-9.

In step ST3-9, it is determined whether or not the value of the variable x is equal to a value obtained by subtracting "7" from "n3" which is the end position of the area AR1-1. Here, the area AR1
The number of data of −1, that is, the number of data from “n2” to “n3” is an integral multiple of “8”, and when the video data is read as described above, the value of the variable x is “n3−7”. "," N3-3 ", ST3-7,
Since the video data of "n3-2", "n3-1", and "n3" are read, it is determined whether or not the value of the variable x is equal to "n3-7" to determine the value of the divided image MP-1. It is possible to determine whether reading of the video data for one line is completed.

If it is determined in step ST3-9 that the reading of one line of video data has not been completed, the process proceeds to step ST3-10, where the value of the variable x is set to "4" in step ST3-10. Is added to set a new value of the variable x, and the process returns to step ST3-7. Step ST3-9
If the reading of the video data for one line is completed, the process proceeds to step ST3-11. Thus, P
According to the data of [y, n2] to P [y, n3], Q [z,
k2] to Q [z, k3]. Note that “z” is a value associated with “y”.

At step ST3-11, it is determined whether or not the value of the flag Yfg is set to "0". Here, when the value of the flag Yfg is not set to “0”, the process proceeds to step ST3-12, and the value of the flag Yfg is set to “0”.
And returns to step ST3-4. Also, the flag Yfg
Is set to "0" in step ST3
Proceed to -13.

In step ST3-13, it is determined whether or not the value of the variable y is equal to a value obtained by subtracting "1" from the position "m3" of the last line of the divided image MP-1. That is, it is determined whether or not it is one line before the end of data reading for one field of the divided image MP-1. Note that the split image MP-1
Is used also as data of the first line of the divided image MP-3.

Here, when it is determined that it is one line before the end of the data reading, the process proceeds to step ST3-14, where "1" is added to the value of the variable y, and the value is set to a new value of the variable y. Returning to ST3-12, step S
At T3-12, the value of the flag Yfg is set to "0", and the process returns to step ST3-4. If it is not determined that the current line is one line before the end of the data reading, the process proceeds to step ST3-15.

In step ST3-15, the value of the variable y is equal to the position "m3" indicating the last line of the divided image MP-1,
It is determined whether data reading for one field of the divided image MP-1 has been completed. Here, when it is not determined that the data reading is completed, the process proceeds to step ST3-16. In this step ST3-16, a value obtained by adding “1” to the value of the variable y is set as a new value of the variable y, and the process proceeds to step ST3-16.
Return to T3-3. When it is determined that the data reading has been completed, the process proceeds to step ST3-17.

As described above, steps ST3-1 to ST3-1 are performed.
By the processing of step 6, blanking data and the like are read out one byte at a time for each line and written to the output memory 144-1, and new data is generated by interpolation processing and written to the output memory 144-1. The data amount of the portion is doubled. Further, the flag Yfg
Is used, the data of the active video portion for one line is read twice, and the last line is read once. By performing such processing,
The output memory 144-1 can store the video data DV-1 for one field.

For example, in the memory map shown in FIG. 6, when the video data DS to be written is of the 525/60 type, "m2" = 20, "m3" = 141, and "m3" = 141.
4 "= 262," n2 "= 276," n3 "= 995,
Since “n5” = 1715, “n2” to “n”
The data corresponding to 1740 bytes from "n2" to "n5" is written to the output memory 144-1 by the 720 bytes of data up to "3" and the newly generated data of 720 bytes. Also, the data of the active video portion of 121 lines from "m2" to "m3-1" is read twice and the data of the active video portion of "m3" line is read once,
P [m2, n2], P [m2, n2 +
1],... P [m2, n3], P [m2 + 1, n2].
An output memory 144 based on the data of P [m3, n3]
Data is written to Q [j2, k2]... Q [j3, k3] of -1. Further, since blanking data and the like are read out line by line and written to the output memory 144-1, Q [0,0] to Q [j of the output memory 144-1 are used.
3, k3] can store video data DV-1 for one field.

From step ST3-15 to step ST3-17
In step ST3-17, the video data of the next field is written to the output memory 144-1 by the processing after step ST3-17.

At step ST3-17, at step ST3-
In the same manner as in 1, the data of the vertical blanking is read out and written into the output memory 144-1. Step ST
P [0,0] and P [m1, n5] in 3-1 become P [m5,0] and P [m6, n5] in step ST3-17.

In step ST3-18, the variable y and the variable yblk are set to "m7" which is the first line after the end of the vertical retrace period, and the flow advances to step ST3-19.

In step ST3-19, the flag Yfg is set to "1", and the flow advances to step ST3-20.

In step ST3-20, P [yblk, 0]
To P [yblk, n1], and the like, and the process proceeds to step ST3-21.

In step ST3-21, "1" is added to the value of the variable yblk to set a new value for the variable yblk. The variable x is set to "n2" which is the head position of the area AR2-1 in which the data of the active video portion is written.

In step ST3-22, the position P of the area AR2-1 in which the data of the active video portion is written
4 bytes of video data are read from [y, x] to P [y, x + 3] and sequentially written to the position of the output memory 144-1 indicated based on the above equations (1) to (4). Continue to -23.

In step ST3-23, the next 4 bytes of video data, that is, positions P [y, x + 4] to P [y,
x + 7], and reads the video data from the above equation (8).
(11) is sequentially written into the position of the output memory 144-1 indicated by (11), and the process proceeds to step ST3-24.

At step ST3-24, the equations (5) to (7) and the equations (12) to
Based on (16), new video data is generated and written to the indicated position of the output memory 144-1. Step ST3
Continue to -25.

In step ST3-25, step ST3-
In the same manner as in step 9, it is determined whether reading of the video data for one line of the divided image MP-1 has been completed. Where 1
If the reading of the video data for the line has not been completed, the process proceeds to step ST3-26.
Then, "4" is added to the value of the variable x to set a new value for the variable x, and the process returns to step ST3-23. Step S
If it is determined in T3-25 that reading of one line of video data has been completed, the process proceeds to step ST3-27.

In step ST3-27, it is determined whether or not the value of the flag Yfg is set to "0". Here, when the value of the flag Yfg is not set to “0”, the process proceeds to step ST3-28, and the value of the flag Yfg is set to “0”.
And returns to step ST3-20. The flag Yf
When the value of g is set to "0", the step ST
Proceed to 3-29.

In step ST3-29, it is determined whether or not the value of the variable y is equal to the value obtained by subtracting "1" from the position "m8" of the last line of the divided image MP-1. That is, it is determined whether or not it is one line before the end of data reading for one field of the divided image MP-1. Here, when it is determined that it is one line before the end of the data reading, the process proceeds to step ST3-30, where a value obtained by adding "1" to the value of the variable y is set as a new value of the variable y, and the process proceeds to step ST3-. 28
At the same time, the value of the flag Yfg is set to "0" in step ST3-28, and the process returns to step ST3-20. If it is not determined that the current line is one line before the end of the data reading, the process proceeds to step ST3-31.

In step ST3-31, the value of the variable y is equal to the position "m8" indicating the last line of the divided image MP-1, and
It is determined whether data reading for one field of the divided image MP-1 has been completed. Here, when it is not determined that the data reading is completed, the process proceeds to step ST3-32. In this step ST3-32, a value obtained by adding “1” to the value of the variable y is set as a new value of the variable y, and the process proceeds to step ST3-32.
Return to T3-19. When it is determined that the data reading has been completed, Q [j4,0] to Q [
The video data DV-1 for one field is stored in [j7, k3], and the video data DV-1 for the divided image MP-1 for one frame is stored in one bank of the output memory 144-1. The process is terminated.

Next, the process of writing video data for displaying the divided image MP-2 to the output memory 144-2 will be described with reference to the flowcharts of FIGS. In step ST4-1, similarly to step ST3-1, blanking data and code data P [0,0] to P [m1, n5], which are necessary for forming the video data DV-2, are used.
Data is read out byte by byte and output memory 14
Then, the process proceeds to step ST4-2.

In step ST4-2, the variable y and the variable yblk representing the position in the vertical direction are set to "m2" which is the first line after the end of the vertical flyback period, and the flow advances to step ST4-3.

In step ST4-3, the flag Yfg is set to "1", and the flow advances to step ST4-4.

In step ST4-4, P [yblk, 0]
, And blanking data from P [yblk, n1] are read and written to the output memory 144-2. Step ST
Go to 4-5.

In step ST4-5, "1" is added to the value of the variable yblk to set a new value for the variable yblk. In addition, "n4", which is the head position of the area AR1-2 in which the data of the active video portion is written, is set in a variable x representing the horizontal position.

In step ST4-6, the position P of the area AR1-2 in which the data of the active video portion is written
4 bytes of video data are read from [y, x] to P [y, x + 3] and sequentially written to the position of the output memory 144-2 indicated based on the above equations (1) to (4). Go to -7.

In step ST4-7, the next 4 bytes of video data, that is, positions P [y, x + 4] to P [y, x
+7], and reads the video data from the above-described equations (8) to
The data is sequentially written to the position of the output memory 144-2 indicated based on (11), and the process proceeds to step ST4-8.

In step ST4-8, equations (5) to (7) and equations (12) to (1) are used by using the read video data.
New video data is generated based on 6), and written to the indicated position of the output memory 144-2, and the process proceeds to step ST4-9.

In step ST4-9, it is determined whether or not the value of the variable x is equal to a value obtained by subtracting "7" from "n5" which is the end position of the area AR1-2, thereby determining whether the divided image MP
It is determined whether or not reading of video data for one line of -2 has been completed. If the reading of the video data for one line has not been completed, the process proceeds to step ST4-10. In this step ST4-10, "4" is added to the value of the variable x and the new value of the variable x is set. Step ST4-7
Return to If the reading of one line of video data is completed in step ST4-9, the process proceeds to step ST4-11.
Proceed to.

Hereinafter, by performing the same processing as the processing of writing the video data of the divided image MP-1 to the output memory 144-1, Q [0,0] to Q [m4, n of the output memory 144-2 are performed.
5], video data DV-2 for one field can be stored.

In step ST4-18, the variable y and the variable yblk are set to “m7”, which is the first line after the end of the vertical blanking period.
By adding “1” to the value of blk to set a new value of the variable yblk, and setting the variable x to “n4” which is the head position of the area AR2-2 in which the active video portion is written, and By performing the same processing as the reading of the video data of the divided image MP-1 and reading out the video data of one field, Q [m5,0] to Q [m9, n of the output memory 144-2 are read.
5], video data DV-2 for one field is stored, and one bank is stored in one bank of the output memory 144-2.
The video data DV-2 of the divided image MP-2 for the frame is stored, and the process ends.

Next, the process of writing video data for displaying the divided image MP-3 in the output memory 144-3 will be described with reference to the flowcharts of FIGS. In step ST5-1, P [0,0] to P [m1, n], which are blanking data and code data necessary to compose the video data DV-3 in the same manner as in step ST3-1.
5] is read out one byte at a time, written into the output memory 144-3, and the process proceeds to step ST5-2.

In step ST5-2, the variable y representing the position in the vertical direction is set to the last line of the divided image MP-1 and the first line after the end of the vertical retrace period of the divided image MP-3. m3 ”. The variable yblk is set to "m2" which is the first line after the end of the vertical blanking period so that blanking data and the like can be sequentially read out line by line. Further, the flag Yfg is set to "0", and the process proceeds to step ST5-3.

In step ST5-3, P [yblk, 0]
To P [yblk, n1], and the like, and the process proceeds to step ST5-4.

In step ST5-4, "1" is added to the value of the variable yblk to set a new value for the variable yblk. In addition, "n2", which is the head position of the area AR1-3 in which the data of the active video portion is written, is set to a variable x representing the horizontal position.

In step ST5-5, the position P of the area AR1-3 in which the data of the active video portion is written
4 bytes of video data are read from [y, x] to P [y, x + 3] and sequentially written to the position of the output memory 144-2 indicated based on the above equations (1) to (4). Continue to -6.

In step ST5-6, the next 4 bytes of video data, that is, positions P [y, x + 4] to P [y, x
+7], and reads the video data from the above-described equations (8) to
The data is sequentially written to the position of the output memory 144-3 indicated based on (11), and the process proceeds to step ST5-7.

In step ST5-7, the equations (5) to (7) and the equations (12) to (1) are used by using the read video data.
New video data is generated based on 6) and written to the indicated position of the output memory 144-3, and the process proceeds to step ST5-8.

In step ST5-8, it is determined whether or not the value of the variable x is equal to the value obtained by subtracting "7" from "n5" which is the end position of the area AR1-3, thereby determining the divided image MP.
It is determined whether reading of video data for one line of -3 has been completed. If the reading of the video data for one line has not been completed, the process proceeds to step ST5-9.
In step ST5-9, "4" is added to the value of the variable x to set a new value for the variable x, and the process returns to step ST5-6. If reading of one line of video data is completed in step ST5-8, the process proceeds to step ST5-10.

In step ST5-10, it is determined whether or not the value of the flag Yfg is set to "0". Here, when the value of the flag Yfg is not set to “0”, the process proceeds to step ST5-11, and the value of the flag Yfg is set to “0”.
And returns to step ST5-3. Also, the flag Yfg
Is set to "0" in step ST5
Proceed to -12.

In step ST5-12, it is determined whether or not the value of the variable y is equal to the position "m5" of the last line of the divided image MP-3. If it is not determined that the value is equal to the position of the last line "m5", the process proceeds to step ST5-13, in which a value obtained by adding "1" to the value of the variable y is set as a new value of the variable y, and the process proceeds to step ST5-14. Proceed to. In step ST5-14, the flag Yfg is set to "1", and the process returns to step ST5-3. If it is determined in step ST5-12 that the value of the variable y is equal to the position "m5" of the last line, the process proceeds to step ST5-15.

As described above, steps ST5-1 to ST5-1 are performed.
In the processing of step 4, blanking data and the like are read out one byte at a time for each line and written to the output memory 144-3, and new data is generated by interpolation processing and written to the output memory 144-3. The data amount of the portion is doubled. Further, the flag Yfg
By performing the process of reading out the data of one line of the active video portion twice by using, the video data DV-3 for one field can be stored in the output memory 144-3.

For example, in the memory map shown in FIG. 6, 720 bytes of data from "n2" to "n3" and 720 bytes of newly generated data correspond to 1740 of "n2" to "n5". Data corresponding to the bytes is written to the output memory 144-3. In addition, the data of the active video portion of the “m3” line is read once, and the data of the active video portion of 121 lines from “m3 + 1” to “m4” are read twice, and the P of the memory unit 143 is read. [M3, n2], P
[M3, n2 + 1],... P [m3, n3], P [m3 +
1, n2]... P [m4, n3] based on the data of Q [m2, n2] and Q [m2, n2 +
1],... Q [m2, n5], Q [m2 + 1, n2]
Data is written to Q [m4, n5]. Further, since blanking data and the like are read out line by line and written into the output memory 144-3, the output memory 1
The video data DV-3 for one field can be stored in Q [0,0] to Q [m4, n5] of 44-3.

Step ST5-12 to step ST5-15
In step ST5-15, the output memory 144-3 stores the video data DV of the next field.
-3 is stored.

In step ST5-15, step ST5-
The blanking data and code data are read out in the same manner as in 1, and the process proceeds to step ST5-16. Step S
P [0,0] and P [m1, n5] in T5-1 become P [m5,0] and P [m6, n5] in step ST5-15.

In step ST5-16, the variable y is set to "m8" which is the last line of the divided image MP-1 and the first line after the end of the vertical retrace period of the divided image MP-3. Also, the variable yblk is set to "m7" which is the first line after the end of the vertical blanking period so that blanking data and the like can be sequentially read out line by line. Further, the flag Yfg is set to "0", and the control goes to step ST5-17.
Proceed to.

The following steps ST5-17 to ST
The process of 5-25 is performed from step ST5-3 to step ST5-11.
Steps ST5-24 to ST5-
At step ST5-26, it is determined whether or not the value of the variable y is equal to the position "m9" of the last line of the divided image MP-3. If it is not determined that the value is equal to the position of the last line "m9", the process proceeds to step ST5-27, where the value obtained by adding "1" to the value of the variable y is set as a new value of the variable y, and the process proceeds to step ST5-28. Proceed to. In this step ST5-28, the flag Yfg is set to "1" and the process returns to step ST5-17. If it is determined in step ST5-26 that the value of the variable y is equal to the position "m9" of the last line, Q [m5,0] to Q [m
9, n5], video data DV-3 for one field is stored, and video data DV-3 for one frame of divided image MP-3 is stored in one bank of the output memory 144-3. The process is terminated.

Next, in the process of writing the video data for displaying the divided image MP-4 to the output memory 144, FIG.
As shown in the flowchart of FIG. 17, the same processing as the above-described processing of writing the video data for generating the divided images MP-1 to MP-3 is performed, and the variable is set in step ST6-4 and step ST6-18. By setting x to "n4", the video data DV-4 of the divided image MP-4 for one frame is stored in one bank of the output memory 144-4, and the process is terminated.

The video data written in the other bank is read out from the head position in the order described above, and new data is generated by interpolation processing, so that the video data DV-1 to DV-4 are output to the output memory. 144-1
One frame can be stored in another bank of .about.144-4. In this way, the video data DV-1 stored in the output memory 144-1 is supplied to the video conversion output unit 145-1 and converted into the video signal SV-1, and the video signal SV-1 is converted into a video output device. By supplying the divided image MP-1 to the video output device 25-1, the video output device 25-1 can display the divided image MP-1. Similarly, the video data DV-2 to DV-4 stored in the output memories 144-2 to 144-4 are converted to video conversion output units 145-2 to 14-14.
5-4 for converting the video signals SV-2 to SV-4 and converting the video signals SV-2 to SV-4 to video output devices 25-2 to 25-4.
The divided images MP-2 to MP-4 can be displayed on the video output devices 25-2 to 25-4. Therefore, one image can be displayed on a multi-screen by the video output devices 25-1 to 25-4.

As described above, according to the above-described embodiment,
The memory section 143 is divided and the written video data D
If the reading of S is controlled and new data is generated by interpolation and written to the output memory 144 corresponding to the area, the output memories 144-1 to 144-4
Includes video data DV-1 to DV-4 of divided images MP-1 to MP-4.
Can be stored. Therefore, the output memory 14
By sequentially supplying the video data DV-1 to DV-4 from 4-1 to 144-4 to the video conversion output units 145-1 to 145-4, the video output devices 25-1 to 25-4 sequentially output the video data DV-1 to DV-4. Since the divided images are displayed, the display images of the video material can be easily displayed on the multi-screen by the video output devices 25-1 to 25-4 with an inexpensive configuration without using a video processor or the like.

In the above-described embodiment, the amount of data in the vertical direction is doubled by reading out the data constituting one line of the area twice. However, as in the case of reading out the data in the horizontal direction, the data amount in the vertical direction is doubled. At the time of data reading, new data can be generated by interpolation to double the amount of data in the vertical direction. In this case, high-quality multi-screen display can be performed.

The number of areas is not limited to the case where the area is divided into two in the horizontal direction and the vertical direction. The number of pieces of data generated by data reading or interpolation processing is changed in accordance with the area division. , Video data for the number of areas can be generated. For example, in the case where the data is divided into three parts in the horizontal direction, the data of each area is read out and new video data is generated and stored in the output memory 144 so that the data amount in the horizontal direction is tripled. Video data for one display image can be generated for three areas.

Further, in the above-described embodiment, the video data DV is converted into the analog video signal SV by the video conversion output unit 145 and output.
Can be output as it is as a digital signal. In this case, the video conversion output unit 145 can be reduced,
Further cost reduction can be expected.

[0125]

According to the present invention, the video data for one display image written in the first memory means is divided into a plurality of areas, and a plurality of second memory means are provided corresponding to the areas. It is assumed that video data read out from each area in a predetermined order and video data generated by performing an interpolation process using the read video data are written into the corresponding second memory means and stored in the corresponding second memory means for one display image. Are stored in the second memory means. Video data is read from each of the second memory means and supplied to the corresponding video output devices of the video output devices provided for the number of areas. It is supplied to the corresponding video output device. For this reason, since one video data is transmitted as video data of a plurality of divided pictures, multi-screen display can be performed easily at low cost without using a video processor or the like.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a video transmission system according to the present invention.

FIG. 2 is a diagram illustrating a configuration of a decoding unit.

FIG. 3 is a diagram showing a divided image in a multi-screen display.

FIG. 4 is a diagram showing a format of video data.

FIG. 5 is a flowchart showing a writing process of video data.

FIG. 6 is a memory map of a memory unit 143.

FIG. 7 is a diagram for describing reading of video data and interpolation processing.

FIG. 8 is a flowchart showing a process of writing and reading video data to and from an output memory.

FIG. 9 is a flowchart showing a process (1/2) of writing video data to the output memory 144-1.

FIG. 10 is a flowchart showing a process (2/2) of writing video data to an output memory 144-1.

FIG. 11 is a memory map of an output memory 144.

FIG. 12 is a flowchart showing a process (1/2) of writing video data to an output memory 144-2.

FIG. 13 is a flowchart showing a process (2/2) of writing video data to the output memory 144-2.

FIG. 14 is a flowchart showing a process (1/2) of writing video data to an output memory 144-3.

FIG. 15 is a flowchart showing a process (2/2) of writing video data to the output memory 144-3.

FIG. 16 is a flowchart showing a process (1/2) of writing video data to an output memory 144-4.

FIG. 17 is a flowchart showing a process (2/2) of writing video data to the output memory 144-4.

FIG. 18 is a diagram showing a conventional configuration.

[Explanation of symbols]

5 ... encoder, 10, 50 ... video server, 1
DESCRIPTION OF SYMBOLS 1 ... Main control part, 12 ... HDD control part, 13 ... HDD unit, 14 ... Decoding part, 15 ... External interface part, 17 ...
Command bus, 18 Data bus, 20 Control device, 25, 60 Video output device, 70
.. Double scan converter, 75 video processor, 141 decoding processing unit, 142 memory control unit, 143 memory unit, 144 output memory,
145 ... Video conversion output unit

Continued on front page F-term (reference) 5B057 CA16 CB16 CD06 CH11 5C052 AA01 AA17 AB05 CC06 CC11 CC20 DD08 EE03 GA03 GA04 GA06 GA07 GA08 GB06 GC03 GD03 GE04 5C053 FA05 FA06 FA23 FA28 GB01 GB21 GB38 HA30 HA33 HA40 KA01 LA03 BA41 BB31 BB46 BD07 CB01 DA06 DA87 MM07

Claims (7)

[Claims] The video data is written in a first memory means. The video data for one display image written in the first memory means is divided into a plurality of areas, and a plurality of areas are provided corresponding to the areas. A second memory means, wherein the second memory means performs an interpolation process using the video data read out in a predetermined order from the corresponding area of the first memory means and the read video data. A video data reproducing method, characterized by storing video data for one display image by writing the video data generated by performing, and reading and outputting video data from each of the second memory means. 2. The video data reproducing method according to claim 1, wherein video data is read out in a predetermined order and interpolation processing is performed for each of the areas according to the division of the area. 3. A first and a plurality of second memory means for temporarily storing video data, controlling writing and reading of the video data to and from the first and a plurality of second memory means, and reading the read video data. And a memory control means for generating video data by performing interpolation processing using the video data. The memory control means writes the video data in the first memory means and writes the video for one display screen. The data is divided into a plurality of regions, and the video data read out in a predetermined order for each of the regions and the video data generated by the interpolation process are written in the second memory means corresponding to the region, thereby storing one display image. Video data is stored in each of the second memory means,
A video data reproducing device for reading and outputting video data from each of the memory units. 4. The video data reproducing apparatus according to claim 3, wherein said memory control means reads out video data for each of said areas in a predetermined order and performs interpolation processing in accordance with a division of said area. 5. A data recording / reproducing device for recording video data of a video material on a recording medium and reproducing the video data recorded on the recording medium, and a control device for controlling an operation of the data recording / reproducing device. A video output device that displays an image based on video data reproduced by the data recording / reproducing device, wherein the control device controls the data recording / reproducing device, and reads out video data of a video material according to a request. In a video transmission system for displaying a video material according to a request on the video output device, the data recording / reproducing device includes a first and a plurality of second memory means for temporarily storing video data; It controls writing and reading of video data to and from the second memory means and performs interpolation processing using the read video data. A memory control unit that generates video data according to the following. In the memory control unit, the video data read from the recording medium is written into the first memory unit, and the written video for one display screen is written. The data is divided into a plurality of regions, and the video data read out in a predetermined order for each of the regions and the video data generated by the interpolation process are written into the second memory means corresponding to the region, so that one display image is obtained. Is stored in each of the second memory means, and video data for the number of areas is generated by reading the video data from the second memory unit. The video data corresponding to the number of areas generated by the data recording / reproducing device is supplied to the video output device at a corresponding position, and the area is provided. Video delivery system, wherein the image of the by displaying each of the video output device, for displaying one display image of the image material in response to the request using the plurality of image output devices. 6. The video transmission system according to claim 5, wherein said memory control means reads out video data for each of said areas in a predetermined order and performs interpolation processing in accordance with a division of said area. 7. The recording medium, wherein video data of video material is encoded and recorded, and the memory means decodes and stores the encoded video data recorded on the recording medium. 6. The video transmission system according to claim 5, wherein: