JP2000323344A - Manufacture of chip inductor - Google Patents
Manufacture of chip inductorInfo
- Publication number
- JP2000323344A JP2000323344A JP11130340A JP13034099A JP2000323344A JP 2000323344 A JP2000323344 A JP 2000323344A JP 11130340 A JP11130340 A JP 11130340A JP 13034099 A JP13034099 A JP 13034099A JP 2000323344 A JP2000323344 A JP 2000323344A
- Authority
- JP
- Japan
- Prior art keywords
- etching resist
- substrate
- base material
- film
- spiral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000004020 conductor Substances 0.000 claims abstract description 38
- 238000005530 etching Methods 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 5
- 239000000463 material Substances 0.000 claims description 31
- 239000000696 magnetic material Substances 0.000 abstract description 6
- 239000000919 ceramic Substances 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 29
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000003973 paint Substances 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910000859 α-Fe Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- SZVJSHCCFOBDDC-UHFFFAOYSA-N iron(II,III) oxide Inorganic materials O=[Fe]O[Fe]O[Fe]=O SZVJSHCCFOBDDC-UHFFFAOYSA-N 0.000 description 1
- 239000006247 magnetic powder Substances 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
Landscapes
- Manufacturing Cores, Coils, And Magnets (AREA)
- Coils Or Transformers For Communication (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、絶縁性の基材の
表面に形成された導電体膜によるコイルパターンを有し
たチップインダクタの製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip inductor having a coil pattern formed of a conductive film formed on a surface of an insulating substrate.
【０００２】[0002]
【従来の技術】従来、チップインダクタは、特開平１０
−２０８９４１号公報に開示されているように、絶縁性
の磁性材料やその他少なくとも表面が絶縁材料の角型基
材の表面に、導電体膜を形成し、この導電体膜を形成し
てコイル部を形成していた。そして、コイル部の両端部
には電極が設けられ、回路基板表面に表面実装可能に形
成されている。コイル部の表面は、絶縁性の樹脂が塗布
され、外部との絶縁を図っていた。2. Description of the Related Art Conventionally, chip inductors are disclosed in
As disclosed in JP-A-2020841, a conductor film is formed on the surface of an insulating magnetic material or other rectangular substrate having at least a surface made of an insulating material, and the conductor film is formed to form a coil portion. Had formed. Electrodes are provided at both ends of the coil portion, and are formed so as to be surface mountable on the surface of the circuit board. The surface of the coil portion was coated with an insulating resin to achieve insulation from the outside.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の技術の場
合、電子機器の小型化薄型化の要請によりチップ形状は
小さく薄くすると、コイル部のコイルの巻き数が少なく
インダクタとしての必要な性能が得られない場合があっ
た。また、薄型化には薄膜インダクタも有効であるがイ
ンダクタンス等の性能的に十分なものが得られないもの
であった。また、チップ状の基材表面に導電体を被覆
し、その導電体をレーザ光により溝状に除去して、螺旋
状のコイル部を形成するものも提案されている。しか
し、この場合も、銅箔等の導電体をレーザ光により除去
させるには、比較的大出力のレーザを必要とし、しかも
確実に溝が切られないとコイル部の短絡が生じ、不良品
の発生原因となっていた。In the case of the above-mentioned prior art, when the chip shape is made small and thin due to the demand for miniaturization and thinning of electronic equipment, the number of turns of the coil in the coil portion is small and the required performance as an inductor is obtained. Was not always possible. Further, a thin-film inductor is also effective for reducing the thickness, but a sufficient performance such as inductance cannot be obtained. Further, there has been proposed a device in which a conductor is coated on the surface of a chip-shaped base material, and the conductor is removed in a groove shape by laser light to form a spiral coil portion. However, even in this case, a laser with a relatively large output is required to remove a conductor such as a copper foil with a laser beam, and if the groove is not securely cut, a short circuit occurs in the coil portion, resulting in a defective product. It was the cause.
【０００４】この発明は上記従来の技術の問題点に鑑み
てなされたもので、小型化が可能であり、信頼性が高
く、インダクタとしての性能も高いチップインダクタの
製造方法を提供することを目的とする。[0004] The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to provide a method of manufacturing a chip inductor which can be miniaturized, has high reliability, and has high performance as an inductor. And
【０００５】[0005]
【課題を解決するための手段】この発明のチップインダ
クタの製造方法は、セラミックスや少なくとも表面を絶
縁性にした磁性材料等の絶縁性の平面状基材を設け、こ
の基材に所定間隔で複数対の開口部を形成し、この各対
になった開口部で挟まれる部分の基材の形状を、上記基
材表面に対して垂直方向の面を有しない側面形状にす
る。そして、この基材表面に導電体膜を形成し、この基
材表面の導電体膜をエッチングレジストで被覆し、上記
開口部間の上記基材表面のエッチングレジストを所定の
螺旋パターンに感光させ、上記エッチングレジストを螺
旋状に残し、上記螺旋状のエッチングレジストが残った
部分以外の上記導電体膜を除去して、螺旋状の導電体パ
ターンを形成するチップインダクタの製造方法である。According to a method of manufacturing a chip inductor of the present invention, an insulating planar base material such as ceramics or a magnetic material having at least an insulating surface is provided, and a plurality of the base materials are provided on the base material at predetermined intervals. A pair of openings is formed, and the shape of the portion of the substrate sandwiched between the paired openings is a side surface shape having no surface perpendicular to the surface of the substrate. Then, a conductor film is formed on the substrate surface, the conductor film on the substrate surface is coated with an etching resist, and the etching resist on the substrate surface between the openings is exposed to a predetermined spiral pattern, A method of manufacturing a chip inductor in which a spiral conductor pattern is formed by leaving the etching resist in a spiral shape and removing the conductor film other than the portion where the spiral etching resist remains.
【０００６】また、上記エッチングレジストを、レーザ
ー光により螺旋状に感光させるものである。この場合上
記開口部間の基材の形状は、その表面にレーザ光を照射
可能であれば、基材表面と直角な面を有していても良
い。上記基材は上記導電体パターンを形成後、個々のチ
ップインダクタに分割する。さらに、上記導電体パター
ンを、絶縁性の磁性体膜により被覆してもよいものであ
るFurther, the above-mentioned etching resist is spirally exposed by a laser beam. In this case, the shape of the substrate between the openings may have a plane perpendicular to the surface of the substrate as long as the surface can be irradiated with laser light. After forming the conductor pattern, the base material is divided into individual chip inductors. Furthermore, the conductor pattern may be covered with an insulating magnetic film.
【０００７】[0007]
【発明の実施の形態】以下、この発明の実施形態につい
て図面に基づいて説明する。図1〜図４は、この発明の
一実施形態のチップインダクタ１０を示し、絶縁性の磁
性材料その他絶縁材料であるセラミックスや、フェライ
ト等の磁性材料の基材の表面に絶縁皮膜を施したもの等
からなる基材１２を有する。基材１２の各側面にはメッ
キや蒸着、スパッタリング等により銅やアルミニウムそ
の他の金属による金属薄膜の導電体膜１４が設けられて
いる。この導電体膜１４には、基材１２に達する深さ程
度の溝１６が形成され、この溝１６によりにより隣接す
る導電体膜１４同士が分断されている。そして、溝１６
は、基材１２の一方の端部から他方の端部に至る螺旋状
に形成され、この溝１６で仕切られる導電体膜１４によ
り、基材１２の表面に導電体パターン１８が形成されて
いる。Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1 to 4 show a chip inductor 10 according to one embodiment of the present invention, in which an insulating film is applied to the surface of a base material made of an insulating magnetic material or other magnetic material such as ceramics or ferrite. And the like. A conductor film 14 of a metal thin film made of copper, aluminum, or another metal is provided on each side surface of the base material 12 by plating, vapor deposition, sputtering, or the like. The conductor film 14 is formed with a groove 16 having a depth that reaches the base material 12, and the adjacent conductor films 14 are separated from each other by the groove 16. And the groove 16
Are formed in a spiral shape from one end of the base material 12 to the other end, and a conductive pattern 18 is formed on the surface of the base material 12 by the conductive film 14 partitioned by the groove 16. .
【０００８】また基材１２の溝１６による導電体パター
ン１８の両端部には、各々電極２０，２２が形成されて
いる。電極２０，２２間の導電体パターン１８は、磁性
体を配合した樹脂による磁性体膜２４により覆われてい
る。磁性体膜２４は、樹脂バインダ中にフェライトやマ
グネタイトの酸化鉄やその他の磁性体粉末が分散したも
ので、高い透磁率を有するものである。また磁性体膜２
４は、絶縁性を有する。なお、磁性体膜２４の代わりに
他の絶縁体膜を施しても良い。Electrodes 20 and 22 are formed at both ends of the conductor pattern 18 formed by the grooves 16 in the base material 12, respectively. The conductor pattern 18 between the electrodes 20 and 22 is covered with a magnetic film 24 made of a resin containing a magnetic material. The magnetic film 24 is made of a resin binder in which ferrite or iron oxide of magnetite or other magnetic powder is dispersed, and has a high magnetic permeability. The magnetic film 2
4 has an insulating property. Note that another insulating film may be provided instead of the magnetic film 24.
【０００９】この実施形態のチップインダクタの製造方
法は、まずセラミックス材料等を成形して焼成し、所望
形状の基材１２を形成する。この基材１２は、成形に際
して、図１、図２に示すように、所定間隔で複数対のス
リット状の開口部２６を形成する。そしてこの開口部２
６間の基材の形状を、図示するように、断面６角形の形
状にし、基材１２の表面に対して直角方向の面が形成さ
れない形状にする。さらに、開口部２６間の基材１２の
側面を含む基材１２の表面には銅等の導電体膜１４を形
成する。導電体膜１４の形成は、メッキや、蒸着、スパ
ッタリング等による。そして、この導電体膜１４が形成
された基材１２の表面に、エッチングレジストを塗布す
る。エッチングレジストは、感光部が除去されるネガ型
のものを用いる。In the method of manufacturing a chip inductor according to this embodiment, first, a ceramic material or the like is formed and fired to form a base material 12 having a desired shape. When forming the base material 12, a plurality of pairs of slit-shaped openings 26 are formed at predetermined intervals as shown in FIGS. And this opening 2
As shown in the figure, the shape of the base material between the six bases is made hexagonal in cross section, and a shape in which a surface perpendicular to the surface of the base material 12 is not formed. Further, a conductive film 14 such as copper is formed on the surface of the base 12 including the side surfaces of the base 12 between the openings 26. The conductor film 14 is formed by plating, vapor deposition, sputtering, or the like. Then, an etching resist is applied to the surface of the base material 12 on which the conductor film 14 is formed. As the etching resist, a negative type resist from which a photosensitive portion is removed is used.
【００１０】この後、図３に示すように、基材１２の開
口部２６間に、エッチンレジストを感光させる程度の出
力のレーザにより、この部分の基材１２の全周に各々１
本の螺旋状のパターン３０を形成する。このパターン３
０の形成方法は、図３に示すように表面側のパターン３
０と裏面側のパターンとが、６角形断面の角部で接する
ようにすればよい。そして、感光した部分のエッチング
レジストを除去し、エッチングを行う。これにより、図
３に示す螺旋状のパターン３０の部分の導電体膜１４が
除去されて、溝１６が形成され導電体パターン１８が形
成される。[0010] Thereafter, as shown in FIG. 3, a laser having an output sufficient to expose the etchant resist is applied between the openings 26 of the base material 12 so as to cover the entire circumference of the base material 12 in this portion.
A spiral pattern 30 of books is formed. This pattern 3
0 is formed by pattern 3 on the front side as shown in FIG.
It suffices that the pattern 0 and the pattern on the back side contact each other at the corner of the hexagonal cross section. Then, the exposed portion of the etching resist is removed, and etching is performed. As a result, the conductor film 14 at the portion of the spiral pattern 30 shown in FIG. 3 is removed, the groove 16 is formed, and the conductor pattern 18 is formed.
【００１１】この実施形態の場合、図４に示すように、
導電体パターン１８を形成した後、基材１２の開口部２
６間の導電体パターン１８の表面に絶縁性の磁性体塗料
を塗布して磁性体膜３２形成する。この後、基材１２の
余剰部分を切断して、個々のチップインダクタ１０に分
割する。なお、磁性体膜３２が絶縁性の場合、導電性の
磁性体膜をさらに被覆しても良い。In the case of this embodiment, as shown in FIG.
After the conductor pattern 18 is formed, the opening 2
A magnetic film 32 is formed by applying an insulating magnetic paint to the surface of the conductor pattern 18 between the six. Then, the surplus part of the base material 12 is cut and divided into individual chip inductors 10. When the magnetic film 32 is insulating, a conductive magnetic film may be further covered.
【００１２】この実施形態のチップインダクタ１０によ
れば、導電体パターン１８の形成に際して、大出力のレ
ーザを必要とせず、しかも、微細なパターンを容易に形
成することができる。さらに、レーザ光により物理的に
導電体膜１４に溝１６を形成する場合、導電体のかす
や、除去残り等により、溝が不安定であり、必要以上に
大出力レーザで、幅の広い溝を必要としていた。しかし
この実施形態の場合、小出力のレーザでもレジストの感
光は確実になされ、微細な導電体パターンが可能である
とともに、エッチングもＩＣ技術により、きわめて正確
且つ微細なパターンが高い信頼性の下に可能である。According to the chip inductor 10 of this embodiment, when forming the conductor pattern 18, a high-power laser is not required, and a fine pattern can be easily formed. Further, when the groove 16 is physically formed in the conductor film 14 by laser light, the groove is unstable due to the residue of the conductor or remaining residue, etc. Needed. However, in the case of this embodiment, exposure of the resist is ensured even with a low-power laser, and a fine conductor pattern is possible. Etching is also performed by IC technology to make an extremely accurate and fine pattern with high reliability. It is possible.
【００１３】なお、基材の開口部間の形状は、断面６角
形以外に、断面５角形や３角形でも良く、断面４角形で
基材５２の表面に対して斜めの面を形成したひし形断面
や台形断面のものでも良い。即ち、レーザの照射方向と
平行な側面がなければ良い。また、フォトマスクを用い
た感光も、基材の表面に正確に導電体パターンを形成可
能であれば利用することができる。The shape between the openings of the substrate may be pentagonal or triangular in addition to hexagonal cross-section. Or a trapezoidal cross section may be used. That is, it is only necessary that there is no side surface parallel to the laser irradiation direction. In addition, light exposure using a photomask can also be used as long as a conductor pattern can be accurately formed on the surface of the base material.
【００１４】なおこの発明は、上記実施形態に限定され
るものではなく、インダクタ素子の形成方法は適宜選択
可能であり、導電体パターンも、形成後にインダクタン
スを調整できるものでもよい。また、磁性体膜は、磁性
体塗料以外に、磁性体金属等を磁性体薄膜を蒸着等の方
法により形成するものでも良く、また導電体パターンに
対して、絶縁層を介して磁性体膜を設けたものでも良
い。さらに、磁性体塗料やその他の磁性体膜材料は、適
宜選択可能である。Note that the present invention is not limited to the above embodiment, and the method of forming the inductor element can be appropriately selected, and the conductor pattern may be such that the inductance can be adjusted after the formation. The magnetic film may be formed by depositing a magnetic thin film of a magnetic metal or the like by a method such as vapor deposition in addition to the magnetic paint. It may be provided. Further, the magnetic paint and other magnetic film materials can be appropriately selected.
【００１５】[0015]
【発明の効果】この発明のチップインダクタの製造方法
は、導電体パターンをエッチングレジストを用いて正確
に形成可能であり、しかも微細なパターンも容易に可能
である。また、大出力のレーザを用いる必要もなく、省
エネルギーで、高品質のインダクタを形成することがで
きる。According to the method of manufacturing a chip inductor of the present invention, a conductor pattern can be accurately formed by using an etching resist, and a fine pattern can be easily formed. Also, it is not necessary to use a high-power laser, and an energy-saving and high-quality inductor can be formed.
【図１】この発明の一実施形態のチップインダクタを形
成する基材の平面図である。FIG. 1 is a plan view of a base material forming a chip inductor according to an embodiment of the present invention.
【図２】図１のＡ−Ａ線断面図である。FIG. 2 is a sectional view taken along line AA of FIG.
【図３】この発明の一実施形態のチップインダクタを形
成する基材にパターンを形成した状態の平面図である。FIG. 3 is a plan view showing a state in which a pattern is formed on a base material forming a chip inductor according to an embodiment of the present invention.
【図４】この発明の一実施形態のチップインダクタの断
面図である。FIG. 4 is a sectional view of a chip inductor according to an embodiment of the present invention.
１０ チップインダクタ １２ 基材 １４ 導電体膜 １６ 溝 １８ 導電体パターン ２０，２２ 電極 ２４ 磁性体膜 ２６ 開口部 DESCRIPTION OF SYMBOLS 10 Chip inductor 12 Base material 14 Conductor film 16 Groove 18 Conductor pattern 20, 22 Electrode 24 Magnetic film 26 Opening
Claims (5)
に所定間隔で複数対の開口部を形成し、この各対になっ
た開口部で挟まれる部分の基材の形状を、上記基材表面
に対して垂直方向の面を有しない側面形状にし、この基
材表面に導電体膜を形成し、この基材表面の導電体膜を
エッチングレジストで被覆し、上記開口部間の上記基材
表面のエッチングレジストを感光させて所定の螺旋パタ
ーンを形成し、上記エッチングレジストを螺旋状に残
し、上記螺旋状のエッチングレジストが残った部分以外
の上記導電体膜を除去して、螺旋状の導電体パターンを
形成するチップインダクタの製造方法。A flat insulating base material is provided, a plurality of pairs of openings are formed in the base material at predetermined intervals, and the shape of the portion of the base material sandwiched between the paired openings is defined. Forming a conductive film on the surface of the base material, forming a conductive film on the surface of the base material, covering the conductive film on the surface of the base material with an etching resist, A predetermined spiral pattern is formed by exposing the etching resist on the surface of the base material to a predetermined pattern, leaving the etching resist in a spiral shape, removing the conductive film except for the portion where the spiral etching resist remains, A method of manufacturing a chip inductor for forming a spiral conductor pattern.
により螺旋状に感光させる請求項１記載のチップインダ
クタの製造方法。2. The method for manufacturing a chip inductor according to claim 1, wherein said etching resist is spirally exposed by a laser beam.
に所定間隔で複数対の開口部を形成し、この基材表面に
導電体膜を形成し、この基材表面の導電体膜をエッチン
グレジストで被覆し、上記エッチングレジストを、レー
ザー光により螺旋状に感光させ、上記エッチングレジス
トの感光部以外を螺旋状に残し、上記エッチングレジス
トが除去された部分の上記導電体膜を除去して、螺旋状
の導電体パターンを形成するチップインダクタの製造方
法。3. A flat insulating substrate is provided, a plurality of pairs of openings are formed at predetermined intervals in the substrate, a conductor film is formed on the surface of the substrate, and a conductive film is formed on the surface of the substrate. The body film is covered with an etching resist, the etching resist is helically exposed by a laser beam, and a portion other than the photosensitive portion of the etching resist is helically left, and the conductive film in a portion where the etching resist is removed is removed. A method of manufacturing a chip inductor in which a spiral conductor pattern is formed by removing.
後、個々のチップインダクタに分割する請求項１または
２記載のチップインダクタ。4. The chip inductor according to claim 1, wherein the substrate is divided into individual chip inductors after forming the conductor pattern.
膜により被覆する請求項１，２または３記載のチップイ
ンダクタ。5. The chip inductor according to claim 1, wherein said conductor pattern is covered with an insulating magnetic film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11130340A JP2000323344A (en) | 1999-05-11 | 1999-05-11 | Manufacture of chip inductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11130340A JP2000323344A (en) | 1999-05-11 | 1999-05-11 | Manufacture of chip inductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000323344A true JP2000323344A (en) | 2000-11-24 |
Family
ID=15032052
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11130340A Pending JP2000323344A (en) | 1999-05-11 | 1999-05-11 | Manufacture of chip inductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000323344A (en) |
-
1999
- 1999-05-11 JP JP11130340A patent/JP2000323344A/en active Pending
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