JP2000307118A - Thin film transistor and method of manufacturing the same - Google Patents

Abstract

(57) Abstract: A thin film transistor in which low-resistance aluminum can be used for source and drain electrodes and a method for manufacturing the same are provided. SOLUTION: An ITO pixel electrode 23 is made of a molybdenum alloy and a molybdenum alloy-ITO pixel by forming a source electrode 17 and a drain electrode 16 into a thin film transistor having a three-layer structure of a molybdenum alloy layer 26, an aluminum layer 25, and a titanium layer 24. The electrode contact 27 is formed. Further, in the manufacturing method, the molybdenum alloy layer 26 and aluminum are subjected to collective wet etching removal using a photoresist as a mask with a mixed solution of phosphoric acid, nitric acid, acetic acid, and water, and then titanium, a low resistance semiconductor using the photoresist as a mask. Layer 15, intrinsic semiconductor layer 1
4 is collectively dry-etched to form a thin film transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor for driving a liquid crystal display (LCD) and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, liquid crystal display elements using thin film transistors have been used for portable information terminals and the like because of their great advantages of thinness, light weight and low power consumption.

Hereinafter, a conventional thin film transistor and a method of manufacturing the same will be described with reference to the drawings.

FIG. 3 shows a sectional view of a conventional thin film transistor. 3, reference numeral 11 denotes an insulating substrate, 12 denotes a gate electrode, 13 denotes a gate insulating film, 14 denotes an intrinsic semiconductor layer, 15 denotes a low-resistance semiconductor layer, 16 denotes a drain electrode, and 17 denotes a source electrode.

In the conventional thin film transistor configured as described above, when a voltage is applied to the gate electrode 12 and a channel is formed in the intrinsic semiconductor layer 14, the source electrode 17
Video signal passes through the channel and drain electrode 1
6, and further transmitted to the pixel electrode (not shown),
An image is displayed by adjusting the transmittance by changing the orientation of liquid crystal (not shown) between the pixel electrode and the counter electrode by an electric field between a counter electrode (not shown) facing the pixel electrode in parallel with the pixel electrode.

FIG. 4 is a sectional view showing a conventional method of manufacturing a thin film transistor in the order of steps. In FIG.
The same parts as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted. Reference numeral 18 indicates a chromium film.

First, a gate insulating film 13 is deposited on a gate electrode 12 formed on an insulating substrate 11, and an intrinsic semiconductor layer 14 and a low-resistance semiconductor layer 15 are formed on the gate electrode 12 (FIG. 4 (1)). )). Next, a chromium film 18 is deposited on the low-resistance semiconductor layer 15 (FIG. 4- (2)). Subsequently, the drain electrode 1
6. The source electrode 17 is formed by wet etching (FIG. 4- (3)). Subsequently, the low-resistance semiconductor layer 15 is removed by dry etching to form a thin film transistor (FIG. 4- (4)).

[0008]

However, in the above-described thin film transistor and the method of manufacturing the same, since each electrode material of the source electrode 17 and the drain electrode 16 is formed of the chromium film 18 having a high resistance, a large screen is obtained. There was a problem that could not cope with the refinement. To increase the screen size and increase the definition, it is necessary to use low-resistance aluminum for the source and drain electrodes as signal lines.

FIG. 5 shows a sectional view of a conventional thin film transistor using a two-layered film of chromium and aluminum for a source electrode and a drain electrode. In FIG.
The same parts as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted. Here, 19 is chromium, 20 is aluminum,
21 is an interlayer insulating film, 22 is an aluminum-ITO pixel electrode contact, and 23 is an ITO pixel electrode.

[0010] In the structure shown in FIG.
Are used as the source electrode 17 and the drain electrode 16,
Since the aluminum 20 and the ITO pixel electrode 23 are in direct contact like the aluminum-ITO pixel electrode contact 22, an electrolytic corrosion reaction is caused, and the drain electrode 16 and the ITO
There is a problem that an ohmic contact of the pixel electrode 23 cannot be formed.

In view of the foregoing, an object of the present invention is to provide a thin film transistor in which low-resistance aluminum can be used as source and drain electrodes, and a method of manufacturing the same.

[0012]

In order to achieve the above object, the present invention provides a second metal in which source or drain electrodes are made of aluminum or an alloy containing aluminum as a main component as a signal line; First forming the surface side of
And a third metal forming the back surface side, and after the first and second metals are collectively wet-etched and removed, the high melting point metal, the low-resistance semiconductor layer and the intrinsic semiconductor layer are collectively dry-etched and removed. Thus, a thin film transistor is formed.

With such a configuration and a manufacturing method, the IT
An ohmic contact between the O pixel electrode and the drain electrode can be formed.

[0014]

DETAILED DESCRIPTION OF THE INVENTION The invention according to claim 1 includes a source,
The drain electrode includes a second metal using aluminum or an alloy containing aluminum as a main component as a signal line, a first metal forming a front surface of the second metal, and a third metal forming a back surface of the second metal. Because of the three-layer structure, even when low-resistance aluminum or an alloy containing aluminum as a main component is used as the signal line, the first metal is disposed in the upper layer, so that the first metal is in direct contact with an ITO pixel electrode formed in a later step. The material to be formed can be the first metal, and an ohmic contact between the ITO pixel electrode and the drain electrode can be formed. Further, since the third metal is disposed in the lower layer, the reaction between the low-resistance semiconductor layer and aluminum can be prevented, and the characteristics of the thin film transistor are not deteriorated.

In the method for manufacturing a thin film transistor according to the second and third aspects, the first and second electrodes are formed when the source and drain electrodes are formed.
Since the first metal and the second metal are collectively wet-etched, a thin film transistor can be formed without generating particles or aluminum by-products which are a problem during dry etching.

The invention described in claim 4 is the first, second, and third inventions.
In the above, the first metal material is made of molybdenum or an alloy containing molybdenum as a main component, and has an effect particularly on batch wet etching with aluminum or an alloy containing aluminum as a main component.

The invention according to claim 5 is the invention according to claims 1, 2, 3
In the above, the second metal material is made of aluminum or an alloy containing aluminum as a main component, and has an effect particularly in lowering the resistance of the signal line.

According to a sixth aspect of the present invention, in the first and second aspects, the third metal material is a high melting point metal.
An effect is obtained in that a reaction between the second metal as the signal line and the lower low-resistance semiconductor layer is prevented.

According to a seventh aspect of the present invention, in the second aspect, the wet etching solution is a mixture of phosphoric acid, nitric acid, acetic acid, and water. In particular, the first metal is mainly molybdenum or molybdenum. When the alloy to be formed and the second metal are aluminum or an alloy containing aluminum as a main component, there is an effect in terms of batch wet etching.

(Embodiment 1) FIG. 1 is a sectional view showing the structure of a thin film transistor according to Embodiment 1 of the present invention.

In FIG. 1, the same parts as those in FIG. 3 are denoted by the same reference numerals. That is, the insulating substrate 11, the gate electrode 12, the gate insulating film 13, the intrinsic semiconductor layer 14, the low-resistance semiconductor layer 15, the drain electrode 16, the source electrode 17,
These are an interlayer insulating film 21 and an ITO pixel electrode 23. The other 24 is a titanium layer, 25 is an aluminum layer, 26
Is a molybdenum alloy layer, and 27 is a molybdenum alloy-ITO pixel electrode contact.

The drain electrode 16 has an aluminum layer 25
The molybdenum alloy layer 26 is disposed on the upper layer. Therefore, the ITO pixel electrode 23 and the drain electrode 16 are connected by a molybdenum alloy-ITO pixel electrode contact 27. Therefore, without causing an electrolytic corrosion reaction,
Drain electrode 16 made of low resistance aluminum and IT
An ohmic contact of the O pixel electrode 23 can be formed. Further, a titanium layer 24 is disposed below the aluminum layer 25 in the drain electrode 16. Therefore, the reaction between the aluminum layer 25 and the low-resistance semiconductor layer 15 can be prevented, and the characteristics of the thin film transistor do not deteriorate.

(Embodiment 2) FIG. 2 is a sectional view showing a method of manufacturing a thin film transistor according to Embodiment 2 of the present invention in the order of steps.

First, a gate insulating film 13 is deposited on a gate electrode 12 formed on an insulating substrate 11, and an intrinsic semiconductor layer 14 and a low-resistance semiconductor layer 15 are formed on the gate electrode 12 (FIG. 2- (1) )).

Next, after a titanium layer 24, an aluminum layer 25, and a molybdenum alloy layer 26 are sequentially deposited on the low resistance semiconductor layer 15 (FIG. 2- (2)), a source / drain electrode pattern is formed with a photoresist 28. (Fig. 2-
(3)).

Subsequently, the molybdenum alloy layer 2 is wet-etched using a mixed solution of phosphoric acid, nitric acid, acetic acid and water.
6. The aluminum layer 25 is collectively etched and removed. Since the wet etching selectivity of aluminum and molybdenum alloy of a mixture of phosphoric acid, nitric acid, acetic acid and water is about 1, the molybdenum alloy layer 26 can be formed by one wet etching.
And the aluminum layer 25 can be etched, and the etching can be stopped at the titanium layer 24 (FIG. 2-
(Four)).

Subsequently, using the photoresist 28 as a mask, the titanium layer 24, the low-resistance semiconductor layer 15, and the intrinsic semiconductor layer 14 are collectively removed by dry etching to form a thin film transistor. Then, an interlayer insulating film 21 is deposited, and a molybdenum alloy is deposited. -Forming an ITO pixel electrode contact 27 to form an ITO pixel electrode 23 (FIG. 2- (5));

As described above, since the source and drain electrodes have a three-layer structure of molybdenum alloy / aluminum / titanium, and the molybdenum alloy and aluminum are collectively etched by wet etching, particles and aluminum which are problems when dry etching is used. Source and drain electrodes can be formed without generating by-products.

In this embodiment, aluminum is used as the source and drain electrodes. However, it goes without saying that the same effect can be obtained when an aluminum alloy is used. Although the molybdenum alloy is used as the metal material of the aluminum upper layer, it goes without saying that the same effect can be obtained if molybdenum is used as well as aluminum or a metal material that can be etched with the same etchant as the aluminum alloy. Furthermore, although titanium was used as the metal material of the aluminum lower layer, it goes without saying that a similar effect can be obtained with a high melting point metal material.

[0030]

As described above, according to the present invention,
Since the source and drain electrodes have a three-layer structure of molybdenum alloy / aluminum / titanium and the molybdenum alloy / aluminum are removed by wet etching, ohmic contact between the ITO pixel electrode and the drain electrode can be achieved without generating particles or aluminum by-products. Its practical effect is great because it can be formed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional configuration diagram of a thin film transistor in Embodiment 1 of the present invention.

FIG. 2 is a cross-sectional configuration diagram showing a process order of a method for manufacturing a thin film transistor according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional configuration diagram of a conventional thin film transistor.

FIG. 4 is a cross-sectional configuration diagram showing a process sequence of a conventional method of manufacturing a thin film transistor.

FIG. 5 is a cross-sectional configuration diagram of a conventional thin film transistor when a two-layer film of chromium and aluminum is used for source and drain electrodes.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Insulating substrate 12 Gate electrode 13 Gate insulating film 14 Intrinsic semiconductor layer 15 Low resistance semiconductor layer 16 Drain electrode 17 Source electrode 18 Chromium film 19 Chromium 20 Aluminum 21 Interlayer insulating film 22 Aluminum-ITO pixel electrode contact 23 ITO pixel electrode 24 Titanium Layer 25 Aluminum layer 26 Molybdenum alloy layer 27 Molybdenum alloy-ITO pixel electrode contact 28 Photoresist

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Hiroaki Yonekura 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term (reference) 2H092 HA06 JA24 JA34 JA37 JA41 JA47 MA15 MA18 MA19 NA28 5C094 AA24 AA42 AA43 BA03 BA43 CA19 DA13 DB04 EA04 EA05 FA02 FB02 FB12 FB15 GB10 5F110 AA26 AA30 CC07 EE23 GG35 HK03 HK04 HK06 HK22 HM17 NN02 QQ05

Claims (7)

[Claims] In a thin film transistor provided with a source / drain electrode formed on an insulating substrate so as to intersect a gate electrode, the source / drain electrode is formed of a first metal material, a second metal material, and a third metal. A thin film transistor comprising a material. A step of forming a gate electrode on the insulating substrate; a step of depositing a gate insulating film on the gate electrode; and forming an intrinsic semiconductor layer and a low-resistance semiconductor layer on the gate electrode and the gate insulating film. Forming, depositing three layers of a third metal material, a second metal material, and a first metal material on the low-resistance semiconductor layer; and forming a source on the three-layer film.
Patterning the drain electrode with a photoresist, wet-etching a first metal material and a second metal material using the photoresist pattern as a mask, and forming the photoresist, the first metal material and the second metal A step of collectively dry-etching the third metal material, the low-resistance semiconductor layer, and the intrinsic semiconductor layer using the material as a mask. 3. The method for manufacturing a thin film transistor according to claim 1, wherein the first and second metal materials can be collectively wet-etched with the same etching solution. 4. The thin film transistor according to claim 1, wherein the first metal material is molybdenum or an alloy containing molybdenum as a main component.
A method for manufacturing the thin film transistor according to the above. 5. The method for manufacturing a thin film transistor according to claim 1, wherein the second metal material is aluminum or an alloy containing aluminum as a main component. 6. The method according to claim 1, wherein the third metal material is a high melting point metal. 7. The wet etching step, wherein phosphoric acid,
3. The method according to claim 2, wherein a mixture of nitric acid, acetic acid and water is used.