JP2000305484A - Electro-optical device, method of manufacturing the same, and electronic apparatus - Google Patents

Abstract

(57) Abstract: In an electro-optical device such as a liquid crystal device having a wiring made of a polysilicon thin film, the wiring made of a polysilicon thin film is reduced in resistance to enable high-quality image display. A liquid crystal device includes a liquid crystal layer (50) sandwiched between a pair of substrates, pixel electrodes (9a) provided in a matrix on a TFT array substrate (10), and scanning lines (3).
a) and a capacitance line (3b). By providing a film made of a conductive high melting point metal or its metal silicide or the like in an island shape on the scanning line (3a) and the capacitance line (3b) made of a polysilicon thin film, the wiring is reduced in resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention belongs to a technical field such as an electro-optical device such as a liquid crystal device of an active matrix drive system driven by a thin film transistor (hereinafter referred to as TFT), and a method of manufacturing the same. The present invention belongs to the technical fields such as an electro-optical device such as a liquid crystal device having a wiring made of and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, in a liquid crystal device, a large number of data lines, scanning lines, and capacitance lines intersect in an image display area facing a liquid crystal on a TFT array substrate which is one of a pair of substrates sandwiching the liquid crystal. It is inserted and wired. Further, in a liquid crystal device with a built-in peripheral circuit, peripheral circuits such as a data line driving circuit, a scanning line driving circuit, and a sampling circuit are formed on a TFT array substrate. These peripheral circuits are provided in each pixel portion and are provided with a TF for controlling switching of an image signal applied to each pixel electrode, from the viewpoint of manufacturing efficiency and the like.
It is generally formed by a manufacturing process using the same structure as T (hereinafter, appropriately referred to as pixel TFT).
In addition, input / output wiring of a peripheral circuit is provided in a seal area outside the image display area and facing the seal material for enclosing the liquid crystal and a peripheral area further outside the seal area.
More specifically, as input / output wiring of the peripheral circuit, data lines, scanning lines and lead-out lines from a capacitor line are provided below the seal region, and an image signal line connected to an external input terminal, a control signal Lines, power supply lines, clock signal lines, and the like are provided in the peripheral area.

In particular, in a liquid crystal device having a sampling circuit as a peripheral circuit, when an image signal is supplied to an image signal line via an external input terminal, a sampling circuit drive signal output at a predetermined timing from a data line drive circuit. Each sampling switch of the sampling circuit is configured to sample the image signal for each data line.

Here, data lines, scanning lines, and capacitance lines are
It is desirable that the resistance is low in order to prevent the image quality from deteriorating according to the magnitude of the electric resistance or the time constant of the wiring. For this reason, the data lines are usually formed from a thin metal film such as aluminum. On the other hand, a technique for forming a scanning line or the like from a metal thin film or a metal silicide thin film has not been put into practical use because, in a high-temperature process after the formation of the scanning line, film peeling on the scanning line occurs. Scan lines and capacitance lines are usually formed from a polysilicon thin film. The resistance of the wiring made of the polysilicon thin film is, for example, about 200 times as large as the resistance of the wiring made of the metal thin film, and the time constant is also about the same. Therefore, it is particularly desired to reduce the electric resistance of the scanning line and the capacitance line made of the polysilicon thin film.

Similarly, since the image signal line is a signal line for supplying an image signal itself for defining the liquid crystal applied voltage, its low electric resistance and time constant are extremely important for preventing image quality deterioration. Become. For this reason, the image signal line is formed from a metal thin film such as aluminum which has the lowest resistance among thin films in a TFT active matrix type liquid crystal device and is usually used for forming a data line.

In a liquid crystal device with a built-in peripheral circuit, if there is only one image signal line, the level from the external input terminal provided at the end of the substrate to each sampling switch of the sampling circuit is at the same layer level on the substrate. It is possible to perform wiring by using a certain metal thin film (that is, formed by the same process). However, for example, in the case where a plurality of image signal lines are required in accordance with the number of phase expansions for an image signal which is phase expanded to correspond to high-frequency driving in a liquid crystal device, or an image signal line for each color for an RGB color image signal is required. In the case where a plurality of image signal lines are required, at least one image signal line must cross some other image signal line somewhere before reaching each sampling switch. That is, it is impossible to wire all of the plurality of image signal lines by using only the metal thin films on the same layer level. For this reason, the metal thin film is dealt with by using a polysilicon film at another level as a relay wiring via an interlayer insulating film. More specifically, at the intersection, one of the wirings is configured as a first wiring portion (main wiring) made of a metal thin film. The other wiring is formed of a metal thin film through contact holes opened before and after the intersection so as to three-dimensionally cross below or above the first wiring portion via an interlayer insulating film. It is configured as a second wiring portion (relay wiring) made of a polysilicon thin film electrically connected to the portion. If only the intersecting portion is a relay wire made of a polysilicon thin film and the other portion is a main wire made of a metal thin film relayed by the relay wire, the length of the relay wire made of the polysilicon thin film is as follows. Since it is very short, the rise of the resistance and the time constant of the entire image signal line due to the presence of the relay wiring made of the polysilicon thin film hardly causes a practical problem.

[0007]

As described above, the electrical resistance of a scanning line and a capacitance line made of a polysilicon thin film is as follows.
Since the resistance is higher than the resistance of the wiring made of a metal thin film, it is particularly desired to reduce the electric resistance.

[0008] Under the recent general demand for improving the image quality, the driving frequency of liquid crystal devices such as the so-called XGA system, SXGA system, and EWS system has been increasingly increased. For example, the number has increased considerably, such as 24-phase development. However, when a large number of phases are developed in this manner, the number of image signal lines arranged in parallel naturally increases, and accordingly, the length of the relay wiring using the polysilicon thin film increases. Here, since the wiring resistance increases in proportion to the length, the wiring resistance of the relay wiring increases, and as a result, the resistance and the time constant of the image signal line increase, causing deterioration in image quality. become.
For example, when the resistance or the time constant of the image signal line increases, the potential of the image signal fluctuates due to an increase in the coupling capacitance, or the image signal for the previous line (column) is written in the next line (column). There is a problem that ghost and crosstalk rarely occur.

If the relay wiring in the seal region and the peripheral region is formed separately from a metal thin film or the like which is not used in the pixel portion, the manufacturing efficiency in the manufacturing process using the planar technology is reduced and the cost is increased. As a result, the basic advantages of the liquid crystal device with a built-in peripheral circuit may be lost.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described problems. In an electro-optical device having a wiring made of a polysilicon thin film, the electric resistance of the wiring made of a polysilicon thin film can be reduced, and a high quality image can be obtained. It is an object to provide an electro-optical device capable of displaying, a manufacturing method thereof, and the like.

[0011]

According to a first aspect of the present invention, there is provided a first electro-optical device comprising an electro-optical material sandwiched between a pair of substrates, and a first electro-optical device disposed on one of the pair of substrates. Has a plurality of pixel electrodes arranged in a matrix,
A plurality of thin film transistors that respectively drive the plurality of pixel electrodes, and a plurality of data lines and a plurality of scanning lines connected to the plurality of thin film transistors and intersecting with each other, and on a wiring made of a silicon thin film, A film made of a conductive high melting point metal or its metal silicide is provided in an island shape.

According to the first electro-optical device of the present invention, a conductive film having a high melting point or a metal silicide thereof is provided in an island shape on a wiring made of a silicon thin film.
The stress between the wiring made of a silicon thin film and the underlying film can be relieved, and the resistance of the wiring can be reduced at the same time. If a film of a high melting point metal or the like is continuously formed on the entire surface of the wiring instead of an island shape, the adhesion of the high melting point metal or the like is poor.

According to one aspect of the first electro-optical device of the present invention, the electro-optical device further includes a storage capacitor connected to the pixel electrode, and a capacitor line of the storage capacitor, wherein the scanning line and the capacitor line are formed of polysilicon. A film made of a conductive high-melting metal or its metal silicide is provided in an island shape on at least one of the scanning line and the capacitance line made of the thin film of polysilicon.

According to this aspect, the resistance of the scanning line and the capacitance line made of the polysilicon thin film can be reduced. Note that it is preferable to provide a film of a high melting point metal or the like in an island shape on both the scanning line and the capacitance line. In the case of an electro-optical device having a data line made of a polysilicon thin film, it goes without saying that a film made of a high melting point metal or the like can be provided in an island shape on the data line.

According to a second aspect of the invention, an electro-optical device is provided in which an electro-optic material is sandwiched between a pair of substrates, and one of the pair of substrates is arranged in a matrix. A plurality of pixel electrodes arranged, a plurality of thin film transistors respectively driving the plurality of pixel electrodes, a plurality of data lines and a plurality of scanning lines respectively connected to the plurality of thin film transistors and intersecting with each other, and at least the data A peripheral circuit for supplying an image signal to a line; and a peripheral wiring for inputting and outputting a predetermined type of signal including the image signal to and from the peripheral circuit. A main wiring portion made of a first conductive film constituting
A relay wiring portion made of a second conductive film constituting the scanning line, and a film made of a conductive high melting point metal or a metal silicide thereof is formed on the relay wiring portion made of the second conductive film in an island shape. Is provided.

According to the second electro-optical device of the present invention, the peripheral circuit such as the sampling circuit and the data line driving circuit is provided on one of the substrates.
Peripheral circuit built-in type. The peripheral wiring includes a main wiring portion made of a first conductive film (for example, a metal thin film forming a data line such as aluminum) forming a data line;
And a relay wiring portion made of a second conductive film (polysilicon thin film) constituting a scanning line. Here, when a film made of a conductive high melting point metal or its metal silicide is provided in an island shape on the relay wiring portion made of the second conductive film (polysilicon thin film), the second conductive film (polysilicon thin film) , And the resistance of the peripheral wiring can be reduced.

As a result, various signals such as image signals in the peripheral circuit are input / output by the low-resistance peripheral wiring, so that the driving frequency of the electro-optical device is increased, and furthermore, the number of phase expansions and parallel input are performed. Even if the number of image signals is increased, potential fluctuation due to capacitive coupling in peripheral wiring such as image signal lines as in the conventional example described above, ghost,
Crosstalk and the like are reduced, and high-quality image display can be performed.

The first conductive film (metal thin film) constituting the data line is included in the plurality of thin film layers constituting the electro-optical device.
Or the second conductive film (polysilicon thin film) constituting the scanning line
In addition, when other metal thin films or other polysilicon thin films exist, it is needless to say that these other thin films can be used as the first conductive film and the second conductive film.

In one embodiment of the first and second electro-optical devices of the present invention, the conductive high melting point metal or its metal silicide is W (tungsten), Ti (titanium),
A single metal or alloy containing at least one of Cr (chromium), Ta (tantalum), Mo (molybdenum), Pb (lead), or a metal silicide thereof is used.

These refractory metals and metal silicides thereof are particularly suitable for relieving stress and stress between a wiring made of a polysilicon thin film and a base film, thereby reducing the resistance of the wiring.

According to a first method of manufacturing an electro-optical device of the present invention, in order to solve the above-mentioned problems, an electro-optical material is sandwiched between a pair of substrates. A plurality of pixel electrodes arranged in a matrix, a plurality of thin film transistors respectively driving the plurality of pixel electrodes, a plurality of data lines and a plurality of scanning lines which are respectively connected to the plurality of thin film transistors and cross each other, In a method of manufacturing an electro-optical device including a storage capacitor connected to the pixel electrode and a capacitance line of the storage capacitor, the method includes forming a conductive high melting point metal or a metal silicide thereof on a wiring made of a polysilicon thin film. Providing a film in an island shape.

According to the first method of manufacturing an electro-optical device of the present invention, a conductive high melting point metal is formed on a wiring (for example, a scanning line, a capacitance line, a peripheral relay wiring, etc.) made of a polysilicon thin film. Alternatively, a film made of the metal silicide can be provided in an island shape. In this case, scanning lines on the same layer,
After simultaneously forming the capacitance line and the peripheral relay wiring from the polysilicon thin film, a film made of a conductive high melting point metal or its metal silicide can be simultaneously provided on these wirings in an island shape. Alternatively, an increase in the number of steps can be avoided by laminating a polysilicon thin film and a film made of a conductive high melting point metal or a metal silicide thereof and then patterning the laminated film at the same time.

An electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention. Therefore, it is possible to realize various electronic devices including the electro-optical device capable of displaying a high-quality image with high manufacturing efficiency.

The semiconductor device of the present invention has at least a wiring made of a polysilicon thin film, and a conductive high melting point metal or a film made of the metal silicide is provided in an island shape on the wiring made of the polysilicon thin film. ing.

According to the semiconductor device of the present invention, a film made of a conductive high melting point metal or a metal silicide thereof is provided in an island shape on a wire made of a polysilicon thin film, so that the wiring made of the polysilicon thin film and the wiring made of the polysilicon thin film can be formed. The stress with the ground film can be reduced, and the resistance of the wiring can be reduced at the same time.

The operation and other advantages of the present invention will become more apparent from the embodiments explained below.

[0027]

Embodiments of the present invention will be described below with reference to the drawings. In the embodiments of the present invention, a liquid crystal device will be described as an example of the electro-optical device.

(Structure and Operation of Liquid Crystal Device) The structure and operation of the liquid crystal device according to the embodiment of the present invention will be described with reference to FIGS.

First, the circuit configuration of the liquid crystal device will be described with reference to the block diagram of FIG.

FIG. 1 shows an equivalent circuit such as various elements and wirings in a plurality of pixels formed in a matrix forming an image display area on a TFT array substrate of a liquid crystal device, and a peripheral circuit located around the image display area. Is shown.

In FIG. 1, a plurality of pixels formed in a matrix forming an image display area of the liquid crystal device according to the present embodiment are provided with TFTs 3 for controlling a pixel electrode 9a.
A plurality of 0s are formed in a matrix, and the data line 6a to which an image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data line 6a may be supplied line-sequentially in this order, but in the present embodiment, in particular, the image signals S1, S2
2,..., Sn are developed in N (where N is a natural number of 2 or more) phases, and supplied from N image signal lines 115 to N data lines 6a adjacent to each other for each group. It is configured.

The scanning lines 3a are electrically connected to the gates of the TFTs 30, and the scanning signals G1, G2,..., Gm are applied to the scanning lines 3a in a pulsed manner in this order at a predetermined timing. It is configured to be. The pixel electrode 9a is electrically connected to the drain of the TFT 30. By closing the switch of the TFT 30, which is a switching element, for a certain period, the image signals S1, S2,... Write at a predetermined timing. The image signal S of a predetermined level written in the liquid crystal as the electro-optical material through the pixel electrode 9a
1, S2,..., Sn are held for a certain period of time between a counter electrode (described later) formed on a counter substrate (described later). The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gray scale display. In the normally white mode, the incident light cannot pass through the liquid crystal portion according to the applied voltage. In the normally black mode, the incident light passes through the liquid crystal portion according to the applied voltage. The liquid crystal device emits light having a contrast corresponding to the image signal as a whole. Here, in order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. For example, the voltage of the pixel electrode 9a is set to be three times longer than the time during which the source voltage is applied.
It is held by 0. Thereby, the holding characteristics are further improved, and a liquid crystal device having a high contrast ratio can be realized.
As a method of forming the storage capacitor 70, it goes without saying that the capacitor line 3b, which is a wiring for forming the capacitor, may be provided, or the capacitor may be formed between the storage line 70 and the preceding scanning line 3a. No.

In this embodiment, in particular, as described in detail later, W (tungsten), Ti (titanium), Cr (chromium), and Ta (tantalum) are formed in an island shape on the scanning lines 3a and the capacitance lines 3b. ), Mo (molybdenum) and Pb
Since the resistance of these wirings is reduced by a single metal or alloy containing at least one of (lead) or a metal silicide thereof (hereinafter, appropriately referred to as a high melting point metal or the like), the image quality of the liquid crystal device is reduced. Improvement is achieved.

In FIG. 1, the liquid crystal device drives the data line 6a as an example of a peripheral circuit around an image display area on the TFT array substrate on which the data line 6a, the scanning line 3a, etc. are formed as described above. Data line drive circuit 10
1. A scanning line driving circuit 104 for driving the scanning line 3a and a sampling circuit 103 for sampling an image signal are provided. Further, around the image display area, as an example of peripheral wiring, N image signal lines 115 for supplying the above-described N-phase expanded image signals S1, S2,... Wired.

An image signal S developed by an N-phase from a control circuit (not shown) via an external input terminal is connected to the image signal line 115.
1, S2,..., Sn are supplied. Number of this phase development (N)
For example, if the sampling capability of the sampling circuit 103 is relatively high, three-phase expansion, 6
If phase expansion or the like is sufficient and the sampling ability is relatively low, 12-phase expansion, 24-phase expansion and the like are preferable.

Here, in this embodiment, as will be described in detail later, the length is increased according to the number of phase expansions (N), that is, the number (N) of the image signal lines 115 (from each image signal line 115, the image display area). The resistance of the wiring portion that intersects the lower part of the other image signal line 115 on the nearer side is reduced by an island-shaped refractory metal or the like. The number of phase expansions (N) (the number of the image signal lines 115) can be increased while effectively suppressing the increase, so that the driving frequency of the liquid crystal device can be increased without deteriorating the image quality. The number of phase expansions (N) is a multiple of 3 in consideration of the fact that the color image signal is composed of signals related to three colors (red, blue, and yellow).
This is preferable for simplifying control and circuits when performing video display such as SC display and PAL display.

Even without performing the phase expansion as described above, RGB
In the case where a plurality of image signal lines are provided as in the case of the color image signal described above, the structure related to the low-resistance relay wiring and the like in the present embodiment described below is effective.
Further, a serial-parallel conversion circuit can be used instead of the phase expansion circuit.

Further, in the present embodiment, as will be described later in detail, the data line driving circuit 101 and the sampling circuit 103
, The resistance of the sampling circuit drive signal line 114 can be reduced.

The data line driving circuit 101 adjusts the sampling circuit driving signal line 114 in accordance with the scanning line driving circuit 104 sequentially sending the gate voltage to the scanning line 3a in a pulsed manner.
And supplies a sampling circuit drive signal to a control terminal of each sampling switch 103a included in the sampling circuit 103 via the. The sampling circuit 103 samples the image signal on the image signal line 115 according to the sampling circuit drive signal and supplies the sampled image signal to the data line 6a.

Each of the sampling switches 103a constituting the sampling circuit 103 is preferably an n-channel type, a p-channel type, which can be manufactured by the same manufacturing process as the TFT 30 in the pixel portion from the viewpoint of manufacturing efficiency and the like.
It is composed of a TFT of a complementary type or the like.

Next, the configuration of the pixel portion in the image display area of the liquid crystal device will be described with reference to FIGS. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light-shielding film, and the like are formed, and FIG. It is. In FIG. 3, the scale of each layer and each member is different so that each layer and each member have a size that can be recognized in the drawing.

In FIG. 2, a plurality of transparent pixel electrodes 9a are arranged in a matrix on a TFT array substrate of a liquid crystal device.
(The outline is indicated by a dotted line portion 9a ′), and the data line 6a, the scanning line 3a, and the capacitor line 3b are provided along the vertical and horizontal boundaries of the pixel electrode 9a.
The data line 6a is electrically connected to a later-described source region of the semiconductor layer 1a such as a polysilicon film via the contact hole 5, and the pixel electrode 9a is connected to a later-described source region of the semiconductor layer 1a via the contact hole 8. Is electrically connected to the drain region. The scanning line 3a is arranged so as to face a channel region described later in the semiconductor layer 1a. The first light-shielding film 11a in the pixel portion is provided in a region indicated by oblique lines rising to the right in the drawing. That is, the first light-shielding film 11a is provided in the pixel portion at a position covering each TFT including the channel region of the semiconductor layer 1a as viewed from the TFT array substrate side. The first light-shielding film 11
a covers the channel region of the semiconductor layer 1a, the pixel TF
Although the function of preventing light leakage at T is exhibited, the first light-shielding film 11a is provided with a wiring function for keeping the potential at a constant potential, and the opening area of the pixel portion (that is, the area through which light is transmitted) is defined. For such reasons, the first light-shielding film 11a is provided in a striped shape along the scanning line 3a.

In this embodiment, particularly, as shown in FIG. 4, the resistance of these wirings is reduced by a high melting point metal or the like 80 formed in an island shape on the scanning lines 3a and the capacitance lines 3b.

As shown in FIG. 3, the liquid crystal device comprises a TFT array substrate 10 which is an example of one transparent substrate, and a counter substrate 20 which is an example of the other transparent substrate disposed opposite to the TFT array substrate 10. It has. TFT array substrate 10
Is made of, for example, a quartz substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate. TFT array substrate 10
Is provided with a pixel electrode 9a, and above it,
Alignment film 16 that has been subjected to a predetermined alignment treatment such as a rubbing treatment
Is provided. The pixel electrode 9a is made of, for example, a transparent conductive thin film such as an ITO film (indium tin oxide film). The alignment film 16 is made of, for example, an organic thin film such as a polyimide thin film.

On the other hand, a counter electrode (common electrode) 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 on which a predetermined alignment process such as a rubbing process is performed is provided below the counter electrode. Is provided. The counter electrode 21 is, for example, I
It is made of a transparent conductive thin film such as a TO film. Also, the alignment film 22
Consists of an organic thin film such as a polyimide thin film.

As shown in FIG. 3, each pixel electrode 9a is provided on the TFT array substrate 10 at a position adjacent to each pixel electrode 9a.
Pixel switching TFT3 for switching control of a
0 is provided.

As shown in FIG. 3, the opposing substrate 20 is provided with a second light-shielding film 23 in a region other than the opening region of each pixel. For this reason, incident light from the side of the counter substrate 20 is applied to the channel region 1 a ′ or the LDD (Lightly Doped Drain) region 1 of the semiconductor layer 1 a of the pixel switching TFT 30.
It does not invade b and 1c. Further, the second light shielding film 2
Reference numeral 3 has functions such as improvement of contrast and prevention of color mixture of coloring materials.

A sealing material 52 to be described later is provided between the TFT array substrate 10 and the opposing substrate 20, which are configured as described above and are arranged so that the pixel electrode 9a and the opposing electrode 21 face each other.
Liquid crystal is sealed in a space surrounded by (see FIGS. 6 and 7 and FIGS. 15 and 16), and a liquid crystal layer 50 is formed. The liquid crystal layer 50 assumes a predetermined alignment state by the alignment films 16 and 22 (see FIG. 3) in a state where no electric field is applied from the pixel electrode 9a. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several kinds of nematic liquid crystals are mixed. The sealing material 52 is an adhesive made of, for example, a photo-curing resin or a thermosetting resin for bonding the two substrates 10 and 20 around the periphery thereof, and is used for setting a distance between the two substrates to a predetermined value. Spacers such as glass fibers or glass beads are mixed.

As shown in FIG. 3, the pixel switching T
First light-shielding films 11a are provided between the TFT array substrate 10 and the pixel switching TFTs 30 at positions facing the FTs 30, respectively. First light shielding film 11
a is preferably an opaque refractory metal Ti, C
It is composed of a simple metal, an alloy, a metal silicide, or the like containing at least one of r, W, Ta, Mo, and Pb. With such a material, the first light-shielding film 11a is not broken or melted by the high-temperature treatment in the step of forming the pixel switching TFT 30 performed after the step of forming the first light-shielding film 11a on the TFT array substrate 10. Can be. Since the first light-shielding film 11a is formed, return light and the like from the side of the TFT array substrate 10 are transmitted to the channel region 1a 'of the pixel switching TFT 30 or the LDD.
The incident on the regions 1b and 1c can be prevented beforehand, and the pixel switching TFT 30
Does not deteriorate.

Further, a first interlayer insulating film 12 is provided between the first light shielding film 11a and the plurality of pixel switching TFTs 30.
Is provided. The first interlayer insulating film 12 is provided for electrically insulating the semiconductor layer 1a constituting the pixel switching TFT 30 from the first light-shielding film 11a. Further, the first interlayer insulating film 12 is formed on the TFT array substrate 1.
By being formed on the entire surface of 0, it also has a function as a base film for the pixel switching TFT 30. That is, the pixel switching TFT 3 may be roughened during polishing of the surface of the TFT array substrate 10 or stains remaining after cleaning.
0 has the function of preventing the deterioration of the characteristic. The first interlayer insulating film 12 is made of, for example, NSG (non-silicate glass),
It is made of a highly insulating glass such as PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), a silicon oxide film, a silicon nitride film, or the like. The first interlayer insulating film 12 can prevent the first light-shielding film 11a from contaminating the pixel switching TFT 30 and the like.

In this embodiment, the gate insulating film 2 provided between the gate electrode 3a and the semiconductor layer 1a is used as a dielectric film extending from a position facing the gate electrode 3a.
The storage capacitor 70 is formed by extending the semiconductor film 1a to form a first storage capacitor electrode 1f, and further forming a part of the capacitor line 3b opposed thereto as a second storage capacitor electrode.
More specifically, the high concentration drain region 1e of the semiconductor layer 1a
Is provided below the data line 6a and the scanning line 3a, and is disposed opposite the capacitor line 3b extending along the data line 6a and the scanning line 3a with the insulating film 2 interposed therebetween. 1f. In particular, since the insulating film 2 as a dielectric of the storage capacitor 70 is nothing but the gate insulating film 2 of the TFT 30 formed on the polysilicon film by high-temperature oxidation, it can be a thin and high withstand voltage insulating film. The capacitor 70 can be configured as a large-capacity storage capacitor with a relatively small area.

In this embodiment, in particular, as shown in FIG. 5, a high melting point metal or the like 80 formed in the shape of an island on the wiring constituting the scanning line 3a and the capacitance line 3b is used to reduce the resistance of these wirings. Therefore, the image quality of the liquid crystal device is improved.

In FIG. 3, the pixel switching TFT
Numeral 30 has an LDD (Lightly Doped Drain) structure, and includes a scanning line 3a (gate electrode), a channel region 1a 'of a semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a, a scanning line 3a and a semiconductor. A gate insulating film 2 for insulating the layer 1a, a data line 6a (source electrode), a low-concentration source region (source-side LDD region) 1b and a low-concentration drain region (drain-side LDD region) 1c of the semiconductor layer 1a,
The semiconductor layer 1a includes a high-concentration source region 1d and a high-concentration drain region 1e. A corresponding one of the plurality of pixel electrodes 9a is connected to the high-concentration drain region 1e. As will be described later, the source regions 1b and 1d and the drain regions 1c and 1e
It is formed by doping a predetermined concentration of n-type or p-type dopant depending on whether a type or p-type channel is formed. An n-type channel TFT has the advantage of a high operating speed, and is often used as a pixel switching TFT 30 that is a pixel switching element. In the present embodiment, the data line 6a is formed of a light-shielding thin film such as a metal film of Al or the like or an alloy film of metal silicide or the like. Further, a second interlayer insulating film 4 is formed on the scanning line 3a, the gate insulating film 2, and the first interlayer insulating film 12, and the second interlayer insulating film 4 and the gate insulating film 2 are formed.
A contact hole 5 leading to the high concentration source region 1d
And a contact hole 8 leading to the high-concentration drain region 1e. The data line 6a is electrically connected to the high-concentration source region 1d via the contact hole 5 to the high-concentration source region 1d. Further, a third interlayer insulating film 7 having a contact hole 8 to the high-concentration drain region 1e is formed on the data line 6a and the second interlayer insulating film 4. This high concentration drain region 1
The pixel electrode 9a is electrically connected to the high-concentration drain region 1e through the contact hole 8 to e. The above-described pixel electrode 9a is provided on the upper surface of the third interlayer insulating film 7 configured as described above.

The pixel switching TFT 30 preferably has an LDD structure as described above, but may have an offset structure in which impurity ions are not implanted into the low-concentration source region 1b and the low-concentration drain region 1c. A self-aligned TFT in which impurity ions are implanted at a high concentration using 3a as a mask to form high-concentration source and drain regions in a self-aligned manner may be used.

In this embodiment, a single gate structure in which only one gate electrode (scanning line 3a) of the pixel switching TFT 30 is arranged between the source-drain regions 1d and 1e is used. The above gate electrodes may be provided. At this time, the same signal is applied to each gate electrode. As described above, when a dual gate (double gate) or triple gate or more is used, T
When the FT is formed, leakage current at the junction between the channel and the source-drain region can be prevented, and the off-state current can be reduced. If at least one of these gate electrodes has an LDD structure or an offset structure, the off-state current can be further reduced, and a stable switching element can be obtained.

Here, in general, the polysilicon layers such as the channel region 1a ', the low-concentration source region 1b and the low-concentration drain region 1c of the semiconductor layer 1a have a photocurrent due to the photoelectric conversion effect of the polysilicon when light enters. Occurs, and the transistor characteristics of the pixel switching TFT 30 deteriorate. However, in the present embodiment, the data line 6a is formed of a light-shielding metal thin film such as Al so that the scanning line 3a overlaps from above. , At least the semiconductor layer 1a
Can be effectively prevented from being incident on the channel region 1a 'and the LDD regions 1b and 1c. Further, as described above, since the first light-shielding film 11a is provided below the pixel switching TFT 30, at least the channel region 1a 'and the LDD region 1b of the semiconductor layer 1a are formed.
It is possible to effectively prevent the return light from entering c.

In this embodiment, particularly, the light shielding film 11a
Is electrically connected to a constant potential source, and the first light shielding film 11a
Is a constant potential. Therefore, the potential fluctuation of the first light-shielding film 11a does not adversely affect the pixel switching TFT 30 that is disposed to face the first light-shielding film 11a. In this case, as the constant potential source, a constant potential source such as a negative power supply or a positive power supply supplied to a peripheral circuit (eg, a scanning line driving circuit, a data line driving circuit, a sampling circuit, etc.) for driving the liquid crystal device. In this embodiment, the first light-shielding film 11a is connected to a negative power supply of the scanning line driving circuit. By using a power supply such as a peripheral circuit, the first light-shielding film 11a can be set at a constant potential without providing a dedicated potential wiring or an external input terminal. When the first interlayer insulating film 12 is sufficiently thick, the first light-shielding film may be formed in an island shape for each pixel unit so as to be electrically floating.

Next, the input / output wiring or the peripheral wiring in the peripheral circuit of the liquid crystal device will be described with reference to FIGS.

FIG. 6 is a partial plan view of a TFT array substrate provided with peripheral wirings, FIG. 7 is an enlarged plan view showing the relay wiring and lead-out wiring portions of FIG. 6 in an enlarged manner, and FIG. FIG. 9 is a sectional view taken along the line BB ′ of FIG. 6 and FIG.
It is DD 'sectional drawing of FIG. 6 and FIG.

In FIG. 6, the TFT substrate array substrate 10
A scanning line driving signal line 105a is wired to a scanning line driving circuit 104 from a mounting terminal 102 provided in a peripheral portion of the semiconductor device, and a sealing area in which a data line driving circuit 101 and a sealing material 52 for enclosing liquid crystal are arranged. A plurality of image signal lines 115 are wired in a direction along the scanning line in a region between the two.

As shown in FIGS. 6 and 7, the sampling circuit 103 includes a peripheral portion provided on the opposing substrate 20 for separating the image display region from the outside of the image display region inside the seal region. It is arranged below a third light-shielding film 53 (a hatched area rising to the right in the figure) as a parting-off. Under the seal region on the extension of the data line 6a, a lead line 301 including a lead line 301a for the sampling circuit drive signal line 114 from the data line drive circuit 101 and a lead line 301b from the image signal line 115 is provided. ing. On the other hand, the scan line driving circuit 10 is located below the seal area on the extension of the scan line 3a.
4 is provided with a lead-out line 402 for scanning lines. The lead wiring 402 includes a counter electrode (common electrode) potential wiring 112 at an end thereof. The counter electrode potential wiring 112 is formed by the upper and lower conductive terminals 106 a and the upper and lower conductive materials 1.
The counter electrode 21 formed on the counter substrate 20 via
(See FIG. 3). Further, an inspection terminal 111 for inputting a signal for a predetermined inspection to the data line driving circuit 101 may be provided adjacent to the data line driving circuit 101.

As shown in the sectional view taken along the line BB 'of FIG. 8, the image signal line 115 as an example of the peripheral wiring is formed of a metal film (first film) such as Al formed in the same step as forming the data line 6a.
The conductive film is formed as a single wiring from a single conductive film. On the other hand, the relay wiring 116 extending from the image signal line 115 as another example of the peripheral wiring to the lead-out wiring 301b is formed of the same film as the polysilicon film forming the scanning line 3a, and the corresponding image is formed via the contact hole 305. Signal line 11
5 is electrically connected to the second conductive film 116a. A high melting point metal or the like 80 is formed in an island shape on the relay wiring 116 made of the polysilicon film, and the resistance of the relay wiring 116 is reduced by the high melting point metal 80 or the like. Similarly, in order to further reduce the resistance of the lead-out wiring 301b, the lead-out wiring 301b is connected to a wiring made of a polysilicon film through a contact hole (double wiring) and is placed on the wiring made of the polysilicon film. The high melting point metal or the like 80 may be formed in an island shape.

As described above, by lowering the resistance of the relay wiring 116, the liquid crystal device can be changed to XGA, SXGA,
The time constant of the image signal line 115 including the relay wiring 116 is reduced even if the number of phase expansions (N) and the number (N) of the image signal lines 115 are increased by configuring as a model having a high driving frequency such as EWS. , Potential fluctuation, crosstalk, ghost and the like can be reduced.

On the other hand, in FIG. 6 and FIG. 7, since the image signal line 115 is composed of an Al film formed on the second interlayer insulating film 4, the data line driving circuit 1 intersects the Al film.
Also, the sampling circuit drive signal line 114 extending from 01 to the extraction wiring 301 (301a) cannot be made of an Al film, as in the case of the relay wiring 116 shown in FIG. For this reason, a three-dimensional relay wiring as shown in FIG. 9 that passes under the image signal line 115 is required for the sampling circuit drive signal line. In addition, the relay wiring needs to be contrived to reduce the time constant as much as possible.

In FIG. 9, the relay wiring 116d is made of the same polysilicon film as the scanning line 3a, and passes under the second interlayer insulating film 4 so as to cross the image signal line 115. In FIG. 9, the sampling circuit drive signal line 114 on the data line drive circuit 101 side and the lead-out wiring 3 on the seal region side are provided via contact holes formed in the second interlayer insulating film 4 on both sides of the image signal line 115.
01a (see FIG. 7). Then, similarly to FIG. 8, by forming the high melting point metal or the like 80 in an island shape on the relay wiring 116d made of a polysilicon film, the resistance of the relay wiring 116d can be reduced.

The sampling circuit drive signal line 114 shown in FIGS. 6 and 7 is connected to the lead-out line 3 shown in FIG.
Similarly to 01b, in order to further reduce the resistance of the sampling circuit drive signal line 114, the sampling circuit drive signal line 114 is connected to a wiring made of a polysilicon film through a contact hole (double wiring), and a high voltage is formed on the wiring made of the polysilicon film. The melting point metal or the like 80 may be formed in an island shape. With this configuration,
An increase in the resistance and time constant of the sampling circuit drive signal line 114 can be suppressed, and the present invention can be applied to high-frequency drive.

In this embodiment, the structure shown in the sectional view taken along the line BB 'of FIG. 10 may be used instead of the structure shown in the sectional view taken along the line BB' of FIG. In FIG. 10, an image signal line 115, which is an example of a peripheral wiring, is formed as a single wiring from a metal film (first conductive film) such as Al alone formed in the same step as forming the data line 6a. On the other hand, from the image signal line 115 as another example of the peripheral wiring,
A second conductive film 116a, which is formed of the same film as the polysilicon film forming the scanning line 3a and is electrically connected to the corresponding image signal line 115 through the contact hole 305, Third conductive film 11 formed of the same film as light-shielding film 11a and electrically connected to relay wiring 116a through contact hole 305.
6b has a double wiring structure in which wiring is doubled in the thickness direction of the TFT array substrate. In addition, the lead wiring 30
In order to further reduce the resistance of 1b, a second conductive film 116a 'and a third conductive film 116b' may be provided and electrically connected to the lead wiring 301b via a contact hole.
8, a high melting point metal 80 or the like is formed in an island shape on the relay wiring 116a.

In the embodiment shown in FIG. 10, in addition to the second conductive film 116a made of a polysilicon film or the like and the high melting point metal 80 formed in an island shape thereon, the second conductive film 116a is made of the same film as the first conductive light shielding film. The formed third conductive film 116b forms a relay wiring, and the resistance of the relay wiring is further reduced by the relay wiring 116 having the double wiring structure. More specifically, the first light shielding film is made of W, Ti, Cr, Ta, Mo, and P.
Since it is formed of a conductive high-melting metal film containing b or the like, the resistance of the relay wiring 116 in the direction along the wiring can be controlled by the sheet resistance of the first light shielding film. That is,
For example, the polysilicon film has a sheet resistance of about 25 Ω / □ when the film thickness is 3000 angstroms. It has a resistance of about 200 KΩ and has a wiring time constant of, for example, about tens of microseconds.
It can be reduced to about seconds. Therefore, the relay wiring 11 crossed under the image signal line 115
6 and the image signal line 115 can reduce potential fluctuation, crosstalk, ghost, and the like in both wirings. In particular, the liquid crystal device is configured as a model having a high driving frequency such as XGA, SXGA, or EWS as described above, and the number of phase expansions (N) and the image signal lines 115 are set.
Even if the number (N) is increased, the time constant of the image signal line 115 including the relay wiring 116 is sufficiently small, so that the occurrence of potential fluctuation, crosstalk, ghost, and the like can also be reduced.

In addition to this, as can be seen from FIG. 10, the second conductive film 116a and the third conductive film 116b
Thus, a redundant structure is realized in which even if one of them is disconnected in the middle, conduction can be obtained on the other. In addition, the second conductive film 116
Even if a and the third conductive film 116b penetrate the first interlayer insulating film 12 and are short-circuited to each other, it does not become a defective product. Therefore, according to the embodiment shown in FIG. 10, it is possible to realize a liquid crystal device having a low defective product rate and capable of displaying a high-quality image with high reliability. In addition, since the first light-shielding film for shielding the pixel TFT is used in constructing the relay wiring 116, the present invention does not substantially impair the manufacturing efficiency in the later-described manufacturing process.

Further, as shown in FIG. 10, the lead wiring portion 301b of the data line 6a under the seal region is
The conductive film 116a 'and the third conductive film 116b' are provided as redundant wirings and have a triple wiring structure. Therefore,
The wiring is extremely low-resistance, and as shown in FIG. 7, the wiring is electrically connected to each other at a plurality of locations below the seal region by the contact hole 305, so that the redundancy is increased. As a result, the reliability of the lead wiring 301b is very high. Note that the same effect can be obtained even if a double wiring structure in which a wiring extended from the third conductive film 116b is used as a redundant wiring of the lead wiring 301b is adopted. Similarly, the extraction wiring 301a of the sampling circuit drive signal line 114 may be configured to have a double or triple wiring structure.

In this embodiment, each of the scanning lines 402 shown in FIG. 6 extends in the direction along the scanning lines, and adjacent lines are arranged at intervals. The lead wiring 402 is connected to the scanning line 3
A dummy wiring made of the same Al film as the data line 6a is provided on each lead wiring 402. The scanning line 3
The resistance of the lead wire 402 of the data line 6a does not usually cause any problem,
In the same manner as in the case of (1), the lead line 402 of the scanning line 3a is
You may comprise so that it may have a double or triple or more wiring structure.

Accordingly, the first light-shielding film, the polysilicon film and the Al film, and the first interlayer insulating film 1 are provided in the sealing region in the thickness direction of the TFT array substrate 10 over the periphery of the liquid crystal layer 50.
2, the laminated body including the second interlayer insulating film 4 and the third interlayer insulating film 7 is formed uniformly, and the surface of the third interlayer insulating film 7 in the seal region on the upper and lower sides of the image display region And the height of the surface of the third interlayer insulating film 7 on the left and right sides of the image display area coincide with each other, so that it is possible to suppress variations in the gap between the two substrates including the various thin films in the entire seal area. Become. Therefore, for example, when controlling the gap of the liquid crystal cell by mixing a gap material having a predetermined outer diameter into the seal material, the gap control can be performed more accurately and well. In particular, with such a configuration, even if the lead-out wiring 301 or 402 is disconnected under the stress of the gap material under the sealing region, or if A
This is advantageous in that even if the conductive film breaks the second interlayer insulating film 4 and the short circuit occurs to the polysilicon film, the wiring does not cause a wiring failure.

If the purpose of such gap control is emphasized (that is, if the resistance of the lead wiring 301 is sufficiently low in relation to the driving frequency, etc.), FIG.
As shown in (2), the electrical connection of the second conductive film 116a 'and the third conductive film 116b' to the lead-out wiring 301b is stopped, and the second conductive film 116a 'and the third conductive film 116b' are exclusively used. You may comprise as a dummy wiring for film thickness equalization.

In the present embodiment, as shown in FIG. 7, in the sealing region, the lead-out lines 301 have a stripe-shaped plane pattern, have a width L, and have a line spacing S between adjacent lines. Are provided for light transmission. Therefore, when light is incident through the TFT array substrate 10 when the sealing material 52 made of a photocurable resin is used in a manufacturing process of a liquid crystal device to be described later, the light passes through the light transmitting gap in the laminated structure. As a result, the sealing member 52 can be sufficiently irradiated with light. Therefore,
The sealing material 52 made of a photocurable resin can be photocured favorably by light from both substrate sides. In particular, if light curing can be performed in this way, it is not necessary to apply extra heat to the liquid crystal device as compared with the case of thermal curing, so that the components of the liquid crystal device can be prevented from being thermally degraded, and device defects due to thermal distortion can be prevented. This is advantageous because it can be prevented. Further, since the light irradiation time is short, the alignment films 16 and 22 (FIG.
(See). Therefore, since the tilt angle of the liquid crystal is kept high, it is possible to prevent the image quality from deteriorating due to poor alignment (disclination) of the liquid crystal.

In FIGS. 6 and 7, a dummy pixel having the same configuration as the pixels constituting the image display area is formed below the third light-shielding film 53 as a peripheral parting. It is not necessary to form a display pixel under the third light-shielding film 53 provided so as to hide the liquid crystal misalignment region and the like. However, in order to stabilize the characteristics of the pixel near the edge of the image display region, it is not necessary to form such a pixel. A dummy pixel is provided outside the edge of the image display area by a predetermined width.

The first light-shielding film 11a is routed so as to overlap the scanning line 3a in the image display area in the third light-shielding film 53, as shown in FIGS. Outside the region, after passing under the third light-shielding film 53 as a light-shielding film wiring for space saving or the like, a negative power supply (constant potential line) of the scanning line driving circuit is provided via a contact hole.
It is connected to the.

As described above, in the present embodiment, the high melting point metal or the like 80 is formed in an island shape on the relay wiring made of the polysilicon film for the image signal line and the sampling circuit drive signal line. The application location of the relay wiring having this structure is not limited to these image signal lines and sampling circuit drive signal lines. For example, in peripheral circuits such as a data line driving circuit, a scanning line driving circuit, and a sampling circuit, Al
Such as a relay wiring made of a polysilicon film formed at a place where wirings made of a film intersect with each other via an interlayer insulating film,
It is possible to form a structure in which any relay wiring, high melting point metal, etc. 80 in the peripheral circuit is formed in an island shape, similarly to the above-described embodiment. In particular, lowering the resistance of the relay wiring for the data line driving circuit and the scanning line driving circuit can increase the driving speed by preventing the delay of the shift register that constitutes those circuits, and can increase the sampling circuit and the precharge. The reduction in the resistance of the relay wiring for the circuit can suppress the rounding of the sampling circuit drive signal and the precharge circuit drive signal, enable favorable writing of image signals, and ultimately improve image quality.

Further, a high melting point metal or the like 80 is formed in the shape of an island on a wiring made of a polysilicon film for forming a double wiring of various lead wirings. The present invention is not limited to the above embodiment.

(Manufacturing Process of Liquid Crystal Device) Next, a manufacturing process of the embodiment of the liquid crystal device having the above configuration will be described with reference to FIGS. FIG.
1 and 12 are process diagrams showing each layer on the TFT array substrate side in each process corresponding to the BB ′ cross section of FIG. 4 as in FIG. 6, and FIG. 13 and FIG. Each layer on the TFT array substrate side is the same as A in FIG.
It is a process drawing shown corresponding to -A 'cross section. In addition, BB
Since the manufacturing process in the cross section and the manufacturing process in the CC ′ cross section are basically performed simultaneously and in parallel, the following description will be made in parallel for both processes.

As shown in step (1) of FIGS. 11 and 13, the TFT array substrate 10 such as a quartz substrate or a hard glass is used.
Prepare Here, the TFT is preferably annealed in an inert gas atmosphere such as N ₂ (nitrogen) and at a high temperature of about 900 to 1300 ° C., and is subjected to a TFT in a high-temperature process performed later.
The pre-processing is performed so that distortion generated in the array substrate 10 is reduced. That is, the TFT array substrate 10 is preliminarily adjusted to the highest temperature at the highest temperature in the manufacturing process.
Is heat-treated at the same temperature or higher.

The TFT array substrate 1 thus processed
0, a metal such as Ti, Cr, W, Ta, Mo, and Pb, or a metal alloy film such as a metal silicide is formed by sputtering to a thickness of about 1,000 to 5,000 angstroms.
Preferably, the light-shielding film 11 having a thickness of about 2000 angstroms is formed.

Subsequently, as shown in step (2) of FIGS. 11 and 13, the pattern of the first light-shielding film 11a for light-shielding the pixel TFT is formed on the formed light-shielding film 11 by photolithography (see FIG. 2). Is formed, and the light-shielding film 11 is etched through the resist mask to form the first light-shielding film 11a.

Next, as shown in step (3) of FIGS. 11 and 13, a TEOS (tetra-ethyl-ortho-silicate) gas is formed on the first light-shielding film 11a by, for example, normal pressure or reduced pressure CVD. NSG, PSG, BS using TEB (tetra-ethyl-borate) gas, TMOP (tetra-methyl-oxy-foslate) gas, etc.
A first interlayer insulating film 12 made of a silicate glass film such as G or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed. The layer thickness of the first interlayer insulating film 12 is, for example, about 5,000 to 20,000 angstroms.

Next, as shown in step (4) of FIG. 11 and FIG. 13, about 450 to 550
C., preferably about 500.degree. C., in a relatively low temperature environment, using a low pressure CVD (for example, a pressure of about 20 to
An amorphous silicon film is formed by CVD at 40 Pa). Then, in a nitrogen atmosphere, about 600 to 700
The polysilicon film 1 is subjected to an annealing treatment at a temperature of about 1 to 10 hours, preferably 4 to 6 hours.
The solid phase is grown to a thickness of 00 to 2000 angstroms, preferably about 1000 angstroms.

At this time, when an n-channel type pixel switching TFT 30 is formed as the pixel switching TFT 30 shown in FIG.
V such as b (antimony), As (arsenic), and P (phosphorus)
A group element dopant may be slightly doped by ion implantation or the like. Also, the pixel switching TFT 30 is set to p
In the case of a channel type, a dopant of a group III element such as B (boron), Ga (gallium), or In (indium) may be slightly doped by ion implantation or the like.
The polysilicon film 1 may be directly formed by a low pressure CVD method or the like without passing through the amorphous silicon film. Alternatively, the polysilicon film 1 may be formed by implanting silicon ions into a polysilicon film deposited by a low-pressure CVD method or the like to make the polysilicon film once amorphous (amorphized), and then recrystallize by annealing or the like.

Next, as shown in step (5) of FIGS. 11 and 13, a semiconductor layer 1a having a predetermined pattern as shown in FIG. 2 is formed by a photolithography step, an etching step, or the like. That is, the first storage capacitor electrode 1f extending from the semiconductor layer 1a constituting the pixel switching TFT 30 is formed in a region where the capacitor line 3b is formed particularly along the scanning line 3a.

Next, as shown in the step (6) of FIG. 13, the first storage capacitor electrode 1f together with the semiconductor layer 1a constituting the pixel switching TFT 30 is heated to a temperature of about 900 to 1300 ° C., preferably about 1000 ° C. A thermal silicon oxide film having a relatively small thickness of about 300 Å by thermal oxidation, and further forming a high-temperature silicon oxide film (HTO film) or a silicon nitride film of about 500 Å by a low pressure CVD method or the like. Deposited in thin thickness,
The insulating film 2 for forming the capacitance is formed together with the gate insulating film 2 of the pixel switching TFT 30 having a multilayer structure. As a result, the thickness of the semiconductor layer 1a is about 300 to 1500 angstroms, preferably about 350 to 500 angstroms, and the thickness of the gate insulating film 2 is
It will be about 200-1500 Angstroms thick, preferably about 300-1000 Angstroms thick.
By shortening the high-temperature thermal oxidation time in this way, warpage due to heat can be prevented particularly when a large substrate of about 8 inches is used. However, the gate insulating film 2 for forming a capacitor having a single-layer structure may be formed only by thermally oxidizing the polysilicon layer 1.

Although not particularly limited in the step (6), the semiconductor layer portion to be the first storage capacitor electrode 1f is doped with, for example, P ions at a dose of about 3 × 10 ₁₂ / cm ₂ to obtain a low resistance. You may make it.

Next, as shown in step (7) of FIG. 11 and FIG. 13, after a polysilicon layer 3 is deposited by a low pressure CVD method or the like, phosphorus (P) is thermally diffused to make the polysilicon film 3 conductive. I do. Alternatively, a doped silicon film in which P ions are introduced simultaneously with the formation of the polysilicon film 3 may be used.

Next, as shown in step (8) of FIG.
By a photolithography process using a resist mask, an etching process, and the like, the capacitor lines 3b are formed together with the scanning lines 3a having a predetermined pattern as shown in FIG.

At the same time, as shown in step (8) of FIG.
Relay wiring 11 having a predetermined pattern as shown in FIGS.
The second conductive films 116a and 116a 'forming 6a are formed.

Next, as shown in step (9) of FIGS. 11 and 13, when the pixel switching TFT 30 shown in FIG. 3 is an n-channel type TFT having an LDD structure, first, the semiconductor layer 1a to form a doped source region 1b and the lightly doped drain region 1c, and the scanning line 3a as a diffusion mask, a V group element of the dopant 17, such as P low concentration (e.g., a P ion 1 to 3 × _{10 13} / (at a dose of cm ₂ ). Thereby, the semiconductor layer 1a below the scanning line 3a becomes the channel region 1a '. Due to the doping of the dopant 17, the capacitance line 3b, the scanning line 3a, and the polysilicon film 3c (that is, the relay wiring 116a) are also reduced in resistance.

Subsequently, the step (10) shown in FIGS.
As shown in FIG. 7, in order to form the high-concentration source region 1d and the high-concentration drain region 1e constituting the pixel switching TFT 30, a resist layer 18 was formed on the scanning line 3a with a mask wider than the scanning line 3a. Thereafter, a dopant 17 ′ of a group V element such as P is also used at a high concentration (for example, P
The ions are doped (at a dose of 1-3 × 10 ₁₅ / cm ₂ ). When the pixel switching TFT 30 is of a p-channel type, B or the like is used to form the low-concentration source region 1b and the low-concentration drain region 1c and the high-concentration source region 1d and the high-concentration drain region 1e in the semiconductor layer 1a. Using a Group III element dopant. Note that, for example, a TFT having an offset structure may be used without doping at a low concentration, or a self-aligned TFT may be formed by an ion implantation technique using P ions, B ions, or the like using the scanning line 3a as a mask. By the doping of the dopant 17 ′, the capacitance line 3 b and the scanning line 3 a
In addition, the second conductive films 116a and 116a 'forming the relay wiring 116 are further reduced in resistance.

In parallel with these steps, an n-channel type T
Data line driving circuit 101 and scanning line driving circuit 10 having complementary structure composed of FT and p-channel TFT
Peripheral circuits such as 4 are formed in the peripheral portion on the TFT array substrate 10. As described above, since the pixel switching TFT 30 is a polysilicon TFT in the present embodiment,
The data line driving circuit 101 and the scanning line driving circuit 104 are formed in substantially the same process when the pixel switching TFT 30 is formed.
Can be formed, which is advantageous in manufacturing.

Next, as shown in step (11) of FIGS. 12 and 14, the scanning line 3a and the capacitor line 3b and the second conductive films 116a and 116a in the pixel switching TFT 30 are formed.
To cover 16a ', for example, by using a sputtering method,
A refractory metal film (not shown) made of a metal such as Ti, Cr, W, Ta, Mo and Pb, or a metal silicide is
The high melting point metal film is etched through a resist mask to form a scanning line 3a, a capacitor line 3b, and a second conductive film, each having a thickness of about 00 to 5000 angstroms, preferably about 2000 angstroms. 1
An island-like high melting point metal or the like 80 is formed on 16a and 116a '.

Next, as shown in step (12) of FIGS. 12 and 14, the scanning line 3a and the capacitor line 3b and the second conductive films 116a and 1b in the pixel switching TFT 30 are formed.
For example, NSG, PSG, BSG,
A second interlayer insulating film 4 made of a silicate glass film such as BPSG, a silicon nitride film, a silicon oxide film or the like is formed. The thickness of the second interlayer insulating film 4 is about 5,000 to 1500.
0 Å is preferred.

Next, in the step (14) of FIGS. 12 and 14, the high-concentration source region 1d and the high-concentration drain region 1 are formed.
annealing at about 1000 ° C. to activate
After about 0 minutes, the contact hole 5 for the data line 31 is formed by dry etching such as reactive etching or reactive ion beam etching or by wet etching. Also, a contact hole 305b for electrically connecting the relay wiring 116a and the lead wiring 301b, a contact hole for connecting the scanning line 3a and the capacitance line 3b to a wiring (not shown), and the like are formed by the same process as the contact hole 5. A hole is formed in the two-layer insulating film 4. At this time, there is an advantage that opening the contact holes 5 and 305b and the like by anisotropic etching such as reactive etching or reactive ion beam etching can make the opening shape almost the same as the mask shape. However,
If the dry etching and the wet etching are performed in combination, the contact holes can be formed in a tapered shape, so that there is an advantage that disconnection during wiring connection can be prevented.

Next, as shown in step (14) of FIG. 12 and FIG. 14, a low-resistance metal such as Al or a metal silicide is shielded on the second interlayer insulating film 4 by sputtering or the like. The film 6 is deposited to a thickness of about 1000 to 5000 angstroms, preferably about 3000 angstroms, and as shown in a step (15), by a photolithography step, an etching step or the like, the data lines 6a and the image signal lines 115 and The lead wiring 301b is formed.

Next, as shown in step (16) of FIG. 12 and FIG. 14, for example, normal pressure or low pressure CVD or TEO is applied so as to cover the data lines 6a and the image signal lines 115 and the like.
Using S gas, NSG, PSG, BSG, BPSG
A third interlayer insulating film 7 made of a silicate glass film, a silicon nitride film, a silicon oxide film, or the like is formed. The thickness of the third interlayer insulating film 7 is preferably about 5,000 to 15,000 angstroms.

Next, in the step (17) of FIG. 14, in the pixel switching TFT 30, a contact hole 8 for electrically connecting the pixel electrode 9a and the high-concentration drain region 1e is formed by reactive etching and reactive etching. It is formed by dry etching such as ion beam etching.

Next, as shown in step (18) of FIG. 12 and FIG. 14, a transparent conductive thin film 9 such as an ITO film is formed on the third interlayer
Then, as shown in a step (19) in FIGS. 12 and 14, a pixel electrode 9a is formed by a photolithography step, an etching step, and the like. When the liquid crystal device is used for a reflection type liquid crystal device, Al
The pixel electrode 9a may be formed from an opaque material having a high reflectance, such as.

Subsequently, after a coating liquid for a polyimide-based alignment film is applied on the pixel electrode 9a, the alignment film 16 is formed by performing a rubbing process or the like so as to have a predetermined pretilt angle and a predetermined direction. Is done.

On the other hand, for the counter substrate 20 shown in FIG. 3, a glass substrate or the like is first prepared, and the second light shielding film 23 and the third light shielding film 53 (see FIGS. 6 and 7) After that, it is formed through a photolithography process and an etching process. The second light-shielding film 23 and the third light-shielding film 53 may be formed of a material such as resin black in which carbon or Ti is dispersed in a photoresist, in addition to a metal material such as Cr, Ni, or Al.

Thereafter, a transparent conductive thin film of ITO or the like is applied to the entire surface of
The counter electrode 21 is formed by depositing to a thickness of 2000 Å. Further, an alignment film 22 is formed by applying a coating liquid for a polyimide-based alignment film on the entire surface of the counter electrode 21 and then performing a rubbing process in a predetermined direction so as to have a predetermined pretilt angle.

Finally, the T on which each layer is formed as described above
The FT array substrate 10 and the counter substrate 20 are bonded together with a sealing material so that the alignment films 16 and 22 face each other.
By vacuum suction or the like, a liquid crystal obtained by mixing a plurality of types of nematic liquid crystals is sucked into a space between the two substrates, for example.
A liquid crystal layer 50 having a predetermined thickness is formed.

(Overall Configuration of Liquid Crystal Device) The overall configuration of each embodiment of the liquid crystal device configured as described above will be described with reference to FIGS. FIG. 15 is a plan view of the TFT array substrate 10 together with the components formed thereon viewed from the counter substrate 20 side. FIG. It is H 'sectional drawing.

In FIG. 15, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof, and is made of, for example, the same or different material as the second light shielding film 23 in parallel with the inside thereof. A third light-shielding film 53 is provided as a peripheral parting. The data line drive circuit 101 and the mounting terminal 102
The scanning line drive circuit 104 is provided along one side of the T array substrate 10 and is provided along two sides adjacent to the one side. If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the side of the image display area. For example, the odd-numbered data lines supply image signals from a data line driving circuit disposed along one side of the image display area, and the even-numbered data lines extend along the opposite side of the image display area. The image signal may be supplied from the data line driving circuit provided. If the data lines 6a are driven in a comb-tooth shape in this manner, the area occupied by the data line driving circuit 101 can be expanded, so that a complicated circuit can be formed. Further, on the remaining one side of the TFT array substrate 10, a plurality of wirings 105 for connecting between the scanning line driving circuits 104 provided on both sides of the image display area are provided. In at least one of the corners of the opposing substrate 20, an upper / lower conducting member 106 for establishing electric conduction between the TFT array substrate 10 and the opposing substrate 20 is provided. Then, as shown in FIG. 16, the opposite substrate 20 having substantially the same contour as the sealing material 52 shown in FIG. 15 is fixed to the TFT array substrate 10 by the sealing material 52.

Each of the data lines 6a is further provided on the TFT array substrate 10 of the liquid crystal device according to the embodiment described with reference to FIGS. 1 to 16 in order to reduce the load of writing image signals to the data lines 6a. A precharge circuit for writing a precharge signal of a predetermined potential at a timing preceding the image signal may be formed, or an inspection circuit or the like for inspecting quality, defects, etc. of the liquid crystal device during manufacturing or shipping may be formed. May be. In addition, instead of providing a part of peripheral circuits such as the data line driving circuit 101 and the scanning line driving circuit 104 on the TFT array substrate 10, for example, a driving LSI mounted on a TAB (tape automated bonding substrate) Alternatively, the TFT array substrate 10 may be electrically and mechanically connected via an anisotropic conductive film provided on the periphery. Further, on the side of the opposite substrate 20 on which the projected light is incident and on the side of the TFT array substrate 10 from which the emitted light is emitted, for example, a TN (twisted nematic) mode, an STN (super TN) mode, a D
Operating modes such as -STN (double-STN) mode,
A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to the normally white mode / normally black mode.

Since the liquid crystal device according to the embodiment described above is applied to a color liquid crystal projector, three liquid crystal devices are used as light valves for RGB, and each panel has a dichroic for RGB color separation. The light of each color decomposed via the mirror is respectively incident as projection light. Therefore, in the embodiment, the opposing substrate 20 is not provided with a color filter. However, an RGB color filter may be formed on the opposing substrate 20 in a predetermined area facing the pixel electrode 9a where the second light-shielding film 23 is not formed, together with the protective film. In this manner, the liquid crystal device according to the embodiment can be applied to a color liquid crystal device such as a direct-view or reflection type color liquid crystal television other than the liquid crystal projector. Further, the counter substrate 20
A microlens may be formed so as to correspond to one pixel above. In this case, a bright liquid crystal device can be realized by improving the efficiency of collecting incident light. Furthermore,
By depositing a number of interference layers having different refractive indices on the counter substrate 20, a dichroic filter that creates RGB colors using light interference may be formed. According to the counter substrate with the dichroic filter, a brighter color liquid crystal device can be realized.

In the liquid crystal device according to the embodiment described above, incident light is made to enter from the side of the counter substrate 20 as in the prior art. However, since the first light-shielding film 11a is provided, the TFT array substrate 10 The incident light may be incident from the side and emitted from the counter substrate 20 side. That is,
Thus, even if the liquid crystal device is attached to the liquid crystal projector, it is possible to prevent light from being incident on the channel region 1a 'and the LDD regions 1b, 1c of the semiconductor layer 1a, and it is possible to display a high quality image. is there. Here, conventionally, in order to prevent reflection on the back surface side of the TFT array substrate 10, it has been necessary to separately arrange a polarizing plate coated with an AR coating for antireflection or attach an AR film. However, in the embodiment, the surface of the TFT array substrate 10 and at least the channel region 1a 'of the semiconductor layer 1a and the LDD
Since the first light-shielding film 11a is formed between the region 1b and the region 1c, such an AR-coated polarizing plate or AR film may be used, or the TFT array substrate 10 may be used as an AR film.
There is no need to use a processed substrate. Therefore, according to the embodiment, the material cost can be reduced, and the yield is not significantly reduced due to dust, scratches or the like at the time of attaching the polarizing plate, which is very advantageous. In addition, since light resistance is excellent, even if a bright light source is used or polarization conversion is performed by a polarizing beam splitter to improve light use efficiency, image quality deterioration such as crosstalk due to light does not occur.

The switching element provided in each pixel has been described as a normal stagger type or planar type polysilicon TFT.
The embodiments are also effective for other types of TFTs such as TFTs and amorphous silicon TFTs.

(Electronic Apparatus) Next, an embodiment of an electronic apparatus having the electro-optical device described in detail above will be described with reference to FIG.
7 to FIG. 19 will be described.

First, FIG. 17 shows a schematic configuration of an electronic apparatus including the liquid crystal device 100 as an example of the electro-optical device.

In FIG. 17, the electronic equipment includes a display information output source 1000, a display information processing circuit 1002, and a drive circuit 1.
004, a liquid crystal device 100, a clock generation circuit 1008, and a power supply circuit 1010. The display information output source 1000 includes a ROM (Read Only Memory),
It includes a memory such as an AM (Random Access Memory) and an optical disk device, a tuning circuit for tuning and outputting an image signal, and displays display information such as an image signal of a predetermined format based on a clock signal from a clock generation circuit 1008. Output to the information processing circuit 1002. The display information processing circuit 1002 includes various known processing circuits such as an amplification / polarity inversion circuit, a serial-parallel conversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and is input based on a clock signal. Digital signals are sequentially generated from the display information and output to the drive circuit 1004 together with the clock signal CLK. The drive circuit 1004 drives the liquid crystal device 100. The power supply circuit 1010 supplies a predetermined power to each of the above-described circuits. The driving circuit 1004 may be mounted on the TFT array substrate constituting the liquid crystal device 100. In addition, the display information processing circuit 1002 may be mounted and the driving circuit 6 may be mounted.

Next, FIG. 18 to FIG. 19 show specific examples of the electronic apparatus configured as described above.

FIG. 18 shows a liquid crystal projector 1100 as an example of an electronic apparatus. In the liquid crystal projector 1100, three liquid crystal display modules including the liquid crystal device 100 in which the above-described drive circuit 1004 is mounted on a TFT array substrate are prepared, and light valves 100R, 1R for RGB are respectively provided.
Used as 00G and 100B. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, three mirrors 1106 and two dichroic mirrors 1108 cause light components R, G, B, and are led to light valves 100R, 100G, and 100B corresponding to each color. At this time, in particular, the B light is guided through a relay lens system 1121 including an entrance lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. Then, light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B, respectively, are recombined by the dichroic prism 1112, and then are transmitted through the projection lens 1114 to the screen 112.
0 is projected as a color image.

FIG. 19 shows a multimedia type laptop personal computer (PC) 1200 as another example of the electronic apparatus. The above-described liquid crystal device 100 is provided in a top cover case, and further includes a main body 1204 that houses a CPU, a memory, a modem, and the like and has a keyboard 1202 incorporated therein.

In addition to the electronic devices described above with reference to FIGS. 18 to 19, a liquid crystal television, a viewfinder type or a monitor direct-view type video tape recorder, a car navigation device, an electronic organizer, a calculator, a word processor, an engineering machine, etc. A workstation (EWS), a mobile phone, a video phone, a POS terminal, a device having a touch panel, and the like are examples of the electronic device shown in FIG.

As described above, according to the present embodiment, it is possible to realize various electronic devices having a liquid crystal device capable of displaying high-quality images with high manufacturing efficiency.

[Brief description of the drawings]

FIG. 1 is a block diagram of a liquid crystal device including various elements provided in a plurality of pixels in a matrix forming an image forming region, an equivalent circuit such as wiring, and peripheral circuits in an embodiment of the liquid crystal device.

FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light shielding film, and the like are formed in the embodiment of the liquid crystal device.

FIG. 3 is a sectional view taken along line AA ′ of FIG. 2;

FIG. 4 is a partial plan view for explaining a refractory metal or the like formed in an island shape on a scanning line and a capacitance line.

FIG. 5 is a partial side view for explaining a refractory metal or the like formed in an island shape on a scanning line or a capacitance line.

FIG. 6 is a partial plan view of a TFT array substrate provided with peripheral wiring.

FIG. 7 is an enlarged plan view showing the relay wiring and the lead-out wiring part of FIG. 6 in an enlarged manner.

8 is a sectional view taken along the line BB 'of FIGS. 6 and 7. FIG.

9 is a cross-sectional view showing a mode of a relay wiring for a sampling circuit drive signal line in a cross section along DD ′ of FIG. 7;

FIG. 10 is a cross-sectional view showing a modification of the cross section taken along the line BB ′ of FIGS. 6 and 7;

FIG. 11 is a process diagram (part 1) illustrating a manufacturing process of the embodiment of the liquid crystal device in order for a portion corresponding to FIG. 8;

FIG. 12 is a process diagram (part 2) illustrating the manufacturing process of the embodiment of the liquid crystal device in order for a portion corresponding to FIG. 8;

FIG. 13 is a process diagram (part 1) for sequentially illustrating the manufacturing process of the embodiment of the liquid crystal device for a portion corresponding to FIG. 3;

FIG. 14 is a process diagram (part 2) illustrating the manufacturing process of the embodiment of the liquid crystal device in order for portions corresponding to FIG. 3;

FIG. 15 is a plan view of a TFT array substrate in an embodiment of a liquid crystal device, together with components formed thereon, as viewed from a counter substrate side.

FIG. 16 is a sectional view taken along line HH ′ of FIG.

FIG. 17 is a block diagram illustrating a schematic configuration of an electronic device according to an embodiment of the present invention.

FIG. 18 is a cross-sectional view illustrating a liquid crystal projector as an example of an electronic apparatus.

FIG. 19 is a front view illustrating a personal computer as another example of the electronic apparatus.

[Explanation of symbols]

 1a semiconductor layer 1a 'channel region 1b low concentration source region (source side LDD region) 1c low concentration drain region (drain side LDD region) 1d high concentration source region 1e high concentration drain region 1f first accumulation Capacitance electrode 2 ... Gate insulating film 3a ... Scan line 3b ... Capacitance line (second storage capacitor electrode) 4 ... Second interlayer insulating film 5 ... Contact hole 6a ... Data line (source electrode) 7 ... Third interlayer insulating film 8 ... Contact hole 9a pixel electrode 10 TFT array substrate 11a first light-shielding film 12 first interlayer insulating film 20 counter substrate 21 counter electrode 23 second light-shielding film 30 TFT 50 liquid crystal layer 52 sealing material 53 ... Third light-shielding film 70... Storage capacitor 80... High-melting point metal 101... Data line drive circuit 103. Ring circuit driving signal line 115 ... image signal lines 116 ... relay wiring 301,301a, 301b ... lead wiring

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H092 GA29 GA59 HA06 HA27 JA26 JA46 JB22 JB31 JB51 JB67 KA04 KA10 KB25 MA07 MA13 MA18 MA19 MA25 MA27 MA29 NA01 NA24 NA28 PA02 PA06 PA07 PA10 PA11 PA13 QA07 QA10 RA05 5C094 AA03 AA03 AA03 AA03 AA03A BA43 CA19 DA14 EA04 EA07 EA10 FB12 GB01

Claims (7)

[Claims] An electro-optical material is sandwiched between a pair of substrates. A plurality of pixel electrodes arranged in a matrix and a plurality of pixel electrodes are arranged on one of the pair of substrates. A plurality of thin film transistors to be driven; and a plurality of data lines and a plurality of scanning lines connected to the plurality of thin film transistors, respectively, and intersecting with each other. An electro-optical device, wherein the film made of the metal silicide is provided in an island shape. 2. A storage capacitor connected to the pixel electrode,
A capacitor line for the storage capacitor, wherein the scanning line and the capacitor line are made of a polysilicon thin film, and a conductive line is formed on at least one of the scanning line and the capacitor line made of the polysilicon thin film. 2. The electro-optical device according to claim 1, wherein the film made of the high melting point metal or its metal silicide is provided in an island shape. 3. An electro-optical material is sandwiched between a pair of substrates. A plurality of pixel electrodes arranged in a matrix are formed on one of the pair of substrates. A plurality of thin film transistors to be driven; a plurality of data lines and a plurality of scanning lines respectively connected to the plurality of thin film transistors and intersecting with each other; a peripheral circuit for supplying an image signal to at least the data lines; And a peripheral wiring for inputting / outputting a predetermined type of signal including the image signal to / from the main scanning line, wherein the peripheral wiring comprises a main wiring portion made of a first conductive film constituting the data line; A relay wiring portion made of a second conductive film constituting a wire, and a film made of a conductive high melting point metal or a metal silicide thereof is provided in an island shape on the relay wiring portion made of the second conductive film. Was it An electro-optical device characterized by the above-mentioned. 4. The conductive refractory metal or its metal silicide, among W (tungsten), Ti (titanium), Cr (chromium), Ta (tantalum), Mo (molybdenum) and Pb (lead). The electro-optical device according to any one of claims 1 to 3, wherein a single metal or alloy containing at least one of them, or a metal silicide thereof is used. 5. An electro-optical material is sandwiched between a pair of substrates. A plurality of pixel electrodes arranged in a matrix and a plurality of pixel electrodes are arranged on one of the pair of substrates. A plurality of thin film transistors to be driven, a plurality of data lines and a plurality of scanning lines respectively connected to the plurality of thin film transistors and intersecting with each other, a storage capacitance connected to the pixel electrode, and a capacitance line of the storage capacitance. A method of manufacturing an electro-optical device, comprising: providing a conductive film having a high melting point metal or a metal silicide thereof in an island shape on a wiring made of a polysilicon thin film. Method. 6. An electronic apparatus comprising the electro-optical device according to claim 1. 7. A wiring comprising at least a wiring made of a polysilicon thin film, wherein a film made of a conductive high melting point metal or a metal silicide thereof is provided in an island shape on the wiring made of the polysilicon thin film. Semiconductor device.