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JP2000348491A - Non-volatile memory and microcomputer - Google Patents

Non-volatile memory and microcomputer

Info

Publication number
JP2000348491A
JP2000348491A JP15615899A JP15615899A JP2000348491A JP 2000348491 A JP2000348491 A JP 2000348491A JP 15615899 A JP15615899 A JP 15615899A JP 15615899 A JP15615899 A JP 15615899A JP 2000348491 A JP2000348491 A JP 2000348491A
Authority
JP
Japan
Prior art keywords
rewriting
microcomputer
rewrite
rewrites
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15615899A
Other languages
Japanese (ja)
Inventor
Motonaga Nishimura
始修 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15615899A priority Critical patent/JP2000348491A/en
Publication of JP2000348491A publication Critical patent/JP2000348491A/en
Pending legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Stored Programmes (AREA)

Abstract

(57)【要約】 【課題】 不揮発性メモリー内蔵マイコンのメモリーセ
ルの書込時間が長くなるのを改善する。 【解決手段】 不揮発性メモリーを書換える際、書換回
数をカウントし、書換回数により、書換電圧を上げるこ
とにより書換回数で書換時間が変化なることを最小にす
ることを特徴とする。
(57) [Summary] [PROBLEMS] To improve the long write time of a memory cell of a microcomputer with built-in nonvolatile memory. SOLUTION: When rewriting a nonvolatile memory, the number of rewrites is counted, and the rewrite time is increased by increasing the rewrite voltage according to the number of rewrites, thereby minimizing a change in rewrite time with the number of rewrites.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、不揮発性メモリー
内蔵マイコンに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer having a built-in nonvolatile memory.

【0002】メモリーセルの書換回数をカウントし、書
換回数をメモリーセルに格納し、格納された回数を判定
し回数に応じて書換電圧を可変することにより、書換回
数により書換時間の増大を最小限に防止することを図っ
たものである。
[0002] Counting the number of times of rewriting of a memory cell, storing the number of times of rewriting in a memory cell, judging the number of times stored, and varying a rewriting voltage according to the number of times, minimizes the increase in rewriting time by the number of times of rewriting. It is intended to prevent this.

【0003】[0003]

【従来の技術】近年、各種電化製品の開発期間の短縮が
進み電化製品のシステム基板に実装されたマイコンに関
して、実装後に、CPUの制御によるプログラムの書
込、或いは書換ができるようにフラッシュメモリーなど
の、不揮発性メモリーを内蔵したマイコンが強く要望さ
れており、書換回数も100回から1000〜1000
0回と年々回数も増大している。
2. Description of the Related Art In recent years, development periods of various electric appliances have been shortened, and with respect to a microcomputer mounted on a system board of the electric appliance, a flash memory or the like is provided so that a program can be written or rewritten under the control of a CPU after the mounting. However, there is a strong demand for a microcomputer having a built-in nonvolatile memory, and the number of rewrites can be reduced from 100 times to 1000
The number of times has been increasing year by year to zero.

【0004】以下にマイコンに内蔵される不揮発性メモ
リーについて説明する。
Hereinafter, a nonvolatile memory built in a microcomputer will be described.

【0005】図4は、不揮発メモリー内蔵マイコンを説
明する、概略図である。1は、書換電圧、2は、書換電
圧発生回路である。
FIG. 4 is a schematic diagram illustrating a microcomputer with a built-in nonvolatile memory. 1 is a rewrite voltage and 2 is a rewrite voltage generation circuit.

【0006】従来は、昇圧した電圧を、クランプダイオ
ードにより、一定電圧を発生し、ラダー抵抗を分圧する
ことにより、書換電圧を作り出している。
Conventionally, a constant voltage is generated from a boosted voltage by a clamp diode, and a ladder resistor is divided to generate a rewrite voltage.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、上記従
来の不揮発性メモリー内蔵マイコンでは、書換を繰り返
すと膜厚等の劣化に伴い、書換回数に応じて書換時間
が、初期より長くなるといった問題が生じており、書換
回数の多いシステムに於いては、保証する書換回数後の
書換時間を考慮して、システム設計する必要があった。
However, in the above-mentioned conventional microcomputer with a built-in nonvolatile memory, when rewriting is repeated, a problem arises that the rewriting time becomes longer than the initial time in accordance with the number of rewriting due to deterioration of the film thickness and the like. Therefore, in a system in which the number of times of rewriting is large, it is necessary to design the system in consideration of the guaranteed rewriting time after the number of times of rewriting.

【0008】図5は従来の不揮発性メモリー内蔵マイコ
ンの書換回数と書換時間の特性図であり、書換回数が増
加するのに伴い、書換時間が増加する特性を示してい
る。
FIG. 5 is a characteristic diagram of the number of rewrites and the rewrite time of the conventional microcomputer with a built-in nonvolatile memory, and shows the characteristic that the rewrite time increases as the number of rewrites increases.

【0009】[0009]

【課題を解決するための手段】本発明は、メモリの一部
に書換回数格納を装備し、書換毎に書換回数を更新し格
納する機能を持ち、書換回数判別回路により書換回数を
判定することにより、書換電圧を可変する機能を有する
ことを特徴とするものである。
According to the present invention, a rewrite frequency storage is provided in a part of a memory, and has a function of updating and storing the number of rewrites for each rewrite. , The function of varying the rewrite voltage.

【0010】[0010]

【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を用いて説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0011】図1は、本発明の実施の形態について説明
する為のブロック図である。
FIG. 1 is a block diagram for explaining an embodiment of the present invention.

【0012】1はマイコン、2はメモリセルアレイであ
り、201はメモリセルアレイ内の書換回数を格納する
エリア、3は電圧可変レジスタ、401から403は書
換ソース電圧を可変するスイッチ、5は書換のソース電
圧発生回路、6は選択された書換電圧、7はバスであ
る。1のマイコンと7のバスで接続された2のメモリセ
ル、3の電圧可変レジスタにより、2のメモリセルを書
換える際、マイコンが書換回数格納メモリを読み出し、
書換回数を、判定しあらかじめROMに格納された書換
回数と比較し書換回数に応じて使用する電圧を選択する
ため、3の電圧可変レジスタを書換える電圧可変レジス
タにより、401、402,403の電圧可変スイッチ
のいずれかを選択する。書換当初はスイッチ403を選
択し書換回数がある回数以上になると、スイッチを選択
されたスイッチを402、更には401に選択し、書換
電圧を、上昇させた値を、6の書換電圧に供給する。デ
ータを書き込む際、書換回数格納メモリに書換回数を+
1した値を、再度メモリセルの書換回数格納メモリに格
納する。図2は本発明の書換回数と書換電圧の特性図で
あり、書換回数により書換電圧が上昇していることを示
しており、図3は本発明の書換回数と時間の特性図であ
り、書換回数が増えても書換時間の上昇を最小限にして
いることを示している。
1 is a microcomputer, 2 is a memory cell array, 201 is an area for storing the number of rewrites in the memory cell array, 3 is a voltage variable register, 401 to 403 are switches for changing a rewrite source voltage, and 5 is a rewrite source. A voltage generation circuit, 6 is a selected rewrite voltage, and 7 is a bus. When rewriting two memory cells by two memory cells and three voltage variable registers connected to one microcomputer and seven buses, the microcomputer reads the rewrite count storage memory,
In order to determine the number of rewrites and compare with the number of rewrites stored in the ROM in advance to select a voltage to be used according to the number of rewrites, the voltage variable registers for rewriting the three voltage variable registers are used to change the voltages of 401, 402 and 403. Select one of the variable switches. At the beginning of rewriting, the switch 403 is selected. When the number of times of rewriting becomes equal to or more than a certain number, the selected switch is selected to 402 and further to 401, and the increased rewriting voltage is supplied to the rewriting voltage of 6. . When writing data, add the number of rewrites to the rewrite number storage memory.
The value of 1 is stored again in the memory for storing the number of times of rewriting of the memory cell. FIG. 2 is a characteristic diagram of the number of rewrites and the rewrite voltage of the present invention, showing that the rewrite voltage increases with the number of rewrites. FIG. 3 is a characteristic diagram of the number of rewrites and the time of the present invention. This shows that the increase in the rewriting time is minimized even if the number of times is increased.

【0013】これにより、書換回数により書換時間の増
大防止が可能となる。書換回数と書換電圧の相関に関し
ては、プロセス、書換方式によりROMにテーブルとし
て格納する。従来、このような判別回路を、不揮発性メ
モリに内蔵すれば、面積増加がネックとなり容易には採
用できなかったが、上記制御は、マイコンが処理すれば
面積増加は回避できる。
This makes it possible to prevent the rewriting time from increasing due to the number of rewritings. The correlation between the number of rewrites and the rewrite voltage is stored as a table in the ROM according to the process and the rewrite method. Conventionally, if such a determination circuit is incorporated in a non-volatile memory, the increase in area is a bottleneck, and it cannot be easily adopted. However, the above control can avoid the increase in area if processed by a microcomputer.

【0014】[0014]

【発明の効果】以上のように、本発明はマイコンに内蔵
された書換電圧を可変することにより、搭載している不
揮発メモリーの書換回数により、書換時間の変動を最小
に抑える製品を提供するものである。
As described above, the present invention provides a product that minimizes fluctuations in the rewriting time by changing the rewriting voltage built in the microcomputer and changing the rewriting frequency of the mounted nonvolatile memory. It is.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の不揮発性メモリー内蔵マイコンのブロ
ック図
FIG. 1 is a block diagram of a microcomputer with a built-in nonvolatile memory according to the present invention.

【図2】本発明の書換回数と書換電圧の特性図FIG. 2 is a characteristic diagram of a rewrite frequency and a rewrite voltage according to the present invention.

【図3】本発明の書換回数と書換時間の特性図FIG. 3 is a characteristic diagram of the number of rewrites and the rewrite time according to the present invention.

【図4】従来の不揮発性メモリー内蔵マイコンのブロッ
ク図
FIG. 4 is a block diagram of a conventional microcomputer with built-in nonvolatile memory.

【図5】従来の不揮発性メモリー内蔵マイコンの、書換
回数と書換時間の特性図
FIG. 5 is a characteristic diagram of the number of times of rewriting and rewriting time of a conventional microcomputer with built-in nonvolatile memory.

【符号の説明】[Explanation of symbols]

1 マイコン 2 メモリセルアレイ 3 電圧可変レジスタ 5 書換電圧発生回路 6 書換電圧 201 書換回路格納 401 スイッチ1 402 スイッチ2 403 スイッチ3 DESCRIPTION OF SYMBOLS 1 Microcomputer 2 Memory cell array 3 Voltage variable register 5 Rewriting voltage generation circuit 6 Rewriting voltage 201 Rewriting circuit storage 401 Switch 1 402 Switch 2 403 Switch 3

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】不揮発性メモリーを書換毎に、回数を更新
し書換回数をメモリに格納することを特徴とする不揮発
性メモリー。
1. A nonvolatile memory characterized in that the number of times of rewriting is updated and the number of times of rewriting is stored in the memory every time the nonvolatile memory is rewritten.
【請求項2】不揮発性メモリーの書換回数を判定し、書
換回数に応じて書換電圧を可変することを特徴とする不
揮発性メモリー。
2. The nonvolatile memory according to claim 1, wherein the number of times of rewriting of the nonvolatile memory is determined, and the rewriting voltage is varied according to the number of times of rewriting.
【請求項3】不揮発性メモリーを備え、書換回数を前記
不揮発性メモリに格納し、前記書換回数に応じて書換電
圧を可変することを特徴とするマイコン。
3. A microcomputer comprising a nonvolatile memory, wherein the number of rewrites is stored in the nonvolatile memory, and a rewrite voltage is varied according to the number of rewrites.
JP15615899A 1999-06-03 1999-06-03 Non-volatile memory and microcomputer Pending JP2000348491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15615899A JP2000348491A (en) 1999-06-03 1999-06-03 Non-volatile memory and microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15615899A JP2000348491A (en) 1999-06-03 1999-06-03 Non-volatile memory and microcomputer

Publications (1)

Publication Number Publication Date
JP2000348491A true JP2000348491A (en) 2000-12-15

Family

ID=15621626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15615899A Pending JP2000348491A (en) 1999-06-03 1999-06-03 Non-volatile memory and microcomputer

Country Status (1)

Country Link
JP (1) JP2000348491A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7304891B2 (en) 2005-07-23 2007-12-04 Samsung Electronics Co., Ltd. Apparatus and method for improving write/read endurance of non-volatile memory
JP2009245589A (en) * 2003-04-04 2009-10-22 Renesas Technology Corp Nonvolatile semiconductor memory device
US8064262B2 (en) 2007-09-18 2011-11-22 Spansion Llc Semiconductor device and method using stress information

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009245589A (en) * 2003-04-04 2009-10-22 Renesas Technology Corp Nonvolatile semiconductor memory device
US7304891B2 (en) 2005-07-23 2007-12-04 Samsung Electronics Co., Ltd. Apparatus and method for improving write/read endurance of non-volatile memory
US8064262B2 (en) 2007-09-18 2011-11-22 Spansion Llc Semiconductor device and method using stress information

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