JP2000341354A - Oscillator control circuit and oscillator control method - Google Patents

Abstract

(57) [Problem] To expand the frequency pull-in range of AFC processing to ± １ ／ times the symbol rate. SOLUTION: A correction data generation section 125 generates correction data based on the polarity of the frequency offset amount determined by a polarity determination section 124. Sync word determination unit 106
It is detected whether or not the synchronization word detected from the received decoded data is erroneous, and the switching control unit 130 estimates the frequency offset amount when the number of erroneous times continuously exceeds the threshold. Judge that it is wrong, changeover switch 1
26, the correction data is input to the TCXO control data generation unit 127.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator control circuit and an oscillator control method for performing automatic frequency control of a temperature-compensated oscillator mounted on a communication terminal device or the like of a wireless communication system.

[0002]

2. Description of the Related Art In recent years, wireless communication systems such as portable telephones and car telephones have rapidly become widespread. A conventional communication terminal device used in a wireless communication system is disclosed in
There is one described in JP-A-164658.

[0003] A communication terminal device generates a local signal of a radio unit, and establishes synchronization and switches transmission and reception.
A temperature-compensated oscillator (Temperature Control
lled Crystal Oscillator (hereinafter referred to as “TCXO”) in many cases. Automatic frequency control (Automatic Freq) is used to compensate for the oscillation frequency of TCXO.
uency Control (hereinafter referred to as “AFC”).

Hereinafter, a conventional oscillator control circuit will be described. FIG. 9 is a block diagram showing a configuration of a communication terminal device equipped with a conventional oscillator control circuit. In the following description, CDM is used as a multiple access method for a wireless communication system.
A (code division multiple access) system is used.

[0005] In FIG. 9, an RF receiver 2 amplifies a radio signal received from an antenna 1 and converts the frequency to a baseband. Despreading section 3 multiplies the baseband signal output from RF receiving section 2 by a unique spreading code to despread, and detects complex received symbol data.

[0006] The synchronous detection and demodulation unit 4 performs fading distortion compensation and the like on the complex reception symbol data output from the despreading unit 3, determines the data, and extracts decoded data.
The extracted decoded data is output from the output terminal 5 to another component (not shown), and is also output to the synchronization word determination unit 6 at the same time.

[0007] The synchronization word determination section 6 detects a synchronization word included in the decoded data, and determines whether or not synchronization is correctly established based on the detection result. The signal indicating the determination result is output from the output terminal 7 to another component (not shown).

The oscillator control circuit 8 controls the TCXO 9 based on the complex reception symbol data output from the despreading unit 3.
AFC is performed.

The TCXO 9 generates a reference signal for a local synthesizer 10 described later. The oscillation frequency of the reference signal is controlled based on the control signal output from the oscillator control circuit 8.

The local synthesizer 10 has a TCXO 9
A local signal for frequency conversion in the RF receiver 2 is generated based on the output signal of the RF receiver 2 as a reference.

Next, the internal configuration of the oscillator control circuit 8 will be described.

The delay detector 21 multiplies the complex conjugate value of the complex received symbol data output from the despreading unit 3 by the complex received symbol data one symbol before to detect a phase difference between symbols. The frequency offset estimating unit 22 estimates the frequency offset amount based on the phase difference information output from the delay detecting unit 21.

The update data generation unit 23 calculates the frequency offset amount estimated by the frequency offset
It is converted into the update data of the XO control data.

The TCXO control data generator 24 includes a delay unit 25 for holding the current TCXO control data,
And a subtractor 26 for subtracting the output signal of the update data generating unit 23 from the output signal of No. 5 to update the TCXO control data, and generates TCXO control data.

The D / A converter 27 converts the digital TCXO control data output from the TCXO control data generator 24 into an analog control signal and outputs it to the TCXO 9.

Next, a conventional AFC processing method of the oscillator control circuit will be described.

Here, complex received symbol data X (nT) output from the despreading unit 3 and input to the delay detection unit 21
Assuming that Y (nT) is Δf, the amplitude is A, the modulation phase is φ (nT), and the random phase noise component due to thermal noise or fading is ξ (nT), Y (nT) is the following equation (1).
It is represented by

(Equation 1)

First, the delay detection section 21 applies the following equation (2) to the complex reception symbol data X (nT) and Y (nT).
Performs complex multiplication expressed by

(Equation 2)

As a result, as shown in the following equation (3), the phase difference information I (nT) and Q (nT) between one symbol in the orthogonal coordinate format are output from the differential detection unit 21.

(Equation 3)

Here, Δφ (nT) = φ ((n−1) T) −φ (nT) Δξ (nT) = ξ ((n−1) T) −ξ (nT) θe = 2πΔfT B = A ² And the modulation phase difference Δφ (nT) takes one of the values 0, ± π / 2, ± π.

FIG. 10 is a signal point arrangement diagram based on equation (3). However, in FIG. 10, the difference Δξ (nT) of the phase noise component is “0”. Here, the range of the frequency offset amount Δf is set to | Δf | <１ ／ T.

The white circles in FIG. 10 are signal points of Δf = 0,
Its declination is Δφ (nT). In addition, a black circle represents Δf ≠ 0
(Only when Δf <１ ／ T) is shown, and its argument is Δφ (nT) + θe.

Next, the frequency offset estimator 22 determines in which quadrant I (nT) and Q (nT) output from the delay detector 21 exist. Here, in FIG.
The region of −π / 4 ≦ θ <π / 4 is the first quadrant, and π / 4 ≦ θ <
The region of 3π / 4 is the second quadrant, the region of 3π / 4 ≦ θ <5π / 4 is the third quadrant, and the region of 5π / 4 ≦ θ <7π / 4 is the fourth quadrant.
Quadrant.

Then, the frequency offset estimating unit 22
Based on the determination result, the phase rotation processing is performed by the following equation (4), and as shown in FIG. 11, all the signal points existing in each quadrant are converted to the first quadrant.

(Equation 4)

However, when the signal point exists in the first quadrant: ψ (n) = 0 When the signal point exists in the second quadrant: ψ (n) = − π / 2 The signal point exists in the third quadrant When: ψ (n) = − π When the signal point exists in the fourth quadrant: ψ (n) = − 3π / 2.

Here, when the above equation (3) is substituted into the above equation (4), the following equation (5) is obtained.

(Equation 5)

The frequency offset estimating unit 22
An averaging process is performed to suppress the difference Δξ (nT) between the phase noise components. Here, when the TCXO control signal is updated every N symbol periods, Ir (nT), Qr (nT)
The average values Ire (mNT) and Qre (mNT) can be approximately expressed by the following equation (6).

(Equation 6)

The frequency offset estimating unit 22 calculates the average value I
Using re (mNT) and Qre (mNT), a frequency offset estimated value Df (mNT) is calculated by the following equation (7).

(Equation 7)

Here, when the above equation (6) is substituted into the above equation (7), the following equation (8) is obtained. As is clear from equation (8), the range of the frequency offset amount Δf is |
If Δf | <１ ／ T, the frequency offset amount is correctly estimated.

(Equation 8)

Next, the update data generator 23 sets the frequency offset estimation value Df (mNT) to the same value in consideration of the reception carrier frequency, the output range of the D / A converter 27, the number of bits, and the control sensitivity of the TCXO 9. The TCXO control data is converted into proportional TCXO control data update data Ef (mNT) and output to the TCXO control data generator 24.

The TCXO control data generator 24 performs a reverse integration process represented by the following equation (9) using the update data Ef (mNT) to update the TCXO control data C (mNT).

(Equation 9)

The updated TCXO control data C (mNT)
Is converted into an analog control signal by the D / A converter 27 and output to the TCXO 9. As a result, the oscillation frequency of the TCXO 9 is controlled such that the frequency of the local signal output from the local synthesizer 10 shifts by the above-described frequency offset estimation value Df (mNT).

As described above, even in the conventional oscillator control circuit, the AFC process can be realized by controlling the oscillation frequency of the TCXO according to the estimated frequency offset amount.

[0034]

However, the frequency pull-in range of the AFC process in the conventional oscillator control circuit is ± 回路 times the symbol rate, and the frequency offset amount is ± 1/8 times the symbol rate. If it is exceeded, the estimation is erroneous. Since the AFC does not operate correctly, there is a problem that a highly accurate and expensive TCXO must be used in the communication terminal device.

The present invention has been made in view of the above point, and it is possible to expand the frequency pull-in range of AFC processing to ± １ ／ times the symbol rate which is twice that of the conventional AFC processing. Low-precision and inexpensive TCXO
It is an object of the present invention to provide an oscillator control circuit and an oscillator control method that can use the method.

[0036]

The gist of the present invention is that when the synchronization word detected from the received decoded data is continuously incorrect, it is determined that the frequency offset amount is incorrectly estimated, and the estimated frequency T based on the polarity of the offset amount
This is to correct the CXO control data.

[0037]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An oscillator control circuit according to a first aspect of the present invention includes update data generating means for generating update data of oscillator control data based on an estimated frequency offset amount, and a polarity of the frequency offset amount. Correction data generating means for generating correction data based on the above, oscillator control data generating means for generating the oscillator control data by subtracting either the update data or the correction data from the previous oscillator control data, update data or Switching control means for inputting any of the correction data to the oscillator control data generating means.

According to a second aspect of the present invention, in the oscillator control circuit according to the first aspect, the switching control means counts the number of times that the synchronization word included in the received signal is continuously incorrect, and this count value is obtained. A configuration is adopted in which correction data is input to the oscillator control data generating means when the threshold value exceeds a preset threshold value.

According to a third aspect of the present invention, in the oscillator control circuit according to the first or second aspect, the correction data generating means comprises:
When the polarity of the frequency offset amount is positive, correction data is generated by multiplying the symbol rate by − ／ times the predetermined coefficient, and when the polarity of the frequency offset amount is negative, the correction rate is デ ー タ times the symbol rate. Is multiplied by the predetermined coefficient to generate correction data.

With these arrangements, when it is determined from the detection result of the synchronization word that the estimation of the frequency offset is incorrect, the TCXO is corrected by using the correction data instead of the update data.
Since the control data can be corrected, the frequency pull-in range of the AFC process can be expanded to ± １ ／ times the symbol rate, which is twice that of the conventional AFC processing. Can be used.

An oscillator control circuit according to a fourth aspect of the present invention comprises: update data generating means for generating update data of oscillator control data based on the estimated frequency offset amount;
Oscillator control data generating means for controlling an oscillator with oscillator control data obtained by subtracting the update data from the previous oscillator control data written in the buffer and writing control data to the buffer, and an oscillator written in the buffer An oscillator control data resetting means for resetting the control data.

According to a fifth aspect of the present invention, in the oscillator control circuit according to the fourth aspect, the oscillator control data resetting means comprises:
The number of times the synchronization word included in the received signal is continuously incorrect is counted, and when the counted value exceeds a preset threshold, the oscillator control data written in the buffer is reset.

With these configurations, when it is determined from the detection result of the synchronization word that the estimation of the frequency offset is incorrect, the TCXO control data can be reset and the updating process can be started. The range can be expanded to ± 1/4 times the symbol rate which is twice the conventional rate, and a low-precision and inexpensive TCXO can be used in the communication terminal device.

A communication terminal device according to a sixth aspect of the present invention employs a configuration in which the oscillator control circuit according to any one of the first to fifth aspects is mounted and automatic frequency control is performed on the oscillator. Further, the base station apparatus according to the seventh aspect of the present invention employs a configuration for performing wireless communication with the communication terminal apparatus according to the sixth aspect.

With these configurations, high-quality wireless communication can be performed even if a low-precision and inexpensive TCXO is used for the communication terminal device.

An oscillator control method according to an eighth aspect of the present invention generates update data of oscillator control data based on the estimated frequency offset amount, and generates correction data based on the polarity of the frequency offset amount. Usually, the control data of the oscillator is generated by subtracting the update data from the control data of the previous oscillator, and when the number of times the synchronization word included in the received signal is continuously incorrect exceeds a preset threshold, A method of generating the control data of the oscillator by subtracting the correction data from the control data of the previous oscillator is adopted.

According to a ninth aspect of the present invention, in the oscillator control circuit of the eighth aspect, when the polarity of the frequency offset amount is positive, the correction data is multiplied by a predetermined coefficient to -−１ times the symbol rate. Is generated, and when the polarity of the frequency offset amount is negative, a method is employed in which ４ times the symbol rate is multiplied by the predetermined coefficient to generate correction data.

According to these methods, when it is determined from the detection result of the synchronization word that the estimation of the frequency offset is incorrect, the TCXO is corrected by using the correction data instead of the update data.
Since the control data can be corrected, the frequency pull-in range of the AFC process can be expanded to ± １ ／ times the symbol rate, which is twice that of the conventional AFC processing. Can be used.

The oscillator control method according to the tenth aspect of the present invention generates updated data of the oscillator control data based on the estimated frequency offset amount, and generates the updated data from the previous control data written in the buffer. The oscillator is controlled by the subtracted oscillator control data, and the oscillator control data is written into the buffer. When the number of consecutive incorrect synchronization words included in the received signal exceeds a preset threshold, the buffer is written into the buffer. A method of resetting the inserted oscillator control data is adopted.

According to this method, when it is determined from the detection result of the synchronization word that the estimation of the frequency offset is incorrect, the TCXO control data can be reset and the updating process can be started. Can be expanded to ± １ ／ times the symbol rate, which is twice the conventional symbol rate, and a low-accuracy and inexpensive TCXO can be used in the communication terminal apparatus.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In the following description, it is assumed that a CDMA (code division multiple access) system is used as a multiple access system of a wireless communication system. The CDMA system is a system in which a wide-band signal secondary-modulated with a spreading code is wirelessly transmitted on the transmitting side, and a narrow-band signal is obtained on the receiving side by multiplying the received signal by the same spreading code as the transmitting side. is there.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of a communication terminal device equipped with an oscillator control circuit according to Embodiment 1 of the present invention.

In FIG. 1, RF receiving section 102 amplifies a radio signal received from antenna 101 and frequency-converts the signal to baseband. Despreading section 103 multiplies the baseband signal output from RF receiving section 102 by a unique spreading code to despread, and detects complex received symbol data.

The synchronous detection and demodulation unit 104 includes a despreading unit 103
Performs fading distortion compensation and the like on the complex reception symbol data output from, performs data determination, and extracts decoded data. The extracted decoded data is output from the output terminal 105 to another component (not shown), and is output to the synchronization word determination unit 106 at the same time.

The synchronization word determination section 106 detects a synchronization word included in the decoded data, and determines whether or not synchronization is correct based on the detection result. The signal indicating the determination result is output from the output terminal 107 to another component (not shown), and is output to the oscillator control circuit 108 at the same time.

The oscillator control circuit 108 includes the despreading unit 103
T based on the complex received symbol data output from
AFC is performed on CXO109.

The TCXO 109 generates a reference signal for a local synthesizer 110 described later. The oscillation frequency of the reference signal is controlled based on a control signal output from the oscillator control circuit 108.

The local synthesizer 110 has a TCXO
A local signal for frequency conversion in the RF receiving unit 102 is generated based on the output signal of the RF receiver 109.

Next, the internal configuration of the oscillator control circuit 108 will be described.

The delay detection section 121 multiplies the complex conjugate value of the complex reception symbol data output from the despreading section 103 by the complex reception symbol data one symbol before to detect phase difference information between symbols. Frequency offset estimator 1
22 estimates the frequency offset amount based on the phase difference information output from the delay detection unit 121.

The update data generator 123 converts the frequency offset amount estimated by the frequency offset estimator 122 into update data of the TCXO control data.

The polarity determining section 124 determines the polarity of the frequency offset amount estimated by the frequency offset estimating section 122. The correction data generation unit 125 includes the polarity determination unit 12
Correction data having a fixed frequency is generated based on the polarity determined in step 4.

The changeover switch 126 outputs either the output signal of the update data generator 123 or the output signal of the correction data generator 125.

The TCXO control data generator 127 includes a delay unit 128 for holding the current TCXO control data, and a subtractor 129 for subtracting the output signal of the changeover switch 126 from the output signal of the delay unit 128 to update the TCXO control data.
And generates TCXO control data.

The switching control unit 130 includes a synchronization word determination unit 1
06, the number of times that the detected synchronization word is determined to be incorrect is counted, and when the counted value exceeds a preset threshold, the changeover switch 126 is controlled to output the output signal of the correction data generator 125. To the TCXO control data generator 127
Output.

The D / A converter 131 converts the digital TCXO control data output from the TCXO control data generator 127 into an analog control signal,
9 is output.

Next, an AFC processing method of the oscillator control circuit according to the present embodiment will be described.

Here, complex reception symbol data X output from despreading section 103 and input to delay detection section 121
(nT) and Y (nT) are as follows, assuming that the frequency offset amount is Δf, the amplitude is A, the modulation phase is φ (nT), and the random phase noise component due to thermal noise or fading is ξ (nT). It is represented by equation (10).

(Equation 10)

First, the delay detection section 121 applies the following equation (1) to the complex reception symbol data X (nT) and Y (nT).
The complex multiplication represented by 1) is performed.

[Equation 11]

As a result, as shown in the following equation (12), the phase difference information I (nT) and Q (nT) between one symbol in the orthogonal coordinate format are output from the delay detection section 121.

(Equation 12)

Where Δφ (nT) = φ ((n−1) T) −φ (nT) Δξ (nT) = ξ ((n−1) T) −ξ (nT) θe = 2πΔfT B = A ² And the modulation phase difference Δφ (nT) takes one of the values 0, ± π / 2, ± π.

FIG. 2 is a signal point arrangement diagram based on equation (12). However, in FIG. 2, the difference Δξ (nT) between the phase noise components is “0”. Here, the range of the frequency offset amount Δf is set to ＴT <| Δf | <１ ／ T.

The white circle in FIG. 2 is a signal point of Δf = 0, and its argument is Δφ (nT). Also, the black circles indicate Δf ≠ 0 (1
/ 8T <Δf <1 / 4T), and its argument is Δφ (nT) + θe.

Next, the frequency offset estimating unit 122
It is determined in which quadrant I (nT) and Q (nT) output from the delay detection unit 121 exist. Here, in FIG. 2, the region of −π / 4 ≦ θ <π / 4 is defined as a first quadrant, and π / 4 ≦.
In the region of θ <3π / 4, the second quadrant, 3π / 4 ≦ θ <5π /
The area of 4 is the third quadrant, and the area of 5π / 4 ≦ θ <7π / 4 is the fourth quadrant.

The frequency offset estimating section 122
Performs a phase rotation process by the following equation (13) based on the determination result, and converts all signal points present in each quadrant into the first quadrant as shown in FIG.

(Equation 13)

However, when the signal point exists in the first quadrant: ψ (n) = 0 When the signal point exists in the second quadrant: ψ (n) = − π / 2 The signal point exists in the third quadrant When: ψ (n) = − π When the signal point exists in the fourth quadrant: ψ (n) = − 3π / 2.

Here, the above equation (13) is replaced with the above equation (12).
Is substituted into the following equation (14). As shown in FIG. 2, when the angle θe ′ is 0 <Δf with respect to the signal point existing in the Mth quadrant when Δf = 0, the (M)
+1) indicates the phase difference between the signal point for Δf = 0 in the quadrant and the actual received signal point, and if Δf <0, the (M−
1) The phase difference between the signal point for Δf = 0 in the quadrant and the actual received signal point is shown.

[Equation 14]

Then, the frequency offset estimating section 122
Performs an averaging process to suppress the difference Δξ (nT) between the phase noise components. Here, when the TCXO control signal is updated every N symbol periods, Ir (nT), Qr
The average values Ire (mNT) and Qre (mNT) of (nT) can be approximately indicated by the following equation (15).

(Equation 15)

The frequency offset estimating section 122 uses the average values Ire (mNT) and Qre (mNT) to calculate the frequency offset estimated value Df (mNT) according to the following equation (16).

(Equation 16)

Here, the above equation (16) is replaced by the above equation (15).
Is substituted, the following equation (17) is obtained. Then, as is clear from equation (17), when the range of the frequency offset amount Δf is １ ／ T <| Δf | <＜ T, the frequency offset amount is not correctly estimated.

[Equation 17]

Next, the update data generation unit 123 sets the frequency offset estimation value Df (mNT) to the same value in consideration of the reception carrier frequency, the output range of the D / A converter 131, the number of bits, and the control sensitivity of the TCXO 109. It is converted into proportional TCXO control data update data Ef (mNT).

Normally, the changeover switch 126 connects the TCXO control data generator 127 to the update data generator 123, and the TCXO control data generator 127 receives the update data Ef (mNT).

The TCXO control data generator 127 performs a reverse integration process represented by the following equation (18) using the update data Ef (mNT), and generates the TCXO control data C (mNT).
To update.

(Equation 18)

Updated TCXO control data C (mNT)
Is converted into an analog control signal by the D / A converter 131 and output to the TCXO 109. As a result, the oscillation frequency of the TCXO 109 is controlled such that the frequency of the local signal output from the local synthesizer 110 is shifted by the above-described frequency offset estimated value Df (mNT).

Here, as shown in the above equation (17), the range of the frequency offset Δf is ８T <| Δf | <1 /
In the case of 4T, the oscillation frequency of the TCXO 109 is controlled based on the erroneous estimated value of the frequency offset amount.
The data detection in the synchronous detection and demodulation unit 104 is also not correctly performed, and the synchronous word determination unit continues to determine that the synchronous word is incorrect.

The received signal arranged at point A in FIG. 2 should originally transition to point B in FIG. 2, but the estimation of the frequency offset amount is erroneous. By controlling the frequency, as shown in FIG.
The transition from point to point C occurs.

Therefore, as shown in FIG. 5, the TCXO control signal must be corrected so that the signal that has converged at the current point C transitions to the point B that should be.

The procedure of the correction process will be described below. As shown in FIG. 1, the frequency offset estimator 122
The frequency offset estimation value Df (mNT) output from is input to the update data generation unit 123 and also to the polarity determination unit 124 at the same time.

The polarity determining section 124 determines the polarity of the estimated frequency offset value Df (mNT), and outputs the polarity information of the estimated frequency offset value Df (mNT) to the correction data generating section 125.

The correction data generator 125 generates correction data F0 having a fixed frequency by the following equation (19) based on the polarity information of the frequency offset estimation value Df (mNT).

[Equation 19]

In the above equation (19), K is the reception carrier frequency, the output range of the D / A converter 131,
A conversion coefficient for converting the frequency １ ／ T or あ る い は T into update data of the TCXO control data in consideration of the number of bits and the control sensitivity of the TCXO 109.

The switching control unit 130 includes a synchronization word determining unit 1
In step 06, the number of times that the detected synchronization word is determined to be incorrect is counted, and when the counted value exceeds a preset threshold, the changeover switch 126 is controlled so that the TCXO control data generation unit 127 The data generator 125 is connected.

As a result, the TCXO control data generator 12
7, the correction data F0 is input. The TCXO control data generation unit 127 performs a reverse integration process represented by the following equation (20) using the correction data F0,
Update the O control data C (mNT).

(Equation 20)

Then, the switching control unit 130 controls the switching switch 126 at the update time (m + k) NT (2 ≦ k) of the TCXO control data, and again the TCXO control data generation unit 127 and the update data generation unit 127 Unit 123 is connected.

The TCXO control data generating section 127 performs a reverse integration process represented by the following equation (21) using the update data Ef ((m + k) NT), and executes the TCXO control data C
Update ((m + k-1) NT).

(Equation 21)

As a result, as shown in FIG. 5, the signal point that was erroneously shifted to the point C at the time mNT is changed to the time point mNT.
After (m + 1) NT, the transition can be made to point B, which should be, and the AFC process can be performed correctly.

The range of the frequency offset Δf is |
When Δf | <１ ／ T, the frequency offset estimation is not erroneous, so that the determination result that the synchronization word is incorrect in the synchronization word determination unit 106 does not continue, and normal AFC processing is performed. Will be

As described above, when it is determined from the detection result of the synchronization word that the estimation of the frequency offset is erroneous, the TCXO control data is corrected by using the correction data instead of the update data, so that the frequency pull-in of the AFC process is performed. The range can be extended to ± 1/4 times the symbol rate, which is twice the conventional rate, and a low-precision and inexpensive TCXO can be used in a communication terminal device.

In the first embodiment, a case will be described in which differential detection section 121 detects a phase difference between symbols by multiplying a complex conjugate value of complex received symbol data by complex received symbol data one symbol before. But
The delay detection unit 121 may calculate the argument of the complex received symbol data, and subtract the argument at the current time from the argument of one symbol before to detect the phase difference between the symbols.

(Embodiment 2) FIG. 6 is a block diagram showing a configuration of a communication terminal device equipped with an oscillator control circuit according to Embodiment 2 of the present invention. In the communication terminal device shown in FIG. 6, components having the same operations and operations as those in FIG. 1 are denoted by the same reference numerals as those in FIG.

The oscillator control circuit shown in FIG. 6 is different from the oscillator control circuit shown in FIG.
7, a TCXO control data generator 201 is provided, and a correction data generator 125, a changeover switch 126, and a control data resetter 204 are provided instead of the changeover controller 130.

The TCXO control data generator 201 includes a delay unit 202 that holds the current TCXO control data, and a subtractor that updates the TCXO control data by subtracting the output signal of the update data generator 123 from the output signal of the delay unit 202. Vessel 2
03 to generate TCXO control data.

The control data resetting section 204 counts the number of times that the synchronization word detected by the synchronization word determining section 106 is determined to be incorrect, and if the counted value exceeds a preset threshold, the delay is determined. (Hereinafter referred to as “reset data”) R0 for resetting the control data in the detector 202.
Set.

A method for resetting control data of the oscillator control circuit according to the present embodiment will be described below.

Control data resetting section 204 outputs frequency offset estimated value Df (mNT) output from polarity determining section 124.
Based on the polarity information of
The reset data R0 is generated.

(Equation 22)

Note that K in the above equation (22) is the reception carrier frequency, the output range of the D / A converter 131,
A conversion coefficient for converting the frequency １ ／ T or あ る い は T into update data of the TCXO control data in consideration of the number of bits and the control sensitivity of the TCXO 109. Also,
C (0) is the initial value of the TCXO control data at the time when the AFC process is started.

The control data resetting section 204 counts the number of times that the synchronization word detected by the synchronization word determining section 106 is determined to be incorrect, and sets the counted value to a predetermined threshold value.
If it exceeds L, the reset data R0 is set in the delay unit 202 of the TCXO control data generation unit 201 at time mNT, and the output from the update data generation unit 123 is set to “0”.

As a result, at time mNT, TCXO control data generating section 201 outputs reset data R0. Then, in this state, the frequency offset is estimated again, and the TCXO control data update time (m
In (+1) NT, the reverse integration processing represented by the following equation (23) is performed to update the TCXO control data C (m + 1) NT.

(Equation 23)

Hereinafter, TCXO is similarly performed at N symbol periods.
Update control data. As a result, as shown in FIG. 7, the signal existing at the point A in the initial value C (0) transitions to the point D by resetting the new initial value R0, and the signal B in FIG. ± π / 4 phase difference with respect to point
Within. Therefore, the frequency offset amount is correctly estimated, and as shown in FIG. 8, the point D can be made to converge to the original point B, and the AFC processing can be performed correctly.

The range of the frequency offset Δf is |
When Δf | <1 / (8T), the estimation of the frequency offset is not erroneous, so that the determination result that the synchronization word is incorrect in the synchronization word determination unit 106 does not continue, and the normal AFC processing is performed. Is performed.

As described above, when it is determined from the detection result of the synchronization word that the estimation of the frequency offset is erroneous, T
By resetting the initial value of the CXO control data and starting the update process again, the frequency pull-in range of the AFC process can be expanded to ± １ ／ times the symbol rate, which is twice the conventional value, and communication can be performed. Inexpensive and low-cost TCXO can be used in the terminal device.

In each of the above embodiments, the CDMA (code division multiple access) system has been described as the multiple access system, but the present invention is not limited to this.
Similar effects can be obtained even when another multiple access method such as a DMA (time division multiple access) method is used.

[0114]

As described above, according to the oscillator control circuit and the oscillator control method of the present invention, the frequency pull-in range of AFC processing is expanded to ± 1/4 times the symbol rate which is twice the conventional rate. Therefore, a low-precision and inexpensive TCXO can be used in the communication terminal device.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a CDMA communication terminal device equipped with an oscillator control circuit according to a first embodiment of the present invention;

FIG. 2 is a signal point arrangement diagram of a delay detection unit output of the oscillator control circuit according to the embodiment.

FIG. 3 is a signal point arrangement diagram in a frequency offset unit of the oscillator control circuit according to the embodiment.

FIG. 4 is a signal point arrangement diagram of an output of a delay detection unit of the oscillator control circuit according to the embodiment.

FIG. 5 is a signal point arrangement diagram of an output of a delay detection unit of the oscillator control circuit according to the embodiment.

FIG. 6 is a block diagram showing a configuration of a CDMA communication terminal device equipped with an oscillator control circuit according to Embodiment 2 of the present invention;

FIG. 7 is a signal point arrangement diagram of an output of the delay detection unit of the oscillator control circuit according to the embodiment.

FIG. 8 is a signal point arrangement diagram of an output of a delay detection unit of the oscillator control circuit according to the embodiment.

FIG. 9 is a block diagram showing a configuration of a CDMA communication terminal device equipped with a conventional oscillator control circuit.

FIG. 10 is a signal point arrangement diagram of an output of a delay detection unit in a conventional oscillator control circuit.

FIG. 11 is a signal point arrangement diagram in a frequency offset unit in a conventional oscillator control circuit.

[Explanation of symbols]

 106 Synchronization word determination unit 108 Oscillator control circuit 109 Temperature compensated oscillator (TCXO) 121 Delay detection unit 122 Frequency offset estimation unit 123 Update data generation unit 124 Polarity determination unit 125 Correction data generation unit 126 Changeover switch 127, 201 TCXO control data generation Unit 130 switching control unit 204 control data resetting unit

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Claims (10)

[Claims] 1. An update data generation unit for generating update data of oscillator control data based on an estimated frequency offset amount, a correction data generation unit for generating correction data based on the polarity of the frequency offset amount, Oscillator control data generating means for generating either oscillator control data by subtracting either the update data or the correction data from the oscillator control data, and switching to input either the update data or the correction data to the oscillator control data generating means An oscillator control circuit, comprising: a control unit. 2. The switching control means counts the number of times that the synchronization word included in the received signal is continuously incorrect, and generates correction data when the count value exceeds a preset threshold. 2. The oscillator control circuit according to claim 1, wherein said oscillator control circuit inputs the signal to said means. 3. The correction data generating means, when the polarity of the frequency offset amount is positive, is -−１ of the symbol rate.
The multiplication factor is multiplied by a predetermined coefficient to generate correction data. If the polarity of the frequency offset amount is negative, the symbol rate is 1
3. The oscillator control circuit according to claim 1, wherein correction data is generated by multiplying the predetermined coefficient by / 4 times. 4. An update data generating means for generating update data of oscillator control data based on an estimated frequency offset amount, and an oscillator control data obtained by subtracting the update data from a previous oscillator control data written in a buffer. Oscillator control data generating means for controlling an oscillator and writing control data to the buffer; and oscillator control data resetting means for resetting the oscillator control data written to the buffer. Oscillator control circuit. 5. The oscillator control data resetting means counts the number of times the synchronization word included in the received signal is continuously incorrect, and when the counted value exceeds a preset threshold value,
5. The oscillator control circuit according to claim 4, wherein the oscillator control data written in the buffer is reset. 6. A communication terminal device comprising the oscillator control circuit according to claim 1 and performing automatic frequency control on the oscillator. 7. A base station apparatus for performing wireless communication with the communication terminal apparatus according to claim 6. 8. An oscillator control data update data is generated based on the estimated frequency offset amount, and a correction data is generated based on the polarity of the frequency offset amount. Is subtracted to generate the control data of the oscillator, and when the number of times that the synchronization word included in the received signal is consecutively incorrect exceeds a preset threshold, the correction data is subtracted from the control data of the previous oscillator. And generating control data for the oscillator. 9. When the polarity of the frequency offset amount is positive, correction data is generated by multiplying the symbol rate by − ／ times a predetermined coefficient, and when the polarity of the frequency offset amount is negative, the symbol rate is 9. The oscillator control method according to claim 8, wherein correction data is generated by multiplying 1/4 times the predetermined coefficient by the predetermined coefficient. 10. An oscillator control data update data is generated based on the estimated frequency offset amount, and the oscillator is controlled by the oscillator control data obtained by subtracting the update data from the previous control data written in the buffer. Writing the oscillator control data to the buffer, and resetting the oscillator control data written to the buffer when the number of times that the synchronization word included in the received signal is continuously incorrect exceeds a preset threshold. Characteristic oscillator control method.