JP2000232330A - Delay circuit - Google Patents

Abstract

(57) [Problem] To provide a delay circuit which contributes to downsizing and economic efficiency when an application frequency band of the delay circuit is limited to a relatively narrow band. SOLUTION: Two parallel resonance circuits are constituted by dielectric resonators 14 and 15 and voltage variable capacitance diodes 8 to 11, and these two parallel resonance circuits are connected to a variable capacitance capacitor 51.
To join. By applying a reverse bias voltage to the voltage variable capacitance diodes 8 to 11 and controlling the voltage change, the center frequency of the BPF constituted by two parallel resonance circuits can be varied. By changing the capacitance of the variable capacitor 51, the delay time of the high-frequency signal can be changed.
The delay circuit units 101 to 10n having the above configuration are connected in cascade, and a control circuit 100 for supplying a bias voltage to each delay circuit unit is provided to constitute a delay circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for processing a high frequency signal of a radio communication device in a radio frequency band of VHF to UHF, and to a delay circuit for intentionally delaying the high frequency signal.

[0002]

2. Description of the Related Art Conventionally, in a radio communication apparatus, there is a case where a circuit for delaying a part of a high-frequency signal is installed in order to realize the apparatus performance. For this purpose, a delay element is inserted in a signal propagation path. However, obtaining a desired delay time is widely practiced.

As the delay element, a transmission line such as a coaxial cable is widely used, and among coaxial cables, a so-called semi-rigid coaxial cable using a seamless metal tube as an outer conductor is compared with a braided coaxial cable. Therefore, it is preferably used because it has excellent uniformity of structural accuracy and, as a result, stable electric characteristics can be obtained.

[0004]

The delay time characteristic of the above-mentioned semi-rigid coaxial cable is about 5 nanoseconds per unit length (1 m). It can be relatively easily housed in the apparatus by processing it (for example, processing it into a coil shape) (however, the allowable bending radius is limited according to the external dimensions of the cable).

[0005] However, assuming that the desired delay time reaches several hundred nanoseconds, for example, the cable length in the case of 200 nanoseconds is about 40 m. Assuming dimensions, it is difficult to install (store) the cable.

Further, semi-rigid coaxial cables generally have a standard length of about 2 m in terms of manufacture, and when the cable length is to be extended, it is necessary to use a relay connector or the like, which deteriorates economic efficiency. Although a cable having a cable length of about several tens of meters can be manufactured, it is different from a general manufacturing process, so that the economic efficiency is similarly deteriorated.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional drawbacks by focusing on the fact that the frequency band to which a delay circuit is applied is limited to a relatively narrow band in a wireless communication apparatus especially for mobile communication. Another object of the present invention is to provide a delay circuit that contributes to miniaturization, economy, and economy.

[0008]

The object of the present invention is to provide a high-frequency signal path in which a plurality of delay circuit units are connected in cascade, and a control circuit for supplying and controlling a bias voltage to each of the delay circuit units. Comprises two parallel resonance circuits each comprising a circuit in which a dielectric resonator having a high dielectric constant and a voltage variable capacitance diode to which a reverse bias voltage is applied are connected in parallel in a high frequency equivalent manner. And a variable capacitor for controlling the delay time of a passing high-frequency signal. The center frequency of the bandpass characteristic formed by the two parallel resonance circuits coupled by the variable capacitor is set to the voltage variable capacitor diode. Is controlled by controlling the reverse bias voltage applied to the control signal.

The above object is also achieved by providing a plurality of high-frequency signal paths in which a plurality of delay circuit units are cascaded, a path switch for switching the plurality of high-frequency signal paths, and a control of supplying a bias voltage to each of the delay circuit units. And a control circuit for switching and controlling the path changeover switch, wherein the delay unit comprises a dielectric resonator having a high dielectric constant and a voltage variable capacitance diode to which a reverse bias voltage is applied in parallel in a high-frequency manner. It comprises two parallel resonance circuits composed of connected circuits, and comprises a variable capacitor that couples the parallel resonance circuits to each other and controls a delay time of a passing high-frequency signal, and the two parallel capacitors coupled by the variable capacitor. Applying the center frequency of the bandpass filter characteristic formed by the parallel resonance circuit to the voltage variable capacitance diode In which a variable by controlling the bias voltage, is accomplished by.

According to the above means, the delay circuit unit can vary the center frequency of the BPF by controlling the reverse bias voltage applied to the voltage variable capacitance diode, and By varying the capacitance, the delay time of the passing high-frequency signal can be varied.

The delay circuit is constructed by cascade-connecting the plurality of delay circuit units. The delay time is variable depending on each delay circuit unit and the number of cascade-connected delay units, and the degree of freedom for any request is increased. Is improved.

Further, by switching and using a plurality of high-frequency signal paths in which a plurality of delay circuit units are cascaded by a path switch, the variable range of the delay time is further expanded and the degree of freedom is improved.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

When it is desired to separate and select only a specific frequency band, a band-pass filter (BPF) is widely used.
As a configuration method for realizing the BPF, a configuration in which two parallel resonance circuits 16 and 17 are combined as shown in FIG. 3 is used. The parallel resonance circuits 16 and 17 each include an inductance L and a capacitor C, which are electrically coupled by the coupling capacitor 5.

Reference numerals 1 and 2 designate an input terminal and an output terminal, which are connected to an input transmission line and an output transmission line, respectively. Further, the capacitors 3 and 4 are provided mainly for the purpose of matching the characteristic impedance of the input or output transmission line with the parallel resonance circuit.

In the configuration shown in FIG. 3, the center frequency of the BPF is substantially determined by the values of L and C, which are components of the parallel resonance circuits 16 and 17. Further, the selection characteristic as the BPF can be changed by appropriately changing the value of the coupling capacitor 5, and at the same time, the delay characteristic, in other words, the delay time of a signal passing through the BPF can be changed.

The present invention is an application of these properties. FIG. 1 is a configuration diagram of a unit unit of the delay circuit of the present invention. In FIG. 1, the parallel resonance circuit unit includes dielectric resonators 14 and 15 and a voltage variable capacitance diode 8,
9, 10, and 11. Dielectric resonance 14,
Numeral 15 has a high dielectric constant, and the resonance frequency is set slightly higher than the frequency to be selected. The voltage variable capacitance diodes 8 to 11 have a characteristic that the capacitance value changes in accordance with the change in the applied reverse bias voltage.

The dielectric resonator 14 and the voltage variable capacitance diodes 8 and 9 constitute one parallel resonance circuit, and the dielectric resonator 15 and the voltage variable capacitance diodes 10 and 11 constitute another parallel resonance circuit. . Voltage variable capacitance diode 8,
9 is applied from the bias voltage application control terminal 13 via the resistor 6 for preventing high frequency signals. Another voltage variable capacitance diode 1
Reverse bias voltages for 0 and 11 are applied from a bias voltage application control terminal 13 via a resistor 7. The capacitor 12 connected between the terminal 13 and the ground is intended for decoupling of the bias voltage supply circuit connected to the terminal 13.

As the coupling capacitor 51 for coupling the two parallel resonance circuits, a variable capacitance capacitor having a variable capacitance value is used.

2 coupled by a coupling capacitor 51
The center frequency of the BPF constituted by the two parallel resonance circuits can be varied by controlling the reverse bias voltage applied from the terminal 13 to the voltage variable capacitance diodes 8, 9 and the voltage variable capacitance diodes 10, 11. The delay characteristic can change the delay time of the passing high-frequency signal by changing the capacitance of the variable capacitor 51.

When the frequency band applicable to the delay circuit is limited to a relatively narrow band, the BP is controlled by controlling the reverse bias voltage applied to the voltage variable capacitance diodes 8 to 11.
The center frequency of F can be varied, and required delay time characteristics at the applied frequency can be easily obtained.

FIG. 2 is a circuit diagram in which the configuration of FIG. 1 is modified as a high-frequency equivalent circuit. In FIG. 2, 161,
Reference numeral 171 denotes a parallel resonance circuit, in which L 'represents the equivalent inductance of the dielectric resonators 14 and 15 in FIG. 1, and C' is the parallel combined capacitance of the voltage variable capacitance diodes 8 and 9 in FIG. Or voltage variable capacitance diodes 10 and 11
Of the parallel combined capacity.

The parallel combined capacitance C 'depends on the reverse bias voltage of the voltage variable capacitance diodes 8 to 10. In other words, the resonance frequency of the parallel resonance circuits 161 and 171 is made variable by the control voltage applied to the control terminal 13, that is, the center frequency of the band to be selected is made variable from the characteristics of the BPF. Can be.

The delay characteristic of the variable capacitor 5
The delay time of the passing high-frequency signal can be varied by changing the capacitance of the first signal.

FIGS. 4 and 5 show 280M to which the present invention is applied.
4 shows an actual measurement characteristic diagram of a Hz band delay circuit. By controlling the reverse bias voltage, the center frequency of the BPF is 276 MHz (FIG. 4),
And 288 MHz (FIG. 5). However, in this example, the capacitance value of the coupling capacitor 51 of the parallel resonance circuit is selected so that the required delay time is approximately 200 nanoseconds.

FIG. 6 shows a schematic external size of a delay circuit which realizes the measured characteristics shown in FIGS. This dimension 25
mm × 35 mm × 12 mm, and the size is significantly smaller than that of a circuit using a semi-rigid cable used in the prior art.

FIG. 7 shows an embodiment of the present invention. The delay circuit having the configuration shown in FIG. 1 is used as a unit unit (delay circuit unit), and N units (101 to 10) are provided.
n) A cascade-connected delay circuit. In FIG. 7, the supply of the reverse bias voltage to each of the delay circuit units 101 to 10n is controlled by a bias supply control circuit 100n. The delay time can be changed and controlled by controlling the supplied reverse bias voltage, and the bias voltage is controlled according to a desired delay time.

FIG. 8 shows still another embodiment of the present invention, in which N (2 (2)) delay circuit units having the configuration shown in FIG.
01 to 20n) A high-frequency signal path connected in cascade and a delay circuit unit (301 to 30 m) are connected to a high-frequency signal path connected in cascade by a changeover switch 501, and the output is changed over by a changeover switch 503. The cascade connection paths of the delay circuit units 301 to 30m are switched by the changeover switch 502, and the delay circuit units 30 to 30m are switched.
The path is switched between the case where the 1-30M path is directly connected to the changeover switch 503 and the case where the path is further connected to the changeover switch 503 via the delay circuit unit 401. The control circuit 200 has a function of controlling the supply of the bias voltage of each delay circuit unit and controlling the switching of each of the switches 501 to 503.

The cascade connection of the delay circuit units shown in FIG. 7 or FIG. 8 allows the delay time to be controlled to a large delay time of several hundred nanoseconds or more, increasing the degree of freedom of the delay time and making it applicable to various wireless communication systems. It becomes possible.

Further, by increasing or decreasing the number of connections of the path switching switch and the delay circuit unit, or by changing the combination, delay circuits having various configurations other than those shown in FIGS. 7 and 8 can be realized.

It is apparent that the signal loss due to the insertion and installation of the path switching switch and the plurality of delay circuit units can be compensated by appropriately adding an amplifier to the delay circuit.

[0032]

As described above, according to the present invention, VHF ~
As a delay circuit of a wireless communication device in the UHF band, Equation 1
A relatively large delay time of 00 nanoseconds can be easily realized. Also, by using the BPF, it is possible to make the device relatively small and economical. In addition, a plurality of BPF delay circuits are used as unit units, and by controlling the bias supply of each delay circuit unit, it is possible to respond to requests for various delay times, and the degree of freedom is improved.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a delay circuit unit according to an embodiment of the present invention.

FIG. 2 is an equivalent circuit configuration diagram of FIG. 1;

FIG. 3 is a configuration diagram of a general BPF for explaining the present invention.

FIG. 4 is a characteristic diagram of the delay circuit unit of the present invention.

FIG. 5 is a characteristic diagram of the delay circuit unit according to the present invention.

FIG. 6 is a schematic external view of a delay circuit unit according to the present invention.

FIG. 7 is a configuration diagram of a delay circuit according to an embodiment of the present invention.

FIG. 8 is a configuration diagram of a delay circuit according to another embodiment of the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 input terminal 2 output terminal 3 4 matching capacitor 6 7 resistance 8 10 voltage variable capacitance diode 12 decoupling capacitor 13 reverse bias voltage application control terminal 14 15: dielectric resonator, 51: coupling capacitor, 161, 171: parallel resonance circuit, 100, 2
00: control circuit, 101 to 10n, 201 to 20n, 3
01 to 30 m, 401... Delay circuit unit, 501 to 5
03 ... Changeover switch.

Claims (2)

[Claims] 1. A delay circuit unit comprising: a high-frequency signal path in which a plurality of delay circuit units are connected in cascade; and a control circuit that controls the supply of a bias voltage to each of the delay circuit units. A parallel resonance circuit consisting of a circuit in which a resonator and a voltage variable capacitance diode to which a reverse bias voltage is applied is connected in parallel in a high-frequency manner,
And a variable capacitor for coupling the parallel resonance circuits to each other to control the delay time of a high-frequency signal passing therethrough.
A delay circuit, wherein a center frequency of a band-pass filter characteristic formed by two parallel resonance circuits is made variable by controlling a reverse bias voltage applied to the voltage variable capacitance diode. 2. A plurality of high-frequency signal paths in which a plurality of delay circuit units are cascaded, a path switch for switching the plurality of high-frequency signal paths, a bias voltage supply control to each of the delay circuit units, and the path switching. A control circuit for controlling switching of the switch, wherein the delay unit comprises a circuit in which a dielectric resonator having a high dielectric constant and a voltage variable capacitance diode to which a reverse bias voltage is applied are connected in parallel in a high-frequency manner. 2 parallel resonance circuits
And a variable capacitor for coupling the parallel resonance circuits to each other to control the delay time of a high-frequency signal passing therethrough.
A delay circuit, wherein a center frequency of a band-pass filter characteristic formed by two parallel resonance circuits is made variable by controlling a reverse bias voltage applied to the voltage variable capacitance diode.