JP2000209871A - Reconnection operation method after power restoration by photovoltaic power converter - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To quickly reconnect a power conversion device for photovoltaic power generation that is connected to a power system after a power outage. In a power converter controlled based on a current command obtained by multiplying a reference sine wave frequency command value fref by a predetermined value, a system voltage Vs synchronized with a system voltage Vs is provided.
PLL for generating a deviation between s and reference sine wave signal Vref
By providing the holding circuit 3 for holding the output of the circuit 2 at the value immediately before the power failure, the frequency deviation is reduced and high-speed tracking is enabled.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter for photovoltaic power generation (also referred to as a PV inverter) for supplying power generated by a solar cell to a power system in connection with a power system, and more particularly to a power converter after a PV inverter power failure. It relates to a reconnection operation method.

[0002]

2. Description of the Related Art FIG. 3 shows a control block of a current control type PV inverter using a generally known voltage source inverter. In the figure, 9 is a maximum power tracking control circuit, 10 is a DC voltage regulator (DCAVR), 11 is a multiplier, 12 is a current regulator (ACR), 13 is a PWM (pulse width modulation) signal generation circuit, and 14 is A solar cell, 15 is a DC capacitor, and 16 is a PWM inverter.

First, a DC voltage command (Vd ^* ) output from the maximum power tracking control circuit 9 and a DC voltage detection value (V
d: the capacitor voltage) is input to the DCVCR 10 to obtain an inverter output current amplitude command value (| i ^* |). Next, the multiplier 11 multiplies | i ^* | by a reference sine wave signal (V _ref ) having the same phase as the system voltage to generate an instantaneous value command (i ^* ) of the output current. The deviation between the command value (i ^* ) and the output current detection value (i) is input to a current controller (ACR) 12 to obtain an output voltage command value (λ ^* ) of the PWM inverter 16. The PWM 13 generates a PWM signal based on the λ ^* , and supplies power from the inverter 16 to the power system by firing the switching element of the inverter 16.

FIG. 4 shows an example of a frequency command operation circuit of a PV inverter. Here, the reference frequency calculation circuit 1 outputs the reference frequency f50 / 60. In order to output a signal synchronized with the system voltage, the system voltage Vs and the reference sine wave V
ref is input to the PLL circuit 2 and the frequency correction signal Δf
Is output. The Δf and the reference frequency f50 / 60 are added to obtain a new reference sine wave command value fref. In the event of a power failure, the power failure detection circuit 7 determines the level of the system voltage Vs, and when the PDWN (power failure detection signal) signal is turned on, the inverter stops immediately and an appropriate settling time (see timer 8B).
Later, the main circuit is automatically disconnected from the system, and switches to independent operation (-RUN2 turns on). F at this time
ref becomes the reference frequency f50 / 60 since the frequency correction signal becomes 0 by the Δf switching circuit 4A.

Next, when the system is restored, after the system voltage is established, the PLL (phase locked loop) circuit 2
Synchronizes Vref with the system voltage Vs. The synchronization detection circuit 6 detects that Vref is synchronized with Vs, and turns on the synchronization confirmation signal SYCN. After the SYCN signal is turned on and a timer for confirming the restoration of power (see timer 8A), the operation logic circuit 8 turns on the inverter operation command signal RUN1 to start the reconnection operation of the inverter.

FIG. 5 shows a time chart at the time of a power failure. As in the case of switching to the self-sustaining operation, at the same time as the PDWN signal of -a) is turned on by the detection of a power failure,
The interconnecting operation command signal RUN1 in (b) turns off. The synchronization detection circuit 6 also turns off the synchronization confirmation signal SYNC of -d). After the autonomous operation confirmation time, the autonomous operation command RUN2 of -c) is turned on.

[0007] As in the case where the power is restored in the system, the power failure detection circuit 6 detects the restoration of power, and the PDWN signal of -a) is turned off. At the same time, the zero hold of Δf is released by the Δf switching circuit 4A as −f), and the PLL circuit 2 operates to synchronize the system voltages Vs and Vref. When the synchronization detection circuit 6 detects that Vref is synchronized with Vs, after the PLL operation time (T1) as shown in -d),
Turn on the synchronization confirmation signal SYNC. After the power restoration confirmation timer (T2), the operation logic circuit 8 turns on the inverter operation command signal RUN1 as indicated by -b), and causes the inverter to operate in reconnection.

[0008]

In the above-described reconnection sequence operation of the inverter at the time of the instantaneous power failure, the operation of synchronizing the inverter reference sine wave signal Vref after system voltage recovery with the system voltage signal Vs is performed by the PLL circuit 2. However, it takes a time corresponding to the frequency deviation before the signals are synchronized. Since the operation speed of the PLL circuit is stable, the response speed cannot be increased, so that it takes time to restart the inverter in the reconnection sequence. Therefore, an object of the present invention is to reduce the start-up time of the inverter during reconnection.

[0009]

In order to solve such a problem, according to the first aspect of the present invention, a DC voltage control loop is a major loop, and an output current command obtained by multiplying its output by a reference sine wave signal is provided. A power converter with a current control minor loop that performs current control based on the value is connected to the power system and supplies the power generated by the solar cell to the power system, and switches to autonomous operation when a power outage of the power system is detected In performing the reconnection operation with the power system after the power recovery, a correction signal generation unit that outputs a correction signal that is represented by a deviation between the reference sine wave signal and the system voltage signal and that is synchronized with the system voltage signal, A holding means for holding a value immediately before the power failure detection of the correction signal generating means is provided, and after the power is restored, a value obtained by adding the reference frequency to the value held by the holding means is set to a frequency command for the reference sine wave. To have so as to initiate a re-interconnected operation. In the first aspect of the present invention, the correction signal generating means may be a phase locked loop (PLL) circuit (the second aspect of the present invention).

[0010]

FIG. 1 is a block diagram showing an embodiment of the present invention. As is clear from FIG.
The feature is that a holding circuit 3 for Δf is added to the output of the L circuit 2. Although the holding circuit 3 is shown here as hardware, it may be realized as software. That is,
Until immediately before the power failure is detected, Δf1 = Δf2 = Δf3. Now, when a power failure is detected by a power failure detection circuit similar to that of FIG. 3, the PDWN signal shown in FIG. 2A) is turned on, the inverter is stopped, and the holding circuit 3 changes Δf2 immediately before the power failure to）, ト). To hold. At this time, Δf1 is held at 0 by the switching circuit 4.

When the system is restored, the PDWN signal is turned off, and the switching circuit 4 changes the value of Δf1 from 0 to the previously held value Δf2 as shown in FIG. 2), and starts the PLL operation. The change amount of the system frequency before and after the power failure is considered to be almost zero. Thus, by adding the holding circuit 3 to the conventional control circuit, Vre
Since the deviation between f and Vs is very small, the PLL operation time is shortened as shown by T1 'in FIG. 2E) (T1>T1') as compared with the conventional method (T1> T1 '), enabling high-speed synchronous detection. Becomes After detecting the synchronization, the synchronization confirmation signal SYN
C is turned on as shown in FIG.
The interconnection operation command signal RUN1 is turned on to restart the inverter.

[0012]

According to the present invention, the PLL operation time can be reduced by a simple configuration in which a holding circuit is simply added to the conventional control circuit, and as a result, the startup time of the inverter during reconnection can be reduced. The possible advantages are obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a time chart for explaining the operation of FIG. 1;

FIG. 3 is a block diagram showing a conventional example.

FIG. 4 is a block diagram illustrating a frequency command calculation circuit.

FIG. 5 is a time chart for explaining an operation at the time of a power failure.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Reference frequency calculation circuit, 2 ... PLL (phase locked loop) circuit, 3 ... Holding circuit, 4,4A ... Switching circuit, 5 ... Reference sine wave calculation circuit, 6 ... Synchronization detection circuit, 7 ...
Power failure detection circuit, 8: operation logic circuit, 8A, 8B: timer, 9: maximum power tracking control circuit, 10: DC voltage regulator, 11: multiplier, 12: output current regulator, 13: P
WM (pulse width modulation) pulse generation circuit, 14 ... solar cell, 15 ... DC capacitor, 16 ... PWM inverter.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5G066 HA02 HA04 HA06 HB06 5H007 AA05 BB07 CC01 CC03 DA03 DA05 DB01 DB07 DC04 DC05 EA02 FA02

Claims (2)

[Claims] A power converter having a current control minor loop for performing a current control based on an output current command value obtained by multiplying a DC voltage control loop by an output current command value obtained by multiplying an output of the DC voltage control loop by a reference sine wave signal is provided in an electric power system. When the power generated by the solar cells is interconnected and supplied to the power system, and when a power outage of the power system is detected, the operation is switched to the self-sustained operation. The correction signal generating means for outputting a correction signal which is represented by a deviation between the signal and the system voltage signal and which is synchronized with the system voltage signal is provided with a holding means for holding a value immediately before the power failure detection of the correction signal generating means. After the power generation, a re-interconnection operation is started with a value obtained by adding the reference frequency to the value held by the holding means as a reference sine wave frequency command. Re interconnected operation method after power failure by. 2. The reconnection operation after power restoration by the photovoltaic power converter according to claim 1, wherein the correction signal generation means is a phase locked loop (PLL) circuit. Method.