JP2000209042A - Amplifier circuit and mixer circuit - Google Patents

Abstract

(57) [Summary] To add two input signals with one transistor. SOLUTION: The gate of a transistor T1 having a drain connected to a load resistor 16 is connected to a first input terminal 11, the back gate is connected to a second input terminal 12, and the input signal of the first and second input terminals 11, 12 is transmitted. The sum signal is amplified and output from the drain.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an amplifier circuit for amplifying an analog signal and a mixer circuit for modulating the signal.

[0002]

2. Description of the Related Art The most basic circuit used for amplifying an analog signal is a common-source amplifier circuit shown in FIG.
This amplifier circuit is configured by connecting the gate of the NMOS transistor T51 to the input terminal 51, connecting the drain to the output terminal 52, connecting the source to the ground terminal 53, and further connecting the load resistor 55 between the drain and the power supply terminal. It was done.

In this circuit, assuming that the threshold voltage of the transistor T51 is Vth and the input voltage of the input terminal 51 is Vi, the drain current Id is Id = a. (Vi-Vth) ² (1) The output voltage Vo appearing at the terminal 52 is as follows: Vo = R · Id = Ra · (Vi−Vth) ² (2) where R is the resistance value of the load resistor 55. a is a constant.

Next, a differential amplifier circuit as shown in FIG. 6 is used as a circuit for obtaining a difference between two signals.
This differential amplifier circuit is configured by using two sets of the common-source amplifier circuit shown in FIG. 61 is an input terminal, 62 is an output terminal, 65 is a load resistor, and 71 is a current source.

In this circuit, when the voltage Va + of the input terminal 51 increases, the current flowing through the circuit 50 increases,
The current flowing through 0 becomes smaller. Therefore, the voltage Vo- of the output terminal 52 decreases, and the voltage Vo + of the output terminal 62 increases. As described above, when the voltage Va + of the input terminal 51 of the circuit 50 is changed, the voltage Vo + of the output terminal 62 of the circuit 60 is also changed, and the potential difference obtained by amplifying the difference between the voltages Va + and Va− of the input terminals 51 and 61 is amplified. A differential signal occurs between the output terminals 52,62.

As a circuit using such a differential amplifier circuit, there is a Gilbert type mixer circuit. This circuit is described in detail in "CMOS Analog Circuit Design Technology" (Triceps ISBN4-88657-733-4 C3055) and the like.

This circuit, as shown in FIG.
Circuit 50 with transistor T51 and resistor 55, NMO
The sources of both transistors T51 and T52 of the circuit 60 including the S transistor T52 and the resistor 65 are connected to the drain of the NMOS transistor T55, and the sources of the separately provided NMOS transistors T53 and T54 are connected to the drain of the NMOS transistor T56.
5, the source of T56 is connected to the ground terminal 53 via the current source 72.
Connected to. The input terminal 51 is a transistor T
The input terminal 61 is connected to the gates of the transistors T52 and T53, respectively.
Is connected to the drains of the transistors T51 and T53, and the output terminal 62 is connected to the drains of the transistors T52 and T54. 73 and 74 are transistors T55 and T5
6 is a differential pulse signal input terminal to the gate of No. 6.

In this circuit, when the voltage Vb + at the input terminal 73 is high (Vdd) and the voltage Vb- at the input terminal 74 is low (GND), the transistor T55 is turned on,
Since the transistor T56 is turned off, the input terminals 51, 6
The signals Va + and Va- of 1 are differentially amplified by the transistors T51 and T52 and appear at the output terminals 62 and 52. On the other hand, the voltage Vb + of the input terminal 73 is low and the voltage Vb + of the input terminal 74 is low.
When b- is at a high level, the transistor T55 turns off,
Since the transistor T56 is turned on, the input terminals 51, 6
The signals Va + and Va- of 1 are differentially amplified by the transistors T53 and T54 and appear at the output terminals 62 and 52, but have opposite polarities. Thereby, the input voltage Va (the input terminals 51 and 6)
The voltage Vo resulting from the multiplication of the polarity of the input voltage Vb (the voltage between the input terminals 73 and 74) and the polarity of the input voltage Vb (the voltage between the input terminals 73 and 74)
Obtained between 2,52.

[0009]

However, in the circuit of FIG. 5, since there is only one input, the sum of the two signals cannot be obtained. Further, the circuit of FIG. 6 can process only two input signals. Further FIG.
In this circuit, since the differential circuits are vertically stacked, the amplitude of the output voltage cannot be increased.

An object of the present invention is to provide an amplifier circuit and a mixer circuit which can add two or more signals, which has been difficult in the past, and can increase the output amplitude by reducing the number of vertically stacked circuits. It is.

[0011]

According to a first aspect of the present invention, there is provided an amplifier circuit in which a gate of a transistor having a drain connected to a load is connected to a first input terminal, and a back gate is connected to a second input terminal. In this configuration, the signal of the sum of the input signals of the first and second input terminals is amplified and output from the drain.

In a differential amplifier circuit according to a second aspect of the present invention, a gate of a first transistor having a drain connected to a first load is connected to a first input terminal, and a back gate is connected to a second input terminal.
A gate of a second transistor having a drain connected to a second load is connected to a third input terminal, a back gate is connected to a fourth input terminal, and sources of the first and second transistors are commonly connected to a current source. And amplifies the difference between the sum signal of the input signals of the first and second input terminals and the sum signal of the input signals of the third and fourth input terminals to amplify the difference between the drains of the first and second transistors. It was configured to output.

According to a third aspect of the present invention, in the differential amplifier circuit, a gate of a first transistor having a drain connected to a first power supply via a first load is connected to a first input terminal, and a drain is connected to the first transistor via a second load. A gate of a second transistor connected to one power supply is connected to a second input terminal, a gate of a third transistor is connected to the second input terminal, and a gate of a fourth transistor is connected to the first input terminal; The drains of the third and fourth transistors are commonly connected to the back gates of the first, second, third and fourth transistors, and the connection point is connected to the first power supply via a current source; The sources of the first, second, third and fourth transistors are commonly connected to a second power supply, and the sum of the input signals of the first and second input terminals and the signal of the third and fourth input terminals. The difference between the sum of the input signals is amplified to And configured to output from the drain of the second transistor.

According to a fourth aspect of the present invention, there is provided a Gilbert-type mixer circuit comprising:
The gate of the first transistor whose drain is connected to the first power supply via the first load is connected to the first input terminal, and the drain is connected to the second input terminal.
A gate of a second transistor connected to the first power supply via a load is connected to a second input terminal, a gate of a third transistor is connected to the second input terminal, and a gate of a fourth transistor is connected to the first input terminal. And the drains of the first and third transistors are respectively connected to a first output terminal, and the drains of the second and fourth transistors are respectively connected to a second output terminal. To the third input terminal, the back gate of the third and fourth transistors to the fourth input terminal, and the sources of the first, second, third and fourth transistors via a current source. The differential signal of the first and second input terminals is multiplied by the differential signal of the third and fourth input terminals. Configured to output from 2 output terminals It was.

[0015]

[First Embodiment] FIG. 1 is a diagram showing an amplifier circuit according to a first embodiment of the present invention. This amplifier circuit
The gate of the NMOS transistor T1 is connected to the input terminal 11,
The back gate is the input terminal 12 and the drain is the output terminal 1.
3, a source is connected to the ground terminal 14, and a load resistor 16 (resistance R) is connected between the drain and the power supply terminal 15.

In this circuit, assuming that the threshold voltage of the transistor T1 changes by ΔVt in accordance with the voltage Vi2 at the input terminal 12, ΔVt = b · Vi2 (3) b is a constant.

Therefore, the threshold value of the transistor T1
Assuming that the voltage is Vth and the voltage of the input terminal 11 is Vi1,
The drain current Id is given by the following equation: Id = a · (Vi1−Vth + ΔVt)^Two  = A · (Vi1-Vth + (b · Vi2))^Two (4) The structure of the transistor T1 is set so that b = 1.
Is set, Id = a. (Vi1 + Vi2-Vth)^Two (5) The output voltage Vo appearing at the output terminal 13
Is as follows: Vo = R · Id = Ra · (Vi1 + Vi2-Vth)^Two (6) As a result, the input voltages Vi1 and Vi2 can be
An amplifier circuit for amplifying the sum can be realized.

On the other hand, the circuit shown in FIG.
, Another NMOS transistor T51
S transistors (not shown) are connected in parallel and
When the voltage Vi2 is input to the transistor gate, the output
The voltage Vo of the force terminal 52 is as follows: Vo = R · a · (Vi1−Vth)^Two+ Ra (Vi2-Vth)^Two  = R ・ a ｛(Vi1-Vth)^Two+ (Vi2-Vth)^Two7 (7) and the sum of the squared voltages of the voltages Vi1 and Vi2 is added.
Even if you use two transistors,
Amplification of the sum of voltages Vi1 and Vi2 cannot be performed.

[Second Embodiment] FIG. 2 is a diagram showing an amplifier circuit according to a second embodiment. This amplifier circuit includes transistors T1 and T2 of circuits 10 and 20 having the same configuration as the circuit shown in FIG.
Are connected to the ground terminal 14 via the current source 31. 21 and 22 are input terminals, and 23 is an output terminal. The resistance value of the resistor 26 is R.

Here, input terminals 11, 12, 21, 22
Each two of the voltage Vi1, Vi2, Vi3, and Vi4, when the voltage of the output terminal 13, 23 and Vo1, Vo2, Vo2-Vo1 = R · a (Vi1 + b · Vi2 -Vi3-b · Vi4) 2 (8) Thus, four inputs (Vi1, Vi2, Vi3, Vi4) can be added or subtracted.

The resistors 16, 26 of the circuits 10, 20
, As shown in (b) of FIG. 8, PMOS transistor T11 operating in biased saturation region at a voltage V _B, T12
Or a PMO with a current mirror connection and a single-ended connection as shown in (c) of FIG.
Similar effects can be obtained with the S transistors T13 and T14.

Third Embodiment FIG. 3 is a diagram showing an amplifier circuit according to a third embodiment. This amplifier circuit includes the circuits 10 and 20 shown in FIG. 2 and a newly provided NMOS transistor T3.
(Same as T1) and T4 (same as T2) and a current source 32. The gates of the transistors T1 and T4 are connected to the input terminal 33, the gates of the transistors T2 and T3 are connected to the input terminal 34, and the transistors T1 and T3 are connected to the input terminal 34. Output terminal 3 for drain
5, the drain of the transistor T2 is connected to the output terminal 36,
Each is connected. Further, the drains of the transistors T3 and T4 and the back gates of the transistors T1 to T4 are commonly connected, and this connection point is connected to the power supply terminal 15 via the current source 32.
, And the sources of the transistors T1 to T4 are connected to the ground terminal 14.

Assuming that the drains of the transistors T3 and T4 are point A, when the potential Va + of the input terminal 33 becomes high,
The potential Vo- of the output terminal 35 decreases, and the transistor T
4 increases, the voltage drop at the current source 32 increases, and the potential at point A decreases. As a result,
The potential of the back gate of the transistors T1 to T4 decreases, and the current flowing through the transistors T1 to T4 decreases. Therefore, the potential Vo + of the output terminal 36 increases. Thus, the same operation as the conventional differential amplifier can be realized by the back gates of the transistors T1 and T2 and the transistors T3 and T4.

In addition, in the conventional differential amplifier, for example, in the circuit shown in FIG.
f, assuming that the voltage drop at the transistors T51 and T52 is Vg, the amplitude of the output voltage Vo is only Vo = Vdd−Vg−Vf (9), whereas the circuit of FIG.
Are not stacked vertically, similarly, the transistors T1 to T
Assuming that the voltage drop of No. 4 is Vg, the amplitude of the output voltage Vo is Vo = Vdd-Vg (10), and is increased by the voltage drop at the current source. That is, the amplitude of the output signal becomes larger by the voltage Vf than in the conventional circuit.

In the circuit shown in FIG. 3, the resistors 16 and 26 can be replaced with an active load or a current mirror load as shown in FIGS. 8 (b) and 8 (c).

[Fourth Embodiment] FIG. 4 is a diagram showing an amplifier circuit according to a fourth embodiment, which is applied to a Gilbert-type mixer circuit. Here, the circuits 10, 20 and the transistors T3 (same as T1), T4 (same as T2) and the current source 37
Is used. The gates of the transistors T1 and T4 are connected to the input terminal 41, the gates of the transistors T2 and T3 are connected to the input terminal 42, the backgates of the transistors T1 and T2 are connected to the input terminal 43, and the backgates of the transistors T3 and T4 are connected to the input terminal 44. The drains of the transistors T1 and T3 are connected to an output terminal 45, and the drains of the transistors T2 and T4 are connected to an output terminal.

In this circuit, when the signal Vb + at the input terminal 43 is set at a high level (Vdd) and the signal Vb- at the input terminal 44 is set at a low level (GND), the transistors T1 and T2 operate but the transistors T3 and T4 operate. Do not work. Also,
When the signal Vb + at the input terminal 43 is set to a low level and the signal Vb- at the input terminal 44 is set to a high level, the transistors T1, T2
Does not operate, but the transistors T3 and T4 operate.

Therefore, between the output terminals 45 and 46,
Voltage Va input between input terminals 41 and 42 and input terminal 4
The voltage Vo obtained by multiplying the voltage Vb input between the terminals 3 and 44 is output.

Compared with the Gilbert mixer circuit of FIG. 7, the transistors T55 and T55 in FIG.
56 becomes unnecessary, and the output amplitude becomes large similarly to the circuit of FIG. 3 by eliminating this transistor.

In the circuit shown in FIG. 4, the resistors 16 and 26 can be replaced with an active load or a current mirror load as shown in FIGS. 8B and 8C.

[Other Embodiments] In each of the above embodiments, the case where an NMOS transistor is used has been described. However, even when a PMOS transistor is used, except that the polarity of the power supply is reversed, the same applies. realizable.

[0032]

As described above, according to the present invention, by inputting a signal to the back gate of a transistor, the addition of two signals, which has been difficult in the past, can be realized with one transistor. In addition, the differential amplifier circuit can add and subtract four input signals, and when applied to this differential amplifier circuit or Gilbert-type mixer circuit, the number of vertically stacked stages can be reduced and the output amplitude can be increased. There is.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of an amplifier circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a differential amplifier circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a Gilbert-type mixer circuit according to a fourth embodiment of the present invention.

FIG. 5 is a circuit diagram of a conventional amplifier circuit.

FIG. 6 is a circuit diagram of a conventional differential amplifier circuit.

FIG. 7 is a circuit diagram of a conventional Gilbert-type mixer circuit.

FIG. 8 is a circuit diagram showing a modification of the load according to the second, third, and fourth embodiments of the present invention.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J066 AA01 AA12 AA57 CA33 CA92 FA00 HA10 HA25 KA05 KA09 KA26 MA21 ND01 ND11 ND22 ND23 PD02 5J092 AA01 AA12 AA57 CA33 CA92 FA00 HA10 HA25 KA05 KA09 KA26 MA21 VL04

Claims (4)

[Claims] 1. A transistor having a drain connected to a load, having a gate connected to a first input terminal, a back gate connected to a second input terminal, and a sum signal of the input signals of the first and second input terminals. An amplifier circuit for amplifying and outputting from the drain. 2. A first transistor having a drain connected to a first load, a gate of the first transistor as a first input terminal, and a back gate of a second transistor as a second input terminal.
A second transistor connected to an input terminal and a drain connected to a second load; a gate of the second transistor connected to a third input terminal; a back gate connected to a fourth input terminal;
The source of the transistor is commonly connected to a current source, and the difference between the signal of the sum of the input signals of the first and second input terminals and the signal of the sum of the input signals of the third and fourth input terminals is amplified. A differential amplifier circuit configured to output signals from drains of the first and second transistors. 3. A second transistor having a drain connected to a first input terminal via a first load, a gate connected to a first input terminal, and a drain connected to the first power supply via a second load.
Connecting the gate of the transistor to the second input terminal, connecting the gate of the third transistor to the second input terminal, connecting the gate of the fourth transistor to the first input terminal,
Drains of the third and fourth transistors are commonly connected to back gates of the first, second, third and fourth transistors, and the connection point is connected to the first power supply via a current source;
The sources of the first, second, third, and fourth transistors are commonly connected to a second power supply, and the sum of the input signals of the first and second input terminals and the third, fourth A differential amplifying circuit characterized in that the difference between the sum of the input signals at the input terminals is amplified and output from the drains of the first and second transistors. 4. A second transistor having a drain connected to the first power supply via a first load, a gate of the first transistor connected to the first input terminal, and a drain connected to the first power supply via a second load.
Connecting the gate of the transistor to the second input terminal, connecting the gate of the third transistor to the second input terminal, connecting the gate of the fourth transistor to the first input terminal,
The drains of the first and third transistors are connected to a first output terminal, the drains of the second and fourth transistors are connected to a second output terminal, and the back gates of the first and second transistors are connected to a third input terminal. The fourth input terminal is connected to the back gate of the third and fourth transistors, and the sources of the first, second, third and fourth transistors are shared by a second power supply via a current source. And a differential signal between the first and second input terminals and the third and fourth differential terminals.
A Gilbert-type mixer circuit, wherein a differential signal resulting from multiplication with a differential signal at an input terminal is output from the first and second output terminals.