JP2000208628A - Production of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a satisfactory contact property without degrading an organic interlayer film. SOLUTION: A lower metal wiring layer 2 is formed in a prescribed region on a semiconductor substrate 1. A contact metal 3 is formed on this lower metal wiring layer 2, While using a photoresist 4A. After the photoresist 4A is removed, an organic inter layer film 5 is formed on that removed surface. In this case, the organic inter layer film 5 is provided so as to cover only the lower part of the contact metal 3, and a second insulating film 6 is formed on the surfaces of the organic inter layer film 5 and the contact metal 3. The second insulating film 6 on the contact metal 3 is removed, and an upper metal wiring layer 7 is formed on the contact metal 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which upper and lower metal wiring layers are connected by a contact metal, and an organic interlayer film is provided therearound. .

[0002]

2. Description of the Related Art A compound semiconductor device using GaAs or the like is a mobile communication MMIC (microwave monolithic semiconductor).
C). As for the MMIC for mobile communication, as typified by a mobile phone, reduction in size and weight is regarded as important, and further miniaturization and multifunctionality are required.
For miniaturization, multilayer wiring is an essential technology. In order to achieve a good insulation between wirings in a multi-layered wiring, the interlayer capacitance must be reduced. For this purpose, a thick (2 μm or more) interlayer film having a low dielectric constant must be used. There is.

Further, in LSIs mainly using a silicon substrate, the influence of the capacitance between wirings becomes remarkable as miniaturization progresses. For this reason, a low dielectric constant film is used between wirings and between layers,
Attempts have been made to suppress the spread of an electric field between wirings and reduce the capacitance between wirings. As a material of the interlayer film, there is a low dielectric constant organic film containing fluorine, and its relative dielectric constant has the lowest value of less than 3, and therefore, its practicality is considered promising.

FIG. 4 shows a conventional method for manufacturing a semiconductor device. Hereinafter, a method of manufacturing a multilayer wiring using an organic film as an interlayer film will be described. As shown in FIG. 4A, after a first insulating film 1 of a silicon oxide film is formed on a semiconductor substrate 10, a lower metal wiring layer 2 is formed using lithography and dry etching. For the lower metal wiring layer 2, a metal material such as Au, A1, W, or WSi can be used. Then, the lower metal wiring layer 2
An organic interlayer film 5 is coated to a thickness of 2 μm using benzocyclobutene (BCB) on the entire surface of the substrate. Then, at 300 ° C, 20
Then, the organic interlayer film 5 is formed. Next, a hard mask 9 is formed on the organic interlayer film 5 by using lithography and dry etching. As the hard mask 9, an insulating film such as a silicon nitride film or a silicon oxide film, a metal film such as titanium or titanium nitride, or a laminated film of an insulating film and a metal film is used. Note that the photoresist (not shown) used for dry etching the hard mask 9 may be left as it is after the dry etching.

Next, using a hard mask 9,
As shown in (b), freon (CF₄ ) And 0₂Gas
RIE (Reactive Ion Etching: Reactive ion etching)
Etching) to dry the organic interlayer film 5 anisotropically.
Contact hole connected to the lower metal wiring layer 2
Forming a mask 11 (a photoresist and a hard mask).
The organic interlayer film 5 is dry-etched using the
The photoresist is removed during the dry etching
Even after the hard mask is exposed after etching
Good).

At the time of this dry etching, an etching deposit 8 made of a dry etching gas, an object to be etched, carbon discharged from the organic interlayer film 5 and the like adheres to the side wall surface in the contact hole 11. As described above, in the opening where the etching deposit 8 exists, FIG.
As shown in (1), the upper metal wiring layer 7 is formed by plating or sputtering. As described above, the multilayer wiring is completed.

[0007]

However, according to the conventional method of manufacturing a semiconductor device, the etching deposits 8 generated when forming the organic interlayer film 5 include those polymerized by plasma. Alcohol, ketones, and the like that can withstand the interlayer film 5 cannot be completely removed. For this reason, the etching adhering substance 8 remains between the base metal wiring layer 2 and the upper metal wiring layer 7, which may lead to poor conduction and increase in contact resistance. When an oxygen plasma treatment or an organic solvent treatment at a high temperature is performed to remove the etching deposits 8, the organic interlayer film 5 does not have resistance to this treatment. Causes a problem of erosion.

The processing up to (a) and (b) of FIG. 5 is the same as that of (a) and (b) of FIG. FIG.
When the oxygen plasma treatment or the high temperature organic solvent treatment is performed after the treatment (b), the inside of the contact hole 11 is deteriorated by erosion as shown in FIG.
As described above, there is a problem that a gap 12 is generated between the upper metal wiring layer 7 and the upper layer.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for manufacturing a multilayer wiring capable of obtaining good contact properties without deteriorating an organic interlayer film.

[0010]

According to the present invention, as a first feature, a lower metal wiring layer is formed on a first insulating film formed on a semiconductor substrate. Forming a contact metal on the lower metal wiring layer, forming an organic interlayer film so as to cover the lower metal wiring layer and a lower portion of the contact metal, and forming a second insulating film on the surface of the organic interlayer film and the contact metal; And forming an upper metal wiring layer on the contact metal by removing the second insulating film on the contact metal.

In order to achieve the above object, the present invention has, as a second feature, a first structure formed on a semiconductor substrate.
Forming a lower metal wiring layer on the insulating film, forming a contact metal on the lower metal wiring layer, forming an organic interlayer film so as to cover the lower metal wiring layer and a lower portion of the contact metal, Forming a second insulating film on the surface of the interlayer film and the contact metal, applying a second photoresist on the second insulating film, and forming the second insulating film on the contact metal and the second insulating film on the contact metal; A method of manufacturing a semiconductor device, comprising removing a photoresist and forming an upper metal wiring layer on the contact metal.

According to each of the above-described manufacturing methods, after the contact metal is connected to the lower metal wiring layer, the organic interlayer film is provided around the lower metal wiring layer and a predetermined portion of the contact metal. The organic interlayer film does not intervene at the connection part of the contact metal. Therefore, even when the organic interlayer film is etched, no erosion of the organic interlayer film in the contact hole can be prevented without generating any etching deposits at the connection between the lower metal wiring layer and the contact metal and around the connection. In addition, a connection failure can be prevented.

In order to achieve the above object, the present invention has a third feature that a lower metal wiring layer is formed on a first insulating film formed on a semiconductor substrate, and the lower metal wiring layer is formed on the first insulating film. Forming an organic interlayer film on the surface of the first insulating film, forming an opening communicating with the lower metal wiring layer in the organic interlayer film, and forming a second opening on an inner peripheral surface and a bottom surface in the opening. Forming an insulating film, removing the second insulating film on the lower metal wiring layer to expose the lower metal wiring layer, and forming an upper metal wiring layer on an exposed surface of the lower metal wiring layer; The present invention provides a method for manufacturing a semiconductor device, characterized in that:

According to this method, an organic interlayer film is formed so as to cover the first insulating film provided on the semiconductor substrate and the lower metal wiring provided on the first insulating film. A contact hole is formed in the film, a second insulating film is formed on the inner surface of the contact hole, and the second insulating film is etched to expose and clean the lower metal wiring. Is provided.
As a result, even when the organic interlayer film is etched, there is no formation of etching deposits at the connection portion between the lower metal wiring layer and the contact metal and around the connection portion, thereby preventing erosion of the organic interlayer film in the contact hole. It is possible to prevent poor connection.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 shows a method of manufacturing a semiconductor device according to the present invention. First, as shown in FIG. 1A, a first insulating film 1 made of a silicon oxide film is formed on a semiconductor substrate 10, and a predetermined surface of the insulating film 1 is formed by lithography and dry etching. Lower metal wiring layer 2 in the region
To form The material of the lower metal wiring layer 2 is gold (A
u), aluminum (Al), tungsten (W), tungsten silicide (WSi), or the like. Next, after forming a photoresist 4A having a thickness of 4 μm and a reverse taper shape, the lower metal wiring layer 2 is used as a plating pass, and Au plating is selectively formed to a thickness of 3 μm to form a contact metal 3.

Next, after removing the photoresist 4A,
Benzocyclobutene (BC) as an organic interlayer film 5 is formed on the entire surface.
B) is thinner than the contact metal 3, for example, 2 μm.
m, and cured at 300 ° C. for 20 minutes. At this time, the entire outer peripheral surface of the contact metal 3 is not covered with the organic coating film 5. That is, as shown in FIG. 1B, the organic interlayer film 5 is formed with a part of the contact metal 3 exposed. In this case, Au
The contact metal 3
If BCB is applied with a smaller thickness, an organic interlayer film can be formed without covering the entire contact metal 3. Reference numeral 13 denotes deposits remaining on the contact metal 3 when the organic interlayer film 5 is provided.

Next, as shown in FIG. 1C, a silicon nitride film is formed on the entire surface of the contact metal 3 and the organic interlayer film 5, and a second insulating film 6 is provided. Next, a photoresist mask is formed, and the second insulating film 6 and the organic interlayer film 5 on the contact metal 3 are etched by RIE using CHF ₃ / CF ₄ / Ar gas. The photoresist mask, the organic interlayer film 5 on the contact metal, and the deposits generated by the etching are removed by plasma using oxygen gas. Thereby, as shown in FIG. 1D, the contact metal 3 having an exposed and clean upper surface is obtained while the organic coating film 5 is covered with the second insulating film 6.

In removing the photoresist, a stripping method using a high-temperature organic solvent can be used in addition to the oxygen plasma treatment. For example, there is a method of dipping in a mixed solution of dichloro-benzene-phenol and alkyl-benzene-sulfonic acid at about 120 ° C., and then dipping in methyl ethyl ketone and alcohol sequentially. Note that the exposed organic coating film is removed by the oxygen plasma or the method using a high-temperature organic solvent, so that the organic interlayer film 5 on the contact metal 3 is removed, but is covered by the second insulating film 6. The organic interlayer film 5 is not damaged. Finally, as shown in FIG. 1E, the upper metal wiring layer 7 is formed by plating or sputtering to obtain a multilayer wiring.

In the method of manufacturing a semiconductor device described above,
The organic interlayer film 5 is thinner than the contact metal 3,
In addition, since the second insulating film 6 is formed on the entire surface after the film is formed so that a part of the contact metal 3 is exposed, the organic interlayer film 5 is not exposed. Even if the oxygen plasma treatment or the high-temperature organic solvent treatment is performed, the organic interlayer film 5 does not deteriorate. Since oxygen plasma treatment and high-temperature organic solvent treatment can be performed, no etching deposits remain on the contact metal 3 (upper metal wiring layer) and the lower metal wiring layer 2, and good contact characteristics can be obtained.

In the above embodiment, the multilayer interlayer film 5
Used an organic interlayer film by coating, but CVD (Ch
An organic interlayer film may be formed by emical vapor deposition. Although BCB was used, any material may be used as long as it is an organic film.

The method of forming the contact metal 3 is as follows.
After the contact metal 3 is sputtered over the entire surface, the contact metal 3 may be formed on the lower metal wiring layer 2 by using a lithography technique and a dry etching technique.

FIG. 2 shows a modification of the manufacturing method of FIG. FIGS. 2A and 2B are the same as FIGS. 1A and 1B, and therefore will not be described. As shown in FIG.
A second layer is formed on the exposed surface of the organic interlayer film 5 and the contact metal 3.
Is provided, and a photoresist 4B is formed on the surface of the second insulating film 6. Next, the photoresist 4B is removed by oxygen plasma or a high-temperature organic solvent. _Further, etched back with CF _{4/0 2} gas, 2
2D, only the second insulating film 6 on the contact metal 3 is removed to expose the contact metal 3 having a clean surface. Thereafter, as shown in FIG. 2E, the upper metal wiring layer 7 is formed on the exposed surface of the contact metal 3.
Is formed by plating or sputtering. According to this method, as in the case of FIG. 1, no etching deposit remains on the contact metal 3 and the lower metal wiring layer 2, and good contact characteristics can be obtained.

(Second Embodiment) FIG. 3 shows another embodiment of the method of manufacturing a semiconductor device according to the present invention. First,
As shown in FIG. 3A, a first insulating film 1 made of a silicon oxide film is formed on a semiconductor substrate 10. Next, the insulating film 1 is formed by using lithography and dry etching.
The lower metal wiring layer 2 using Au, Al, W, WSi or the like is formed in a predetermined region on the surface of the substrate. Next, an organic interlayer film 5 is formed to a thickness of 2 μm on the surfaces of the first insulating film 1 and the lower metal wiring layer 2, and a hard mask 9 is formed at a predetermined position on the organic interlayer film 5 by lithography and dry etching. I do. The hard mask 9 is made of an insulating film such as a silicon nitride film or a silicon oxide film, a metal film such as titanium or titanium nitride, or a laminated film of an insulating film and a metal film. Although the photoresist used for dry etching the hard mask 9 is not shown, it may be left as it is after the dry etching.

Next, as shown in FIG. 3B, the hard mask 9 is used to perform RIE using CF ₄ and O ₂ gas.
The organic interlayer film 5 is anisotropically dry-etched. At this time, the etching deposit 8 adheres to the inner wall and the bottom surface of the opening formed in the organic interlayer film 5. The organic interlayer film 5
The photoresist may be removed during the dry etching, and the hard mask 9 may be exposed after the dry etching. Regarding such a dry etching method, for example, Robert D. Tacito et al., “Patterning of Ben
zocyclobutene by Reactive Ion Etching ", J. Electro
chem. SOC., Vol. 143, No. 8, 1996.

Next, as shown in FIG. 3C, a second insulating film 6 made of a silicon nitride film is grown in the holes of the organic interlayer film 5 and on the hard mask 9. Then
The entire surface of the second insulating film 6 is dry-etched by RIE using CF ₄ and H ₂ gas, and the second insulating film 6 is formed only on the inner side surface of the hole by the organic interlayer film 5 as shown in FIG. To form a sidewall protective film. Thereafter, an oxygen plasma treatment or a treatment with a high-temperature organic solvent is performed to remove the etching deposit 8 generated during the dry etching.
Thereby, the surface of lower metal wiring layer 2 is cleaned. Further, as shown in FIG. 3E, the contact metal 3 and the upper metal wiring layer 7 are sequentially formed in the holes by plating or sputtering to form a multilayer wiring.

According to the manufacturing method of FIG. 3, immediately after the organic interlayer film 5 is dry-etched, a side wall protective film of the second insulating film 6 is formed, and thereafter, oxygen plasma processing or high-temperature organic solvent processing is performed. Since the etching deposits 8 are removed by the etching, the same effects as those of the manufacturing method shown in the first embodiment can be obtained.

[0027]

As described above, according to the method of manufacturing a semiconductor device of the present invention, after a contact metal is connected to a lower metal wiring layer, an organic interlayer film is formed around the lower metal wiring layer and a predetermined portion of the contact metal. Is provided so that the organic interlayer film does not intervene at the connection portion between the lower metal wiring layer and the contact metal. Therefore, even when the organic interlayer film is etched, the connection portion between the lower metal wiring layer and the contact metal and the connection portion It is possible to prevent erosion of the organic interlayer film in the contact hole without generating an etching deposit on the periphery, and to prevent connection failure.

According to another manufacturing method of the present invention, an organic interlayer film is formed on the surface of the lower metal wiring layer and the surface of the first insulating film, and the lower metal wiring layer is formed in the organic interlayer film. Forming an opening for communication, forming a second insulating film on an inner surface of the opening, removing the second insulating film on the lower metal wiring layer, and forming an upper metal layer on an exposed surface of the lower metal wiring layer; Since the wiring layer is provided, even if the organic interlayer film is etched, the organic interlayer film is covered with the second insulating film, and the connection portion between the lower metal wiring layer and the contact metal and the periphery of the connection portion are formed. No etching deposits are generated, erosion of the organic interlayer film in the contact hole can be prevented, and connection failure can be prevented.

[Brief description of the drawings]

FIG. 1 is a process diagram illustrating a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a process chart illustrating a modification of the manufacturing method of FIG. 1;

FIG. 3 is a process diagram illustrating another method for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a process chart illustrating a conventional method for manufacturing a semiconductor device.

FIG. 5 is a process diagram illustrating a process in which the organic interlayer film is deteriorated.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 first insulating film 2 lower metal wiring layer 3 contact metal 4A, 4B photoresist 5 organic interlayer film 6 second insulating film 7 upper metal wiring layer 8 etching deposit 11 contact hole 12 void

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 4M104 BB02 BB09 BB18 BB28 DD37 DD65 DD66 EE08 EE17 EE18 FF07 GG13 5F004 AA09 BA20 DA01 DA16 DA23 DA24 DA26 DB07 EA06 EA07 EB01 EB03 5F033 JJ13 KK13 Q15 Q15 QQ31 RR06 RR21 SS11 SS22 XX18 XX25 5F058 AA10 AC10 AF04 AG01 AH02

Claims (6)

[Claims] 1. A lower metal wiring layer is formed on a first insulating film formed on a semiconductor substrate, a contact metal is formed on the lower metal wiring layer, and a contact metal is formed on the lower metal wiring layer. Forming an organic interlayer film so as to cover a lower portion, forming a second insulating film on the surface of the organic interlayer film and the contact metal, removing the second insulating film on the contact metal, A method for manufacturing a semiconductor device, comprising forming an upper metal wiring layer thereon. 2. The method according to claim 1, wherein the step of removing the second insulating film removes a residue on the contact metal. 3. A lower metal wiring layer is formed on a first insulating film formed on a semiconductor substrate; a contact metal is formed on the lower metal wiring layer; Forming an organic interlayer film so as to cover a lower portion; forming a second insulating film on the surface of the organic interlayer film and the contact metal; applying a second photoresist on the second insulating film; The second insulating film on metal and the second
Removing the photoresist, and forming an upper metal wiring layer on the contact metal. 4. The method according to claim 3, wherein the step of removing the second insulating film and the second photoresist removes a residue on the contact metal. 5. A lower metal wiring layer is formed on a first insulating film formed on a semiconductor substrate, and an organic interlayer film is formed on a surface of the lower metal wiring layer and a surface of the first insulating film. Forming an opening communicating with the lower metal wiring layer in the organic interlayer film, forming a second insulating film on an inner peripheral surface and a bottom surface in the opening, and forming the second insulating film on the lower metal wiring layer; A method of manufacturing a semiconductor device, comprising: removing a film to expose the lower metal wiring layer; and forming an upper metal wiring layer on an exposed surface of the lower metal wiring layer. 6. The method of manufacturing a semiconductor device according to claim 5, wherein said step of removing said second insulating film removes an etching deposit on said lower metal wiring layer.