JP2000299542A - Laminated circuit board and method of manufacturing the same - Google Patents

Abstract

(57) Abstract: Provided is a multilayer circuit board which is effective in reducing manufacturing costs and a method for manufacturing the same. A plurality of wiring tapes (28) are hierarchically connected using stacked bumps (12) to achieve integration of a semiconductor chip (26). The laminated bumps (12) for electrically connecting the wiring tapes (28) are formed without using a conductive paste or the like.
It is directly joined to each of the wiring tapes (28).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board and a method of manufacturing the same, and more particularly, to a multilayer circuit board effective in reducing manufacturing costs and a method of manufacturing the same.

[0002]

2. Description of the Related Art Due to recent miniaturization and high speed of information-related equipment, miniaturization and high integration of semiconductor devices such as semiconductor memories and processors have been emphasized. A semiconductor device is generally configured by mounting a semiconductor chip on a circuit board. Therefore, in order to achieve both miniaturization and integration, it is necessary to miniaturize wiring patterns and semiconductor chips.

However, the miniaturization of wiring patterns and semiconductor chips depends on the resolution of photolithography, the accuracy of etching, and the like, and thus cannot be infinitely miniaturized, and a physical limit is inevitably generated.

Therefore, a technique for solving this problem by three-dimensionally laminating circuit boards on which semiconductor chips are mounted has recently attracted attention. For example, Japanese Unexamined Patent Publication
Japanese Patent No. 302645 discloses a technique for laminating circuit boards using laminated bumps. The idea of using the laminated bumps is very useful for the development of a laminated module because the distance between the laminated circuit boards can be freely designed.

[0005]

However, since the connection between the laminated bumps and the circuit board described in the above publication is performed by a conductive adhesive, there are the following problems.

First, a conductive adhesive such as a metal paste is expensive, thereby increasing the cost of a semiconductor device.
Second, a step of applying a metal paste and a step of curing the applied paste are required, which increases the manufacturing cost. Third, outgas is generated when the metal paste is heated, and heat history remains in peripheral members.

As described above, the conventional lamination technique still has a problem to be solved. In the field of semiconductor device manufacturing, the above-described simplification of the manufacturing process of the laminated module and cost reduction have been achieved. Is strongly required.

Accordingly, an object of the present invention is to provide a laminated circuit board which is effective in reducing the manufacturing cost and a method for manufacturing the same.

[0009]

To achieve the above object, according to the present invention, a plurality of circuit boards having a wiring pattern (10) are connected to each other via a stacked bump (12). In the pattern circuit board, at least one end of the laminated bump is connected to an exposed portion (14) where both the front and back surfaces of the wiring pattern are exposed from the circuit board. According to a second aspect of the present invention, there is provided a method for manufacturing a multilayer circuit board by connecting a plurality of circuit boards provided with a wiring pattern (10) by using a laminated bump (12). In a state in which the laminated bump is brought into contact with one surface of the exposed portion (14), both of which are exposed from the circuit board, energy is applied from the other surface of the exposed portion so that the exposed portion and the laminate are exposed. The bumps are electrically connected. Claim 3
According to a second aspect of the present invention, in the second aspect, the energy is an ultrasonic wave. According to a fourth aspect of the present invention, there is provided a method of forming a laminated bump (12) on a wiring pattern provided on a first circuit board (16-1), and a step of forming a laminated bump (12) on a second circuit board (16-2). Placing the first surface (14-1) of the exposed portion (14), of which both the front and back surfaces are exposed from the second circuit board, on the laminated bumps; And forming another bump (18) on the second surface (14-2) of the exposed portion. The invention according to claim 5 is the invention according to claim 4.
In the described invention, the exposing portion has a through hole (20), the first surface is placed at a position where the through hole comes on the laminated bump, and the another bump is provided with the through hole. Form on the hole.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Summary of the Invention) One feature of the present invention resides in that at least one end of a laminated bump is connected to an exposed portion of a wiring pattern in which both front and back surfaces are exposed from a circuit board. The reason why the laminated bump is connected to such an exposed portion is that energy is applied from the other surface of the exposed portion while the laminated bump is in contact with one surface of the exposed portion.

[0011] Since both the front and back surfaces of the exposed portion are exposed, even if one surface is brought into contact with the laminated bump, the other surface is exposed. Accordingly, the other surface has a sufficient space for applying energy, and the connection of the stacked bumps can be suitably performed.

The form of energy includes pressing force, heat,
There is an ultrasonic wave or the like, and in any case, a sufficient space in the exposed portion is useful for improving the connectivity of the laminated bumps.

(Invention Process) The present inventor has completed the present invention through the following steps in order to solve the above-mentioned problems. First, the reason why the conductive adhesive is required for connecting the laminated bumps is summarized as follows. That is, as shown in FIG. 1 of this publication, the formation of the laminated bumps in the above-mentioned Japanese Patent Application Laid-Open No. 6-302645 is performed by continuously stacking the bumps on the electrodes on the substrate.

At the time of stacking, each bump is pressed and heated, so that a sufficient space is required in the stacking direction. As shown in FIG. 1 of the publication, when stacking bumps, there is sufficient space in the stacking direction.
Each bump can be sufficiently pressed and heated.

However, as shown in FIG. 3 of the publication,
When the substrate is mounted on the laminated bumps, the electrodes of the substrate are in contact with the tops of the laminated bumps, so that it is difficult to apply sufficient pressing force or heat to the contact portions as it is. Therefore, in the related art, it is considered that the connection of the laminated bumps is performed using a conductive adhesive.

The inventor considered as above considers that if there is a space accessible at the contact portion between the laminated bump and the substrate electrode, the laminated bump can be connected without using a conductive adhesive. We tried to secure the space. As a result, they found that if a space was secured on the opposite surface of the substrate electrode, the electrode and the laminated bump could be pressed simultaneously or heat could be applied to both.

However, since the substrate body made of an insulating member such as ceramic or glass epoxy is present on the opposite surface of the substrate electrode, if pressed from above, the insulating member having low strength will be damaged. Further, even if heat is applied from above the substrate body, the heat is sufficiently transmitted to the top of the laminated bump, and in some cases, the substrate may be damaged by the heat.

The present inventors have devised a unique configuration in which the creative operation is repeated based on the above viewpoints to expose the front and back surfaces of the substrate electrode. Hereinafter, this characteristic new configuration will be described in detail.

(First Embodiment) FIG. 1 is a partial sectional side view showing a step of forming a laminated bump according to the present invention. As shown in the figure, in the present invention, first, the bonding tool 2
2, the laminated bump 12 is formed on the first circuit board 16-1 provided with the wiring pattern 10. That is, the stacked bumps 12 are formed using the wire bonding technique. Here, the wiring pattern 10 is a concept including a terminal electrode.

FIG. 2 is a partial cross-sectional side view showing a leveling step performed after the formation of the laminated bump shown in FIG. As shown in the figure, the laminated bump 12 formed in FIG.
Is pressed by a press machine 24 to perform leveling for adjusting the height of the stacked bumps 12. Note that this leveling is not an essential step of the present invention, but may be performed when the height of the stacked bumps 12 needs to be adjusted.

FIG. 3 is a partial cross-sectional side view showing a second circuit board mounting step performed after the leveling shown in FIG. As shown in the figure, the wiring pattern 10 of the second circuit board 16-2 has both the front and back surfaces of the second circuit board 1
6-2, to form an exposed portion 14 which is exposed.
Is placed on the top of the laminated bump 12. After placing the second circuit board 16-2, the exposing unit 1
4 is in a state where the first surface 14-1 is in contact with the top of the laminated bump 12, and the second surface 14-2 is exposed. The substrate having such an exposed portion 14 can be easily manufactured by using a flexible substrate such as a polyimide tape.

FIG. 4 is a partial cross-sectional side view showing an energy applying step performed after the mounting of the substrate shown in FIG. As shown in the drawing, after the first surface 14-1 of the exposed portion 14 is brought into contact with the top of the laminated bump 12, in this contact state, pressing force, heat, and ultrasonic waves are applied from the second surface 14-2. Give energy such as. Preferably, the second surface 14-2 is pressed while applying ultrasonic waves. By using the ultrasonic waves, the connection between the exposed portion 14 and the laminated bump 12 is favorably performed.

As described above, the second surface 14-
2 is applied through the exposed portion 14
It is transmitted to the laminated bump 12 and contributes to the joining between the top of the laminated bump 12 and the first surface 14-1.

According to the first embodiment of the present invention configured as described above, a sufficient space is secured in the stacking direction of the stacked bumps 12, so that sufficient energy is applied to the connection portions of the stacked bumps. Can be. As a result, the connection of the laminated bumps can be performed without using a conductive adhesive such as a metal paste.

(Second Embodiment) FIG. 5 is a partial cross-sectional side view showing a method of connecting laminated bumps according to a second embodiment of the present invention. As shown in the figure, in the second embodiment of the present invention, another bump 18 is formed on the second surface 14-2 of the exposed portion 14 to join the laminated bump 12 and the first surface 14-1. To achieve.

As described above, when another bump 18 is formed on the second surface 14-2, the energy generated during the formation is transferred to the laminated bump 12 and the first surface 14-via the exposed portion 14.
1 to the contact area. As a result, as in the first embodiment described above, energy is applied to the connection portion of the laminated bump 12, and the top of the laminated bump 12 and the first surface 14-1 are joined.

The other bumps 18 can be further stacked and used for laminating the third and fourth circuit boards. That is, when a large number of circuit boards are stacked, as in the first embodiment, if the bumps are formed as they are without applying energy to the exposed portion 14, as a result,
The connection of the laminated bumps 12 is achieved.

When forming another bump 18,
Since the other bump 18 is in a molten state, heat is easily transmitted to the exposed portion 14. As a result, more heat is transmitted to the stacked bumps 12 and it can be expected that the stacked bumps 12 contribute to the improvement of the bonding degree.

According to the second embodiment of the present invention configured as described above, when another bump 18 is formed on the second surface 14-2 of the exposed portion 14, the laminated bump 12 Since energy is applied to the top, the connection of the laminated bumps 12 is also achieved by this method. In addition, since the other bump 18 can be used for connection to a circuit board to be laminated next, the second embodiment can be said to be a configuration more suitable for multilayering.

(Third Embodiment) FIG. 6 is a partial sectional side view showing a substrate mounting step according to a third embodiment of the present invention. As shown in the figure, in the third embodiment, the second circuit board 16
-2, a through hole 20 is provided in the exposed portion 14;
Is placed on the laminated bump 12 at the position where the first surface 14-1 is located.

FIG. 7 is a partial cross-sectional side view showing a bump forming step performed after mounting the substrate shown in FIG. As shown in the figure, after placing the second circuit board 16-2,
Another bump 18 is provided on the through hole 20 provided in the exposed portion 14.
To form Then, the other bump 18 pushes through the through hole 20 by the pressing force, and contacts the top of the laminated bump 12. As a result, as shown in the figure, the laminated bump 12, the exposed portion 14, and another bump 18 are joined.

According to the third embodiment of the present invention configured as described above, the energy applied to the stacked bumps 12 is not indirect through the exposed portion 14 but is applied directly from another bump 18. Therefore, a more suitable bonding state can be expected.

[0033]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Summary) A plurality of wiring tapes 28 are hierarchically connected by using the laminated bumps 12 to achieve integration of the semiconductor chip 26. The laminated bumps 12 that electrically connect the respective wiring tapes 28 are directly joined to the respective wiring tapes 28 without using a conductive paste or the like (see FIG. 8).

(Preferred Embodiment) The above-described technical idea of connecting the laminated bumps to the exposed portions of the wiring pattern is useful for integration of a semiconductor device. Here, an example is shown in which this characteristic technical idea is embodied in a mode considered to be industrially preferable. Among the components described above, those that do not need to be particularly described are given the same names and the same reference numerals, and detailed description thereof will be omitted. Further, the embodiment described below is an embodiment of the present invention,
It does not limit the invention.

FIG. 8 is a side view showing an example in which the present invention is applied to integration of a semiconductor device. The semiconductor chip 26 shown in FIG. 3 is intended for a semiconductor memory, and thus, by connecting the semiconductor chips 26 in a plurality of layers,
More memory capacity can be secured.

Each semiconductor chip 26 has a thickness of 50 μm and is mounted on a wiring tape 28 made of 75 μm polyimide. The laminated bump 12 has a bump diameter of 150 to 2
3 metal bumps of 00 μm and 150-160 μm in height
It is formed by stacking. The metal bump is formed by bumping using a metal wire as a material.

Each laminated bump 12 is directly bonded on a land of φ0.2 to 0.25 mm provided on the wiring tape 28. This direct joining method is as described above. On the lowermost wiring tape 28, solder balls 30 functioning as external electrode terminals are printed, and a plurality of semiconductor chips 26 layered on the solder balls 30 are stacked with the laminated bumps 12 and the wiring patterns in the wiring tape 28. Are electrically connected via

[0038]

As described above, according to the present invention,
It is possible to provide a multilayer circuit board and a method for manufacturing the same, which are effective in reducing the manufacturing cost.

According to the first embodiment of the present invention, a sufficient space is secured in the stacking direction of the stacked bumps 12, so that sufficient energy can be applied to the connection portions of the stacked bumps. As a result, the connection of the laminated bumps can be performed without using a conductive adhesive such as a metal paste.

According to the second embodiment of the present invention, when another bump 18 is formed on the second surface 14-2 of the exposed portion 14, energy is applied to the top of the laminated bump 12. The connection of the stacked bumps 12 is also achieved by this method. In addition, since the other bump 18 can be used for connection to a circuit board to be laminated next, the second embodiment can be said to be a configuration more suitable for multilayering.

Further, according to the third embodiment of the present invention, the energy given to the laminated bump 12 is not applied indirectly through the exposed portion 14 but is given directly from another bump 18, so that it is more preferable. You can expect a joined state.

[Brief description of the drawings]

FIG. 1 is a partial sectional side view showing a step of forming a laminated bump according to the present invention.

FIG. 2 is a partial cross-sectional side view showing a leveling step performed after the formation of the laminated bump shown in FIG. 1;

FIG. 3 is a partial cross-sectional side view showing a second circuit board mounting step performed after the leveling shown in FIG. 2;

FIG. 4 is a partial cross-sectional side view showing an energy applying step performed after placing the substrate shown in FIG. 3;

FIG. 5 is a partial cross-sectional side view showing a method of connecting a laminated bump according to a second embodiment of the present invention.

FIG. 6 is a partial cross-sectional side view showing a substrate mounting step according to a third embodiment of the present invention.

FIG. 7 is a partial cross-sectional side view showing a bump forming step performed after mounting the substrate shown in FIG. 6;

FIG. 8 is a side view showing an example in which the present invention is applied to integration of a semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... wiring pattern, 12 ... laminated bump, 14 ... exposed part, 14-1 ... 1st surface, 14-2 ... 2nd surface, 16-
DESCRIPTION OF SYMBOLS 1 ... 1st circuit board, 16-2 ... 2nd circuit board, 18
... another bump, 20 ... through hole, 22 ... bonding tool, 24 ... press machine, 26 ... semiconductor chip, 28 ... wiring tape, 30 ... solder ball, 32 ... package,

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 25/18

Claims (5)

[Claims] In a multilayer circuit board in which a plurality of circuit boards each having a wiring pattern (10) are connected to each other via a multilayer bump (12), at least one end of the multilayer bump is a front surface and a rear surface of the wiring pattern. Are connected to an exposed portion (14) exposed from the circuit board. 2. A method of manufacturing a multilayer circuit board by connecting a plurality of circuit boards provided with a wiring pattern (10) by using a laminated bump (12), comprising: With the laminated bumps in contact with one surface of the exposed portion (14) both exposed from the circuit board, energy is applied from the other surface of the exposed portion to separate the exposed portion and the laminated bump. A method for forming a laminated circuit board, comprising electrically connecting. 3. The method according to claim 2, wherein the energy is an ultrasonic wave. 4. A step of forming a laminated bump (12) on a wiring pattern provided on a first circuit board (16-1); and a step of forming a wiring pattern provided on a second circuit board (16-2). A step of placing the first surface (14-1) of the exposed portion (14) in which both the front and back surfaces are exposed from the second circuit board on the laminated bump; Forming another bump (18) on the second surface (14-2) of the exposed portion. 5. The exposed portion has a through hole (20), the first surface is placed at a position where the through hole comes on the laminated bump, and the another bump is formed by the through hole. 5. The method for forming a laminated circuit board according to claim 4, wherein the circuit board is formed on the hole.