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JP2000292491A - Two branch transmission line and two branch driver circuit and semiconductor tester employing it - Google Patents

Two branch transmission line and two branch driver circuit and semiconductor tester employing it

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Publication number
JP2000292491A
JP2000292491A JP11143749A JP14374999A JP2000292491A JP 2000292491 A JP2000292491 A JP 2000292491A JP 11143749 A JP11143749 A JP 11143749A JP 14374999 A JP14374999 A JP 14374999A JP 2000292491 A JP2000292491 A JP 2000292491A
Authority
JP
Japan
Prior art keywords
transmission line
branch
waveform
characteristic impedance
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11143749A
Other languages
Japanese (ja)
Inventor
Yuhachi Morikawa
裕八 森川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP11143749A priority Critical patent/JP2000292491A/en
Priority to TW89106070A priority patent/TW476870B/en
Priority to SG200001930A priority patent/SG80677A1/en
Publication of JP2000292491A publication Critical patent/JP2000292491A/en
Withdrawn legal-status Critical Current

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  • Tests Of Electronic Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce useless oscillation waveform by providing means for connecting an waveform improving means between the receiving ends of first and second transmission lines. SOLUTION: A series termination resistor TR2 terminates a reflection wave returning from a third transmission line CB3 and has a characteristic impedance equal to that of the third transmission line CB3. The third transmission line CB3 is a coaxial cable having a characteristic impedance of 50 Ω. First and second transmission lines CB1, CB2 have same line length and connected, at one ends thereof, with the third transmission line CB3 through a double impedance. As an waveform improving means, a fourth transmission line CB4 having a characteristic impedance equal to that of the first transmission line CB1 is employed and connected between the receiving ends of the first and second transmission lines CB1, CB2. When the fourth transmission line CB4 is connected, a circulation path passing through paths LP1, LP2 and returning back to the two branch point is formed and both paths LP1, LP2 have a perfectly identical propagation delay.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、1本の伝送線路
を駆動端から駆動し、途中で2分岐した伝送線路の両受
信端での受信波形信号において、無用の振動波形を低減
して、より忠実な波形信号が得られる2分岐伝送線路、
2分岐ドライバ回路及びこれを用いる半導体試験装置
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention drives one transmission line from a drive end, and reduces unnecessary vibration waveforms in reception waveform signals at both reception ends of a transmission line that branches into two on the way. 2-branch transmission line from which a more faithful waveform signal can be obtained,
Two-branch driver circuit and semiconductor test apparatus using the same

【0002】[0002]

【従来の技術】従来技術について、図4の半導体試験装
置に使用される2分岐ドライバ回路の原理図を参照して
以下に説明する。ここでの2分岐ドライバ回路は伝送線
路の途中で伝送線路を2分岐する形態とする。また、伝
送線路の終端形態として並列終端と直列終端とがある
が、ここでは送端側の抵抗による直列終端する場合であ
る。尚、半導体試験装置は公知であり技術的に良く知ら
れている為、システム全体の構成説明を省略する。ま
た、半導体試験装置ではこのドライバDR1を多数チャ
ンネル備えている。しかしながら、複数DUTを同時測
定する場合、有限のドライバチャンネル数では足りない
場合があり、このときに2分岐ドライバ回路を適用する
と、同時に試験可能なデバイス個数が倍増できる場合が
ある。
2. Description of the Related Art The prior art will be described below with reference to the principle diagram of a two-branch driver circuit used in the semiconductor test apparatus shown in FIG. Here, the two-branch driver circuit has a form in which the transmission line is branched into two in the middle of the transmission line. In addition, there are a parallel termination and a series termination as termination forms of the transmission line, but here, a case where the termination is performed in series by a resistor on the transmission end side. Since the semiconductor test apparatus is well-known and well-known in the art, the description of the configuration of the entire system is omitted. Further, the semiconductor test device has a large number of channels of the driver DR1. However, when simultaneously measuring a plurality of DUTs, a finite number of driver channels may not be enough. At this time, if a two-branch driver circuit is applied, the number of devices that can be simultaneously tested may be doubled.

【0003】図4の要部構成要素は、パルス信号源10
0と、ドライバDR1と、直列終端抵抗TR2と、第3
伝送線路CB3と、第1伝送線路CB1と、第2伝送線
路CB2と、2個の被試験デバイス(DUT)とで成
る。
[0003] The main components of FIG.
0, the driver DR1, the series terminating resistor TR2, and the third
It comprises a transmission line CB3, a first transmission line CB1, a second transmission line CB2, and two devices under test (DUT).

【0004】パルス信号源100は、半導体試験装置に
おいてはDUTを試験する所望の試験パターン発生源で
あり、例えばパターン発生装置と波形整形器とで発生す
る。
A pulse signal source 100 is a desired test pattern generation source for testing a DUT in a semiconductor test apparatus, and is generated by, for example, a pattern generator and a waveform shaper.

【0005】ドライバDR1は半導体試験装置において
は論理信号をハイレベルVIH電圧、ローレベルVIL
電圧により所定の振幅電圧に変換した高速の駆動波形信
号を直列終端抵抗TR2へ供給する。このドライバの出
力端を駆動端と呼称する。尚、この駆動波形信号は立ち
上がりエッジ(前縁エッジ)、立ち下がりエッジ(後縁
エッジ)は予め校正(キャリブレーション)によりが所
定タイミングに規定したエッジで発生出力する。ここ
で、両DUTのICピンである第1、第2受信端におけ
る波形は、駆動端の駆動波形信号の波形に忠実であり、
エッジが所定タイミングであることが求められている。
もしも波形が歪んだりエッジのタイミングがずれると、
デバイスの測定品質の低下を招いたり、タイミング測定
精度の悪化を招いたりする為好ましくない。
In a semiconductor test apparatus, a driver DR1 outputs a logic signal to a high level VIH voltage and a low level VIL.
A high-speed drive waveform signal converted into a predetermined amplitude voltage by a voltage is supplied to the series termination resistor TR2. The output end of this driver is called the drive end. The drive waveform signal is generated and output at a rising edge (leading edge) and a falling edge (trailing edge) at an edge defined at a predetermined timing by calibration in advance. Here, the waveforms at the first and second receiving ends, which are the IC pins of both DUTs, are faithful to the waveform of the driving waveform signal at the driving end.
It is required that the edge has a predetermined timing.
If the waveform is distorted or the edge timing is off,
It is not preferable because the measurement quality of the device is deteriorated and the timing measurement accuracy is deteriorated.

【0006】直列終端抵抗TR2は、第3伝送線路CB
3の遠端から戻ってくる全反射波を終端する直列終端用
の抵抗であり、当該線路に直列挿入される。この抵抗値
は、例えば第3伝送線路CB3の特性インピーダンスが
50Ωのとき、50Ωの抵抗値を使用する。但し、実際
には、ドライバDR1自身に数Ω程度の内部抵抗を有し
ているので、この内部抵抗を差し引いた抵抗値が使用さ
れる。尚、半導体試験装置では一般にパフォーマンスボ
ードを介して第3伝送線路CB3に接続される。
The series termination resistor TR2 is connected to the third transmission line CB
3 is a series terminating resistor for terminating the total reflection wave returning from the far end, and is inserted in series with the line. As the resistance value, for example, when the characteristic impedance of the third transmission line CB3 is 50Ω, a resistance value of 50Ω is used. However, since the driver DR1 itself has an internal resistance of about several Ω, a resistance value obtained by subtracting this internal resistance is used. Incidentally, in a semiconductor test apparatus, it is generally connected to the third transmission line CB3 via a performance board.

【0007】第3伝送線路CB3は例えば特性インピー
ダンスが50Ωで、数十cm長の同軸ケーブルである。
尚、半導体試験装置では、公知のように、パフォーマン
スボードとハンドラ装置やプローバ装置間をインターフ
ェースする中継装置(ハイフィックス)内へこの第3伝
送線路CB3が収容されて実用に供される。
The third transmission line CB3 is, for example, a coaxial cable having a characteristic impedance of 50Ω and a length of several tens of cm.
In the semiconductor test apparatus, as is well known, the third transmission line CB3 is accommodated in a relay device (Hyfix) that interfaces between the performance board and the handler device or the prober device, and is put to practical use.

【0008】第1伝送線路CB1と第2伝送線路CB2
とは、同一線路長の線路であり、上記第3伝送線路CB
3の特性インピーダンス値に対して2倍の特性インピー
ダンス値、例えば特性インピーダンスが100Ωで、1
0cm前後の長さの同軸ケーブル若しくはマイクロスト
リップ線路である。この第1伝送線路CB1と第2伝送
線路CB2の一端は、上記第3伝送線路CB3に接続さ
れる。尚、無論のことながら、この接続点における特性
インピーダンスが不連続を生じないように適正に接続さ
れている。
A first transmission line CB1 and a second transmission line CB2
Is a line having the same line length, and the third transmission line CB
A characteristic impedance value twice as large as the characteristic impedance value of 3, for example, when the characteristic impedance is 100Ω and 1
It is a coaxial cable or a microstrip line having a length of about 0 cm. One ends of the first transmission line CB1 and the second transmission line CB2 are connected to the third transmission line CB3. Needless to say, the connection is properly performed so that the characteristic impedance at this connection point does not cause discontinuity.

【0009】2つのDUTは同一デバイスであり、例え
ばハンドラ装置内のコンタクト専用のICソケット(コ
ンタクタ)に装着されて使用に供される。両DUT間の
距離はシステムによって異なるが例えば10cm程度に
接近して存在する。ここで一方のDUTに接続されてい
るICピン端を第1受信端とし、他方を第2受信端と呼
称する。また、DUTの両受信端にはDUT自身の入力
容量とICソケットの分布容量を含む数ピコファラッド
の分布容量Cs1、Cs2が各々存在する。
The two DUTs are the same device. For example, the two DUTs are mounted on contact-specific IC sockets (contactors) in the handler device and used. The distance between the two DUTs differs depending on the system, but exists close to, for example, about 10 cm. Here, an IC pin end connected to one DUT is referred to as a first receiving end, and the other is referred to as a second receiving end. Further, at both receiving ends of the DUT, there are distributed capacities Cs1 and Cs2 of several picofarads including the input capacitance of the DUT itself and the distributed capacitance of the IC socket, respectively.

【0010】次に、図3に示して不具合波形を説明す
る。ここで、図4において、2分岐点から第1受信端迄
の往路をPASS1f、復路をPASS1rとし、2分
岐点から第2受信端迄の往路をPASS2f、復路をP
ASS2rと呼称する。
Next, the defective waveform will be described with reference to FIG. Here, in FIG. 4, the forward path from the two branch point to the first receiving end is PASS1f, the return path is PASS1r, the forward path from the two branch point to the second receiving end is PASS2f, and the return path is PASS1f.
Called ASS2r.

【0011】図3A,B,Cは受信端での波形歪であ
る。一方の、図3Cの受信波形は図4における伝送線路
を2分岐する2分岐点から受信端迄の両伝搬遅延量Td
1、Td2が、同一遅延量の場合における両受信端での
受信波形例である。この場合は理想的な受信波形であ
り、問題はない。即ち、このときの波形伝搬は、両受信
端からほぼ全反射し、全く同位相、同電圧で2分岐点へ
戻ってくる。この為、両戻り信号はそのまま第3伝送線
路CB3を介して直列終端抵抗TR2で終端されて終了
する。
FIGS. 3A, 3B and 3C show waveform distortion at the receiving end. On the other hand, the reception waveform of FIG. 3C is a propagation delay amount Td from the bifurcation point of the transmission line in FIG.
1 and Td2 are examples of reception waveforms at both reception ends when the delay amounts are the same. In this case, the waveform is an ideal reception waveform, and there is no problem. That is, the waveform propagation at this time is almost totally reflected from both receiving ends, and returns to the two branch points with exactly the same phase and the same voltage. Therefore, both return signals are terminated as they are by the series terminating resistor TR2 via the third transmission line CB3, and the process ends.

【0012】他方の、図3A,Bの受信波形は図4にお
ける2分岐点から受信端迄の、第1伝送線路CB1伝搬
遅延量Td1と、第2伝送線路CB2の伝搬遅延量Td
2が僅かに異なる伝搬遅延量の場合であり、このときの
両受信端での一方の振動波形(図3A参照)と、他方の
振動波形(図3B参照)の一例である。伝搬遅延量の差
異は、同一ケーブル長で切断してもケーブル端末の半田
付け時のばらつきにより遅延差を生じたり、また、もし
も第1伝送線路CB1と第2伝送線路CB2とが同一伝
搬遅延量であっても、コンタクタ(ICソケット:接触
子)等の分布容量や、入力容量が異なるデバイス(製造
ロット、製造メーカ等)に伴って生ずる異なる分布容量
Cs1,Cs2により、往路、復路の総合的な伝搬遅延
時間に差異を生じる場合も同様の振動波形を生ずる。
On the other hand, the reception waveforms of FIGS. 3A and 3B show the propagation delay Td1 of the first transmission line CB1 and the propagation delay Td of the second transmission line CB2 from the two branch points to the receiving end in FIG.
2 is a case where the propagation delay amount is slightly different, and is an example of one vibration waveform (see FIG. 3A) and the other vibration waveform (see FIG. 3B) at both receiving ends at this time. The difference in the amount of propagation delay causes a difference in delay due to variations in soldering of cable terminals even if the cable is cut at the same cable length, or if the first transmission line CB1 and the second transmission line CB2 have the same propagation delay amount. However, due to the distributed capacitances of the contactors (IC sockets: contacts) and the like, and the different distributed capacitances Cs1 and Cs2 generated due to the devices (manufacturing lots, manufacturers, etc.) having different input capacities, the total of the forward path and the return path can be obtained. A similar vibration waveform is also generated when a difference occurs in the propagation delay time.

【0013】ここで、図3の振動波形について説明す
る。2分岐点では、ドライバからの駆動波形信号が2分
岐して両受信端を往復し、全反射して各々戻ってくる。
このときの波形伝搬は、異なる位相関係で2分岐点へ戻
ってくる為、第3伝送線路CB3を介して直列終端抵抗
TR2で終端される以外に、他方の伝送線路(第1伝送
線路CB1、第2伝送線路CB2)へ再び伝搬してい
く。これが繰り返し発生する結果、図3A,Bに示すよ
うな振動波形を生じる。この図で振動振幅(図3D参
照)は上記位相差と波形のスルーレートとに関係する。
また振動周期(図3E参照)は一方の往路PASS1f
及び復路PASS1rと、他方の往路PASS2f及び
復路PASS2rとの伝搬遅延の時間差に関係する。
Here, the vibration waveform of FIG. 3 will be described. At the two-branch point, the drive waveform signal from the driver divides into two, reciprocates at both receiving ends, and is totally reflected back.
Since the waveform propagation at this time returns to the two branch points with a different phase relationship, the waveform propagation is terminated by the series terminating resistor TR2 via the third transmission line CB3 and the other transmission line (the first transmission line CB1, The signal propagates again to the second transmission line CB2). As a result of this repetition, a vibration waveform as shown in FIGS. 3A and 3B is generated. In this figure, the vibration amplitude (see FIG. 3D) is related to the phase difference and the slew rate of the waveform.
Further, the oscillation cycle (see FIG. 3E) is one outgoing path PASS1f.
And the time difference of the propagation delay between the return path PASS1r and the other forward path PASS2f and return path PASS2r.

【0014】ところで、近年の数百MHz以上で動作す
る高速デバイスを試験実施する為には、より一層高速な
スルーレート(例えば0.2nS/V)の波形を発生印
加する必要がある。これに伴って、僅かな上記位相差で
も大きな振動振幅となってくる。また、パルスのエッジ
間隔も接近してくる為、振動振幅(図3D参照)が減衰
する前に次のエッジがくる。この為、所定タイミングに
規定したにも関わらず、直前のパルスの前縁/後縁エッ
ジの振動波形の影響を受けて波形が変化(図3F、G参
照)する。この結果、直後のパルスの前縁/後縁エッジ
タイミングは図3H、Jに示すように変化してしまう問
題がある。このことはタイミング精度が要求される半導
体試験装置にとって甚だ好ましくない。上述したような
振動波形を生じることは、特に高速デバイスを試験する
上で、適正なる所定の試験波形をDUTへ印加するのが
困難になる結果、デバイス試験の性能維持の観点から甚
だ好ましくない。
By the way, in order to test a high-speed device operating at several hundred MHz or more in recent years, it is necessary to generate and apply a waveform with a much higher slew rate (for example, 0.2 nS / V). Accordingly, even a small phase difference results in a large vibration amplitude. In addition, since the pulse edge interval also approaches, the next edge comes before the vibration amplitude (see FIG. 3D) attenuates. For this reason, the waveform changes (see FIGS. 3F and 3G) under the influence of the vibration waveform of the leading edge / trailing edge of the immediately preceding pulse, despite being defined at the predetermined timing. As a result, there is a problem that the leading edge / trailing edge timing of the immediately following pulse changes as shown in FIGS. This is extremely unfavorable for a semiconductor test apparatus requiring timing accuracy. The occurrence of the above-mentioned vibration waveform makes it difficult to apply an appropriate predetermined test waveform to the DUT, particularly when testing a high-speed device, and is therefore extremely undesirable from the viewpoint of maintaining the performance of the device test.

【0015】[0015]

【発明が解決しようとする課題】上述説明したように従
来技術においては、高速のパルス信号を1本の伝送線路
で伝送し、途中から2分岐して2カ所の受信端へ供給す
る形態の2分岐伝送線路においては無用の振動波形が生
じやすい。このことは受信端で歪んだ波形となったり、
波形のエッジのタイミング精度が悪化する。このこと
は、好ましくなく実用上の難点である。そこで、本発明
が解決しようとする課題は、1本の伝送線路の駆動端か
ら駆動した信号を、途中で2分岐し、2分岐した両伝送
線路の受信端での受信波形信号において、無用の振動波
形を低減可能とした2分岐伝送線路、2分岐ドライバ回
路及びこれを用いる半導体試験装置を提供することであ
る。
As described above, in the prior art, a high-speed pulse signal is transmitted through one transmission line, and is branched into two parts in the middle and supplied to two receiving terminals. Unnecessary vibration waveforms are likely to occur in the branch transmission line. This can result in a distorted waveform at the receiving end,
The timing accuracy of the edge of the waveform deteriorates. This is an undesirable and practical disadvantage. Therefore, the problem to be solved by the present invention is that a signal driven from the drive end of one transmission line is divided into two on the way, and unnecessary waveforms are received at the reception ends of the two branched transmission lines. An object of the present invention is to provide a two-branch transmission line and a two-branch driver circuit capable of reducing a vibration waveform and a semiconductor test apparatus using the same.

【0016】[0016]

【課題を解決するための手段】第1に、上記課題を解決
するために、本発明の構成では、直列終端抵抗TR2
と、所定の特性インピーダンスの第3伝送線路CB3
(例えば同軸線路あるいはマイクロストリップ線路)
と、第3伝送線路CB3の特性インピーダンス値に対し
て2倍の特性インピーダンス値の第1伝送線路CB1と
第2伝送線路CB2とを備え、直列終端抵抗TR2の一
端は第3伝送線路CB3の一端に接続し、第3伝送線路
CB3の他端は第1伝送線路CB1と第2伝送線路CB
2の両線路の一端に各々接続して2分岐し、第1伝送線
路CB1の他端(これを第1受信端と呼称)と第2伝送
線路CB2の他端(これを第2受信端と呼称)に対し
て、上記線路における直列終端抵抗TR2の他端(これ
を駆動端と呼称)から高速の駆動波形信号を印加し、2
分配されて第1受信端と第2受信端の両端へ所定品質の
波形信号を伝送供給する2分岐伝送線路において、第1
伝送線路CB1と第2伝送線路CB2の受信端の両端間
において波形改善手段10を接続する構成手段を備えて
受信端での受信波形の品質向上を計ることを特徴とする
2分岐伝送線路である。上記発明によれば、1本の伝送
線路の駆動端から駆動した信号を、途中で2分岐し、2
分岐した両伝送線路の受信端での受信波形信号におい
て、無用の振動波形を低減可能とした2分岐伝送線路が
実現できる。
First, in order to solve the above-mentioned problems, in the configuration of the present invention, the series termination resistor TR2
And a third transmission line CB3 having a predetermined characteristic impedance.
(Eg coaxial line or microstrip line)
And a first transmission line CB1 and a second transmission line CB2 having a characteristic impedance value twice as large as the characteristic impedance value of the third transmission line CB3, and one end of the series termination resistor TR2 is connected to one end of the third transmission line CB3. And the other end of the third transmission line CB3 is connected to the first transmission line CB1 and the second transmission line CB.
2 are connected to one end of each of the two lines, and are branched into two. The other end of the first transmission line CB1 (this is called a first reception end) and the other end of the second transmission line CB2 (this is called a second reception end). ), A high-speed drive waveform signal is applied from the other end of the series terminating resistor TR2 in the line (this is called a drive end),
In a two-branch transmission line, which is distributed and supplies a waveform signal of a predetermined quality to both ends of a first receiving end and a second receiving end,
A two-branch transmission line characterized by comprising constituent means for connecting the waveform improving means 10 between both ends of the reception ends of the transmission line CB1 and the second transmission line CB2 to improve the quality of the reception waveform at the reception end. . According to the above invention, the signal driven from the drive end of one transmission line is divided into two in the middle and
A two-branch transmission line capable of reducing unnecessary vibration waveforms in reception waveform signals at the receiving ends of both branched transmission lines can be realized.

【0017】第2に、上記課題を解決するために、本発
明の構成では、ドライバと、直列終端抵抗TR2と、所
定の特性インピーダンスの第3伝送線路CB3と、第3
伝送線路CB3の特性インピーダンス値に対して2倍の
特性インピーダンス値の第1伝送線路CB1と第2伝送
線路CB2とを備え、ドライバは入力される波形信号を
受けてバッファした駆動波形信号を直列終端抵抗TR2
の一端へ接続して供給し、ドライバの出力インピーダン
スと直列終端抵抗TR2とによって第3伝送線路CB3
に対して直列終端となる所定インピーダンスとし、直列
終端抵抗TR2の他端は第3伝送線路CB3の一端に接
続し、第3伝送線路CB3の他端は第1伝送線路CB1
と第2伝送線路CB2の両線路の一端に各々接続して2
分岐し、第1伝送線路CB1の他端(第1受信端)と第
2伝送線路CB2の他端(第2受信端)に対して、上記
ドライバの出力端(駆動端)から高速の駆動波形信号を
発生し、2分配されて第1受信端と第2受信端の両端へ
所定品質の波形信号を伝送供給する2分岐ドライバ回路
において、第1伝送線路CB1と第2伝送線路CB2の
他端の両端間において波形改善手段10を接続する構成
手段を備えて受信端での受信波形の品質向上を計ること
を特徴とする2分岐ドライバ回路がある。
Second, in order to solve the above problem, in the configuration of the present invention, a driver, a series termination resistor TR2, a third transmission line CB3 having a predetermined characteristic impedance, and a third
A first transmission line CB1 and a second transmission line CB2 each having a characteristic impedance value twice as large as the characteristic impedance value of the transmission line CB3, and the driver receives the input waveform signal and buffers the driving waveform signal in series termination. Resistance TR2
Of the third transmission line CB3 by the output impedance of the driver and the series termination resistor TR2.
The other end of the series termination resistor TR2 is connected to one end of the third transmission line CB3, and the other end of the third transmission line CB3 is connected to the first transmission line CB1.
And one end of both lines of the second transmission line CB2 and
The driver branches to the other end (first receiving end) of the first transmission line CB1 and the other end (second receiving end) of the second transmission line CB2, from the output end (driving end) of the driver to a high-speed driving waveform. In a two-branch driver circuit for generating and splitting a signal and transmitting a predetermined quality waveform signal to both ends of a first receiving end and a second receiving end, the other ends of the first transmission line CB1 and the second transmission line CB2 There is a two-branch driver circuit characterized by comprising a configuration means for connecting the waveform improving means 10 between both ends of the circuit to improve the quality of the received waveform at the receiving end.

【0018】第5(b)図は、本発明に係る解決手段を
示している。また、両受信端間に接続される波形改善手
段10の一態様としては、第1伝送線路CB1の特性イ
ンピーダンス値と同一特性インピーダンスの第4伝送線
路CB4(例えば同軸線路あるいはマイクロストリップ
線路)であることを特徴とする上述2分岐伝送線路又は
上述2分岐ドライバ回路がある。また、両受信端間に接
続される波形改善手段10の一態様としては、第1伝送
線路CB1の特性インピーダンス値に対して数分の1以
下(例えば1/5以下)のインピーダンスを示す抵抗素
子であることを特徴とする上述2分岐伝送線路又は上述
2分岐ドライバ回路がある。また、両受信端間に接続さ
れる波形改善手段10の一態様としては、第1伝送線路
CB1の特性インピーダンス値に対して数分の1以下
(例えば1/5以下)のインピーダンスを示す容量素子
であることを特徴とする上述2分岐伝送線路又は上述2
分岐ドライバ回路がある。第5(c)図は、本発明に係
る解決手段を示している。また、両受信端間に接続され
る波形改善手段10の一態様としては、第1伝送線路C
B1の特性インピーダンスと同一の第5伝送線路CB5
と、第5伝送線路CB5の特性インピーダンス値に対し
て数分の1以下(例えば1/5以下)のインピーダンス
を示す容量素子であることを特徴とする上述2分岐伝送
線路又は上述2分岐ドライバ回路がある。第5(d)図
は、本発明に係る解決手段を示している。また、両受信
端間に接続される波形改善手段10の一態様としては、
第1伝送線路CB1の特性インピーダンスと同一の第5
伝送線路CB5と、第5伝送線路CB5の特性インピー
ダンス値に対して数分の1以下(例えば1/5以下)の
インピーダンスを示す抵抗素子であることを特徴とする
上述2分岐伝送線路又は上述2分岐ドライバ回路があ
る。また、両受信端間に接続される波形改善手段10の
一態様としては、高域周波数成分に対して2分岐点で分
岐した駆動波形信号が、共に両受信端と波形改善手段1
0を通過伝搬して当該2分岐点に一巡して戻る伝送線路
であることを特徴とする上述2分岐伝送線路又は上述2
分岐ドライバ回路がある。
FIG. 5 (b) shows a solution according to the present invention. One aspect of the waveform improving means 10 connected between the two receiving ends is a fourth transmission line CB4 (for example, a coaxial line or a microstrip line) having the same characteristic impedance as the characteristic impedance value of the first transmission line CB1. There is the aforementioned two-branch transmission line or the aforementioned two-branch driver circuit. Further, as one mode of the waveform improving means 10 connected between both receiving terminals, a resistance element which exhibits an impedance of a fraction (eg, 例 え ば or less) of the characteristic impedance value of the first transmission line CB1 is used. There is the above-described two-branch transmission line or the above-described two-branch driver circuit. In addition, as one mode of the waveform improving means 10 connected between the two receiving ends, a capacitive element exhibiting an impedance of a fraction (eg, 1 / or less) of the characteristic impedance value of the first transmission line CB1 is used. The above-described two-branch transmission line or the above-mentioned two-branch transmission line
There is a branch driver circuit. FIG. 5 (c) shows a solution according to the present invention. As one mode of the waveform improving means 10 connected between both receiving ends, the first transmission line C
The fifth transmission line CB5 having the same characteristic impedance as B1
A two-branch transmission line or a two-branch driver circuit, characterized in that the capacitance element exhibits an impedance of a fraction (e.g., 1/5 or less) of the characteristic impedance value of the fifth transmission line CB5. There is. FIG. 5 (d) shows a solution according to the present invention. As one mode of the waveform improving means 10 connected between both receiving ends,
The fifth, which is the same as the characteristic impedance of the first transmission line CB1,
The above-described two-branch transmission line or the above-described two-branch transmission line, wherein the transmission line CB5 and the fifth transmission line CB5 are resistance elements each having an impedance of a fraction (e.g., 以下 or less) of the characteristic impedance value of the fifth transmission line CB5. There is a branch driver circuit. Further, as one mode of the waveform improving means 10 connected between the two receiving ends, a driving waveform signal branched at two branch points for a high frequency component is supplied to both the receiving ends and the waveform improving means 1.
0, wherein the transmission line is a transmission line that propagates through 0 and loops back to the two branch points.
There is a branch driver circuit.

【0019】また、第3伝送線路CB3、第1伝送線路
CB1、第2伝送線路CB2は同軸線路あるいはマイク
ロストリップ線路であることを特徴とする上述2分岐伝
送線路又は上述2分岐ドライバ回路がある。また、第1
受信端、第2受信端に接続される接続対象は半導体試験
装置の被試験デバイス(DUT)である上述2分岐ドラ
イバ回路がある。
The third transmission line CB3, the first transmission line CB1, and the second transmission line CB2 are coaxial lines or microstrip lines. Also, the first
The connection target connected to the receiving end and the second receiving end is the above-described two-branch driver circuit which is a device under test (DUT) of a semiconductor test apparatus.

【0020】また、2分岐伝送線路は半導体試験装置の
ピンエレクトロニクス回路のドライバチャンネルの出力
端と、前記ドライバチャンネルに接続される2個のDU
Tの対応する同一ICピン間への分配供給に適用して備
えることを特徴とする半導体試験装置がある。また、波
形改善手段10は半導体試験装置が試験する2個の被試
験デバイスと電気的にコンタクトする同一ICピンに対
応する両コンタクタ(接触子)間に接続することを特徴
とする上述半導体試験装置がある。
The two-branch transmission line includes an output terminal of a driver channel of a pin electronics circuit of a semiconductor test device and two DUs connected to the driver channel.
There is a semiconductor test apparatus characterized in that the semiconductor test apparatus is provided so as to be applied to distribution supply between the same IC pins corresponding to T. The semiconductor testing apparatus is characterized in that the waveform improving means 10 is connected between both contactors (contacts) corresponding to the same IC pin which makes electrical contact with two devices under test to be tested by the semiconductor testing apparatus. There is.

【0021】[0021]

【発明の実施の形態】以下に本発明の実施の形態を実施
例と共に図面を参照して詳細に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings together with embodiments.

【0022】本発明について、図1の2分岐伝送線路の
原理図と、図2の2分岐ドライバ回路の原理図と、図3
の受信端での波形歪を説明する図と、図5の波形改善手
段の3つの態様例と、を参照して以下に説明する。尚、
従来構成に対応する要素は同一符号を付す。
FIG. 3 shows the principle of the two-branch transmission line of the present invention, FIG.
This will be described below with reference to a diagram for explaining the waveform distortion at the receiving end of FIG. 5 and three examples of the waveform improving means in FIG. still,
Elements corresponding to the conventional configuration are denoted by the same reference numerals.

【0023】先ず、本発明の構成を説明する。図1は2
分岐伝送線路の構成であり、その要部構成要素は、パル
ス信号源100と、直列終端抵抗TR2と、第3伝送線
路CB3と、第1伝送線路CB1と、第2伝送線路CB
2と、波形改善手段10とで成る。このとき、第1受信
端と第2受信端の両端に対して駆動波形信号に対応する
忠実な波形信号を伝送供給することを目的とする。これ
は従来構成に対して波形改善手段10を追加した構成で
成る。他の構成要素は従来と同一要素であるからして説
明を要しない。尚、第1受信端と第2受信端において受
信する装置あるいはデバイス等の入力に各々分布容量C
s1、Cs2が存在するものと仮定しているが、分布容
量以外に抵抗成分が負荷として有っても良い。但しその
抵抗値は、例えば10KΩ以上のように、100Ωの伝
送線路の特性インピーダンスよりも実用的に十分大きな
値である必要がある。
First, the configuration of the present invention will be described. Figure 1 shows 2
The main components of the branch transmission line are a pulse signal source 100, a series termination resistor TR2, a third transmission line CB3, a first transmission line CB1, and a second transmission line CB.
2 and waveform improving means 10. At this time, an object is to transmit and supply a faithful waveform signal corresponding to the drive waveform signal to both ends of the first receiving end and the second receiving end. This is a configuration in which the waveform improving means 10 is added to the conventional configuration. The other components are the same as those in the related art and need not be described. Note that the distributed capacitance C is applied to the input of the device or device to be received at the first receiving end and the second receiving end, respectively.
Although it is assumed that s1 and Cs2 exist, a resistance component other than the distributed capacitance may be present as a load. However, the resistance value must be practically sufficiently larger than the characteristic impedance of the transmission line of 100Ω, for example, 10 KΩ or more.

【0024】波形改善手段10は、第1伝送線路CB1
と第2伝送線路CB2の受信端の両端間において波形改
善手段10を接続する。波形改善手段10の具体例とし
ては、第1伝送線路CB1の特性インピーダンス値と同
一特性インピーダンス、例えば100Ωの第4伝送線路
CB4を用いる。また、この第4伝送線路CB4の伝送
遅延量の制限は無く、両受信端が接続可能であれば良
い。無論、この伝送線路は、同軸ケーブルあるいはマイ
クロストリップ線路の何れを適用しても良い。
The waveform improving means 10 includes a first transmission line CB1
And the waveform improving means 10 is connected between both ends of the receiving end of the second transmission line CB2. As a specific example of the waveform improving unit 10, a fourth transmission line CB4 having the same characteristic impedance as the characteristic impedance value of the first transmission line CB1, for example, 100Ω is used. In addition, there is no limitation on the amount of transmission delay of the fourth transmission line CB4, and it is only necessary that both receiving ends can be connected. Of course, the transmission line may be a coaxial cable or a microstrip line.

【0025】次に、上記構成による波形改善について図
1と図3を参照して説明する。ここで、第1伝送線路C
B1と第2伝送線路CB2との伝搬遅延量には差異が有
る場合と仮定する。また、図1に示すように、一方の一
巡経路LP1は第1伝送線路CB1、第4伝送線路CB
4、第2伝送線路CB2の順番の経路とし、他方の一巡
経路LP2は第2伝送線路CB2、第4伝送線路CB
4、第1伝送線路CB1の順番の経路とする。
Next, waveform improvement by the above configuration will be described with reference to FIGS. Here, the first transmission line C
It is assumed that there is a difference in the amount of propagation delay between B1 and the second transmission line CB2. Also, as shown in FIG. 1, one loop path LP1 includes a first transmission line CB1, a fourth transmission line CB
4, the second transmission line CB2 is in the order of the path, and the other loop path LP2 is the second transmission line CB2, the fourth transmission line CB
4. The path is in the order of the first transmission line CB1.

【0026】本発明では第4伝送線路CB4を追加する
ことにより、従来のように両受信端で反射して2分岐点
へは戻らず、代わりに一巡経路LP1、LP2を巡って
2分岐点へ戻る一巡経路が形成されることとなる。ここ
で注目すべきことは、両方の一巡経路LP1、LP2
は、共に同一伝送線路を通過している点である。従っ
て、両方の一巡経路LP1、LP2は、共に全く同一伝
搬遅延量となる。このことは、第1伝送線路CB1と第
2伝送線路CB2との伝搬遅延量の差異が有っても、2
分岐点で2分配された駆動波形信号の両方が各々一巡し
て当該2分岐点へ戻ってくるとき、両信号は常に同一タ
イミングで戻ることとなる。この結果、従来のような図
3A,Bに示す無用の振動波形は発生せず、本発明では
図3Cに示す理想的な波形が第1受信端と第2受信端の
両受信端で得られるという特筆した利点が得られること
となる。尚、第4伝送線路CB4の接続点は、第1受信
端の端点と、第2受信端の端点とに接続する理想の一巡
接続形態が望ましいが、当該端点から数ミリ外れた位置
に接続しても、無用の振動波形は極めて小さいため、実
用的に実施可能である。
In the present invention, by adding the fourth transmission line CB4, the light is reflected at both receiving ends and does not return to the two branch points as in the related art, but instead travels around the loop paths LP1 and LP2 to the two branch points. A return circuit is formed. What should be noted here is that both loop paths LP1, LP2
Are points passing through the same transmission line. Therefore, both of the loop paths LP1 and LP2 have exactly the same propagation delay. This means that even if there is a difference in the amount of propagation delay between the first transmission line CB1 and the second transmission line CB2,
When both of the drive waveform signals divided into two at the branch point make a round and return to the two branch points, both signals always return at the same timing. As a result, the unnecessary vibration waveforms shown in FIGS. 3A and 3B as in the related art are not generated, and in the present invention, the ideal waveform shown in FIG. 3C is obtained at both the first receiving end and the second receiving end. That is a special advantage. The connection point of the fourth transmission line CB4 is desirably an ideal circuit connection form connecting the end point of the first reception end and the end point of the second reception end, but is connected to a position several millimeters away from the end point. However, since the useless vibration waveform is extremely small, it can be implemented practically.

【0027】次に、波形改善手段10の他の具体例を図
5を参照して説明する。図5(a)は波形改善手段10
に係る概念接続図であり、図5(b)が図1に対応する
等価回路である。上述したように、第1伝送線路CB1
と第2伝送線路CB2とに分配された駆動波形信号は一
巡して戻ってくれば良いことが判った。図5(c)の構
成例では、高域の周波数成分が通過可能なコンデンサC
1を第5伝送線路CB5の途中、若しくは線路の任意地
点に直列に挿入した形態である。これは、直流成分や低
周波成分は振動波形の観点からすれば無視でき、波形劣
化に至らない。つまり、波形の前縁エッジや後縁エッジ
のスルーレートに対応する高域の周波数成分が一巡可能
に通過できれば足りる。従って、所望により、エッジの
スルーレートに対応する所定の容量値、例えば1000
ピコファラッド程度を直列に挿入しても良い。この場合
においても2分岐点へは同一タイミングで同一振幅波形
が戻るからして無用の振動波形は生じないため、実用上
支障なく適用可能である。
Next, another specific example of the waveform improving means 10 will be described with reference to FIG. FIG. 5A shows the waveform improving means 10.
FIG. 5B is an equivalent circuit corresponding to FIG. As described above, the first transmission line CB1
It has been found that the drive waveform signal distributed to and the second transmission line CB2 should return once. In the configuration example of FIG. 5C, the capacitor C that can pass high frequency components
1 is inserted in the middle of the fifth transmission line CB5 or at an arbitrary point on the line in series. This means that the DC component and the low frequency component can be ignored from the viewpoint of the vibration waveform, and the waveform does not deteriorate. That is, it suffices that a high-frequency component corresponding to the slew rate of the leading edge or the trailing edge of the waveform can pass through the circuit in a loopable manner. Therefore, if desired, a predetermined capacitance value corresponding to the slew rate of the edge, for example, 1000
Picofarads may be inserted in series. Also in this case, since the same amplitude waveform returns to the two branch points at the same timing, no useless vibration waveform is generated, so that it is practically applicable without any trouble.

【0028】図5(c)の構成例では、分配された駆動
波形信号が一巡通過できる程度の抵抗値、例えば特性イ
ンピーダンスが100Ωの伝送線路の場合、例えば1/
5以下の10Ω以下の抵抗を第5伝送線路CB5の途
中、若しくは線路の任意地点に直列に挿入した形態であ
る。この場合においても2分岐点へは同一タイミングで
同一振幅波形が戻るからして無用の振動波形は生じない
ため、実用上支障なく適用可能である。
In the configuration example shown in FIG. 5C, a transmission line having a resistance value enough to allow the distributed drive waveform signal to make a single pass, for example, a characteristic impedance of 100Ω, for example, 1 /
In this embodiment, a resistance of 5 or less and 10 Ω or less is inserted in the middle of the fifth transmission line CB5 or at an arbitrary point in the line. Also in this case, since the same amplitude waveform returns to the two branch points at the same timing, no useless vibration waveform is generated, so that it is practically applicable without any trouble.

【0029】また、所望により、図5(c)のコンデン
サC1と図5(d)の抵抗R1を直列接続する波形改善
手段10としても良い。
If desired, the waveform improving means 10 may be a series connection of the capacitor C1 of FIG. 5C and the resistor R1 of FIG. 5D.

【0030】尚、図5(b、c、d)において、両受信
端が数cm程度に接近していて、両受信端において実用
上適用可能な程度の波形劣化の場合においては、所望に
より第5伝送線路CB5の代わりに単線を用いて接続し
ても良い。
In FIG. 5 (b, c, d), if the two receiving ends are close to each other by about several cm and the waveforms are deteriorated to a practically applicable level at the two receiving ends, it is possible to reduce The connection may be made using a single wire instead of the five transmission lines CB5.

【0031】上述した2分岐伝送線路の具体的適用例と
しては、図2に示すように、半導体試験装置のピンエレ
クトロニクス回路に備えるドライバチャンネルに対して
適用する例がある。即ち、ピンエレクトロニクス回路の
ドライバDR1の出力端と、この出力端に接続される2
つのDUTの対応する同一ICピン間へパフォーマンス
ボードやハイフィックスを介してハンドラ装置やプロー
バ装置のコンタクタへ分配供給する2分岐伝送線路があ
る。上述したように本発明を適用することによって、ド
ライバDR1の波形がそのまま忠実にDUTのICピン
へ印加可能となる結果、優れた波形品質でデバイス試験
が実施できる大きな利点が得られる。この結果、半導体
試験装置によるデバイスの測定品質の向上と、タイミン
グ測定精度の更なる向上が実現できる。
As a specific application example of the above-described two-branch transmission line, as shown in FIG. 2, there is an example of application to a driver channel provided in a pin electronics circuit of a semiconductor test device. That is, the output terminal of the driver DR1 of the pin electronics circuit and the output terminal 2 connected to this output terminal.
There is a two-branch transmission line that distributes and supplies between the corresponding identical IC pins of one DUT to the contactor of the handler device or the prober device via a performance board or a HIFIX. As described above, by applying the present invention, the waveform of the driver DR1 can be faithfully applied as it is to the IC pins of the DUT. As a result, a great advantage that a device test can be performed with excellent waveform quality can be obtained. As a result, improvement of the measurement quality of the device by the semiconductor test apparatus and further improvement of the timing measurement accuracy can be realized.

【0032】[0032]

【発明の効果】本発明は、上述の説明内容から、下記に
記載される効果を奏する。上述説明したように本発明に
よれば、第1伝送線路CB1と第2伝送線路CB2の受
信端の両端間において波形改善手段を接続する手段を具
備する構成としたことにより、2分岐点で2分配された
駆動波形信号の両方が各々一巡して当該2分岐点へ戻っ
てくるとき、両信号は常に同一タイミングで戻る結果、
第1伝送線路CB1と第2伝送線路CB2との伝搬遅延
量の差異の影響を受けることがなくなる。この結果、無
用の振動波形が解消されて良好な波形品質やタイミング
エッジで両受信端へ供給できるという特筆した利点が得
られる。また、上記発明を半導体試験装置のピンエレク
トロニクス回路のドライバチャンネルに適用した場合
は、半導体試験装置デバイスの測定品質の向上と、タイ
ミング測定精度の更なる向上が実現できる。従って本発
明の技術的効果は大であり、産業上の経済効果も大であ
る。
According to the present invention, the following effects can be obtained from the above description. As described above, according to the present invention, the configuration including the means for connecting the waveform improving means between both ends of the reception ends of the first transmission line CB1 and the second transmission line CB2 is provided. When both of the divided drive waveform signals make a round and return to the two branch points, the two signals always return at the same timing,
The influence of the difference in the amount of propagation delay between the first transmission line CB1 and the second transmission line CB2 is eliminated. As a result, a special advantage is obtained in that unnecessary vibration waveforms are eliminated and the waveforms can be supplied to both receiving ends with good waveform quality and timing edges. Further, when the present invention is applied to a driver channel of a pin electronics circuit of a semiconductor test apparatus, it is possible to improve the measurement quality of the semiconductor test apparatus device and further improve the timing measurement accuracy. Therefore, the technical effect of the present invention is great, and the industrial economic effect is also great.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の、2分岐伝送線路の原理図。FIG. 1 is a principle diagram of a two-branch transmission line according to the present invention.

【図2】本発明の、2分岐ドライバ回路の原理図。FIG. 2 is a principle diagram of a two-branch driver circuit according to the present invention.

【図3】本発明の、受信端での波形歪を説明する図。FIG. 3 is a view for explaining waveform distortion at a receiving end according to the present invention.

【図4】従来の、半導体試験装置に使用される2分岐ド
ライバ回路の原理図。
FIG. 4 is a principle diagram of a conventional two-branch driver circuit used in a semiconductor test apparatus.

【図5】本発明の、波形改善手段の3つの態様例。FIG. 5 shows three examples of waveform improving means according to the present invention.

【符号の説明】[Explanation of symbols]

C1 コンデンサ Cs1,Cs2 分布容量 DR1 ドライバ R1 抵抗 CB1 第1伝送線路 CB2 第2伝送線路 TR2 直列終端抵抗 CB3 第3伝送線路 CB4 第4伝送線路 CB5 第5伝送線路 10 波形改善手段 100 パルス信号源 C1 Capacitor Cs1, Cs2 Distributed capacitance DR1 Driver R1 Resistance CB1 First transmission line CB2 Second transmission line TR2 Series termination resistor CB3 Third transmission line CB4 Fourth transmission line CB5 Fifth transmission line 10 Waveform improving means 100 Pulse signal source

Claims (12)

【特許請求の範囲】[Claims] 【請求項1】 直列終端抵抗と、所定の特性インピーダ
ンスの第3伝送線路と、該第3伝送線路の特性インピー
ダンス値に対して2倍の特性インピーダンス値の第1伝
送線路と第2伝送線路とを備え、直列終端抵抗の一端は
第3伝送線路の一端に接続し、該第3伝送線路の他端は
該第1伝送線路と該第2伝送線路の両線路の一端に各々
接続して2分岐し、該第1伝送線路の他端(これを第1
受信端と呼称)と該第2伝送線路の他端(これを第2受
信端と呼称)に対して、上記線路における該直列終端抵
抗の他端(これを駆動端と呼称)から高速の駆動波形信
号を印加し、2分配されて該第1受信端と該第2受信端
の両端へ所定品質の波形信号を伝送供給する2分岐伝送
線路において、 該第1伝送線路と該第2伝送線路の受信端の両端間にお
いて波形改善手段を接続する構成手段を備えて受信端で
の受信波形の品質向上を計ることを特徴とする2分岐伝
送線路。
1. A series termination resistor, a third transmission line having a predetermined characteristic impedance, a first transmission line and a second transmission line having a characteristic impedance value twice as large as the characteristic impedance value of the third transmission line. And one end of the series termination resistor is connected to one end of a third transmission line, and the other end of the third transmission line is connected to one end of both lines of the first transmission line and the second transmission line. Branch, and the other end of the first transmission line (this is connected to the first
With respect to the other end of the second transmission line (referred to as a second receiving end) and the other end (referred to as a driving end) of the series terminating resistor in the line, high-speed driving is performed. A two-branch transmission line that applies a waveform signal and splits and supplies a waveform signal of a predetermined quality to both ends of the first reception end and the second reception end; the first transmission line and the second transmission line 2. A two-branch transmission line characterized by comprising a configuration means for connecting a waveform improving means between both ends of the receiving end to improve the quality of a received waveform at the receiving end.
【請求項2】 ドライバと、直列終端抵抗と、所定の特
性インピーダンスの第3伝送線路と、該第3伝送線路の
特性インピーダンス値に対して2倍の特性インピーダン
ス値の第1伝送線路と第2伝送線路とを備え、該ドライ
バは入力される波形信号を受けてバッファした駆動波形
信号を直列終端抵抗の一端へ接続して供給し、該ドライ
バの出力インピーダンスと直列終端抵抗とによって該第
3伝送線路に対して直列終端となる所定インピーダンス
とし、該直列終端抵抗の他端は第3伝送線路の一端に接
続し、該第3伝送線路の他端は該第1伝送線路と該第2
伝送線路の両線路の一端に各々接続して2分岐し、該第
1伝送線路の他端(第1受信端)と該第2伝送線路の他
端(第2受信端)に対して、上記ドライバの出力端(駆
動端)から高速の駆動波形信号を発生し、2分配されて
該第1受信端と該第2受信端の両端へ所定品質の波形信
号を伝送供給する2分岐ドライバ回路において、 該第1伝送線路と該第2伝送線路の他端の両端間におい
て波形改善手段を接続する構成手段を備えて受信端での
受信波形の品質向上を計ることを特徴とする2分岐ドラ
イバ回路。
2. A driver, a series termination resistor, a third transmission line having a predetermined characteristic impedance, and a first transmission line and a second transmission line having a characteristic impedance value twice as large as the characteristic impedance value of the third transmission line. A driver for receiving the input waveform signal and supplying a buffered drive waveform signal to one end of the series terminating resistor and supplying the driving waveform signal to the third transmission line by an output impedance of the driver and the series terminating resistor. The other end of the series terminating resistor is connected to one end of a third transmission line, and the other end of the third transmission line is connected to the first transmission line and the second transmission line.
Each of the two ends of the transmission line is connected to one end of the transmission line to branch into two, and the other end of the first transmission line (first reception end) and the other end of the second transmission line (second reception end) A two-branch driver circuit for generating a high-speed driving waveform signal from an output end (driving end) of a driver, dividing the signal into two, and transmitting a predetermined quality waveform signal to both ends of the first receiving end and the second receiving end. A two-branch driver circuit comprising: means for connecting a waveform improving means between both ends of the other end of the first transmission line and the other end of the second transmission line to improve the quality of a received waveform at a receiving end. .
【請求項3】 両受信端間に接続される波形改善手段
は、該第1伝送線路の特性インピーダンス値と同一特性
インピーダンスの第4伝送線路であることを特徴とする
請求項1記載の2分岐伝送線路又は請求項2記載の2分
岐ドライバ回路。
3. The two-branch according to claim 1, wherein the waveform improving means connected between both receiving ends is a fourth transmission line having the same characteristic impedance as the characteristic impedance value of the first transmission line. The transmission line or the two-branch driver circuit according to claim 2.
【請求項4】 両受信端間に接続される波形改善手段
は、該第1伝送線路の特性インピーダンス値に対して数
分の1以下のインピーダンスを示す抵抗素子であること
を特徴とする請求項1記載の2分岐伝送線路又は請求項
2記載の2分岐ドライバ回路。
4. The waveform improving means connected between both receiving ends is a resistance element having an impedance of a fraction of the characteristic impedance value of the first transmission line or less. The two-branch transmission line according to claim 1, or the two-branch driver circuit according to claim 2.
【請求項5】 両受信端間に接続される波形改善手段
は、該第1伝送線路の特性インピーダンス値に対して数
分の1以下のインピーダンスを示す容量素子であること
を特徴とする請求項1記載の2分岐伝送線路又は請求項
2記載の2分岐ドライバ回路。
5. The waveform improving means connected between both receiving ends is a capacitive element having an impedance of a fraction of the characteristic impedance value of the first transmission line or less. The two-branch transmission line according to claim 1, or the two-branch driver circuit according to claim 2.
【請求項6】 両受信端間に接続される波形改善手段
は、該第1伝送線路の特性インピーダンスと同一の第5
伝送線路と、該第5伝送線路の特性インピーダンス値に
対して数分の1以下のインピーダンスを示す容量素子で
あることを特徴とする請求項1記載の2分岐伝送線路又
は請求項2記載の2分岐ドライバ回路。
6. A waveform improving means connected between both receiving ends, the fifth improving means having the same characteristic impedance as the first transmission line.
3. The two-branch transmission line according to claim 1, wherein the transmission line is a capacitive element exhibiting an impedance of a fraction of the characteristic impedance of the fifth transmission line or less. Branch driver circuit.
【請求項7】 両受信端間に接続される波形改善手段
は、該第1伝送線路の特性インピーダンスと同一の第5
伝送線路と、該第5伝送線路の特性インピーダンス値に
対して数分の1以下のインピーダンスを示す抵抗素子で
あることを特徴とする請求項1記載の2分岐伝送線路又
は請求項2記載の2分岐ドライバ回路。
7. A waveform improving means connected between both receiving ends, the fifth improving means having the same characteristic impedance as the first transmission line.
3. The two-branch transmission line according to claim 1, wherein the transmission line and the fifth transmission line are resistance elements each having an impedance of a fraction of the characteristic impedance of the fifth transmission line or less. Branch driver circuit.
【請求項8】 両受信端間に接続される波形改善手段
は、高域周波数成分に対して2分岐点で分岐した駆動波
形信号が、共に両受信端と該波形改善手段を通過伝搬し
て当該2分岐点に一巡して戻る伝送線路であることを特
徴とする請求項1記載の2分岐伝送線路又は請求項2記
載の2分岐ドライバ回路。
8. A waveform improving means connected between both receiving ends, wherein the drive waveform signal branched at two branch points for the high frequency component is transmitted through both the receiving ends and the waveform improving means. 3. The two-branch transmission line according to claim 1, wherein the transmission line is a transmission line that loops back to the two-branch point.
【請求項9】 第3伝送線路、第1伝送線路、第2伝送
線路は同軸線路あるいはマイクロストリップ線路である
ことを特徴とする請求項1記載の2分岐伝送線路又は請
求項2記載の2分岐ドライバ回路。
9. The two-branch transmission line according to claim 1, wherein the third transmission line, the first transmission line, and the second transmission line are coaxial lines or microstrip lines. Driver circuit.
【請求項10】 第1受信端、第2受信端に接続される
接続対象は半導体試験装置の被試験デバイス(DUT)
である請求項2記載の2分岐ドライバ回路。
10. A device under test (DUT) of a semiconductor test apparatus connected to the first receiving end and the second receiving end.
The two-branch driver circuit according to claim 2, wherein
【請求項11】 2分岐伝送線路は半導体試験装置のピ
ンエレクトロニクス回路のドライバチャンネルの出力端
と、前記ドライバチャンネルに接続される2個のDUT
の対応する同一ICピン間への分配供給に適用して備え
ることを特徴とする半導体試験装置。
11. A two-branch transmission line includes an output terminal of a driver channel of a pin electronics circuit of a semiconductor test device and two DUTs connected to the driver channel.
A semiconductor test apparatus, which is provided to be applied to distribution supply between the corresponding same IC pins.
【請求項12】 波形改善手段は半導体試験装置が試験
する2個の被試験デバイスと電気的にコンタクトする同
一ICピンに対応する両コンタクタ(接触子)間に接続
することを特徴とする請求項11記載の半導体試験装
置。
12. The waveform improving means is connected between two contactors (contacts) corresponding to the same IC pin which makes electrical contact with two devices under test to be tested by a semiconductor test apparatus. 12. The semiconductor test apparatus according to item 11.
JP11143749A 1999-04-08 1999-05-24 Two branch transmission line and two branch driver circuit and semiconductor tester employing it Withdrawn JP2000292491A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP11143749A JP2000292491A (en) 1999-04-08 1999-05-24 Two branch transmission line and two branch driver circuit and semiconductor tester employing it
TW89106070A TW476870B (en) 1999-04-08 2000-03-31 Branch transmission line, driver circuit, and semiconductor test system using same
SG200001930A SG80677A1 (en) 1999-04-08 2000-04-06 Branch transmission line, driver circuit, and semiconductor test system using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11143749A JP2000292491A (en) 1999-04-08 1999-05-24 Two branch transmission line and two branch driver circuit and semiconductor tester employing it

Publications (1)

Publication Number Publication Date
JP2000292491A true JP2000292491A (en) 2000-10-20

Family

ID=15346132

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (3)

Country Link
JP (1) JP2000292491A (en)
SG (1) SG80677A1 (en)
TW (1) TW476870B (en)

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JP2007171083A (en) * 2005-12-26 2007-07-05 Nec Electronics Corp Inspection system and method, and wiring length adjusting method
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Publication number Publication date
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SG80677A1 (en) 2001-05-22

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