JP2000290100A - Silicon wafer manufacturing method - Google Patents

Abstract

(57) [Problem] To provide a silicon wafer excellent in device characteristics by reducing the concentration of Cu in the bulk of a wafer and on the surface thereof, eliminating Cu contamination, and having excellent device characteristics. (1) Under a condition in which a temperature gradient is generated in a thickness direction of a mirror-polished silicon wafer, after performing a heat treatment at a temperature exceeding 600 ° C. to 1000 ° C. on either the back surface or the front surface, A method for manufacturing a silicon wafer, comprising cleaning the silicon wafer. (2) In the method for manufacturing a silicon wafer of the above (1), 6
It is desirable to subject the mirror-polished silicon wafer to a heat treatment at 900 ° C. to 1000 ° C. before the heat treatment at a temperature higher than 00 ° C. to 1000 ° C. Further, it is desirable that the temperature gradient in the thickness direction of the silicon wafer be 50 ° C. or more as a temperature difference between the back surface and the front surface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a silicon wafer, and more particularly to a method for effectively reducing the concentration of Cu in the bulk and surface of a mirror-polished silicon wafer to avoid Cu contamination. The present invention relates to a method for manufacturing a silicon wafer.

[0002]

2. Description of the Related Art A silicon single crystal manufactured by the Czochralski method is sliced into a predetermined thickness, processed into a thin disk-shaped silicon wafer, subjected to a chamfering step, a lapping step, and a cleaning step, and then finished. The surface is polished by mirror polishing or the like as a process, and is used as a substrate material for various devices. At this time, since the contamination of the silicon wafer with the heavy metal has a great effect on the device characteristics, it is necessary to pay close attention to the behavior of the heavy metal.

[0003] Cu is a metal element which has relatively many opportunities for contamination and has a great influence on device characteristics even in a trace amount. Specifically, it exists as atomic Cu in the bulk of a silicon wafer contaminated with Cu, and its surface has particles or Cu silicide (Cu ₃ S) which is a defect caused by Cu.
i, Cu ₆ Si). The Cu present in the bulk and on the surface becomes a factor, which affects the oxide film breakdown voltage and the life time degradation, or the change in resistivity among the device characteristics.

[0004]

In order to avoid the aforementioned Cu contamination of the silicon wafer, a method for reducing the concentration of Cu existing in the bulk or on the surface has been studied. For example, Japanese Patent Application Laid-Open No. 9-64052 discloses that a silicon wafer is heat-treated at a relatively low temperature of 600 ° C. or less and then its surface is cleaned to control Cu in the bulk and on the surface of the silicon wafer. And a method for producing the same.

[0005] However, in the proposed silicon wafer, Cu deposited on the wafer surface after heat treatment can be removed by surface cleaning, but it is diffused to the vicinity of the surface without being deposited on the surface and formed in the bulk.
Defects caused by Cu cannot be removed by cleaning without an etching action. On the other hand, when the surface cleaning by a etching effect SC-1 cleaning _{(NH 4 0H / H 2 0} 2 / H 2 0) , which can remove defects Cu due formed near the surface, A pit is formed where the defect has been removed. The pit marks on the wafer surface cause deterioration of electrical characteristics such as oxide film breakdown voltage.

Further, if a defect caused by Cu has already been formed in the bulk before the heat treatment at a temperature of 600 ° C. or lower, the heat treatment temperature is relatively low. , While being fixed in the bulk without being decomposed into atomic Cu, Cu can be diffused to near the surface,
It is difficult to deposit on the wafer surface.

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the present invention effectively reduces the concentration of Cu in the bulk and on the surface of a silicon wafer contaminated with Cu, thereby improving the oxide film breakdown voltage characteristics and life. It is an object of the present invention to provide a method for manufacturing a silicon wafer having excellent device characteristics such as time and resistivity.

[0008]

Means for Solving the Problems In order to solve the above problems, the present inventors have studied various Cu contaminations assuming characteristics required for a silicon wafer as a semiconductor substrate. The following findings were obtained.

Even when a defect caused by Cu is formed in the bulk of a silicon wafer, under the condition that a temperature gradient is generated in the thickness direction of the silicon wafer, the defect is formed on either the back surface or the front surface. By performing a heat treatment at a temperature higher than 600 ° C. to 1000 ° C., it becomes possible to decompose defects caused by Cu and to form a solid solution in the bulk as atomic Cu. Further, since outward diffusion of Cu is further promoted, it becomes easy to precipitate Cu on the wafer surface.

[0010] The silicon wafer above 600 ℃ ~ 1000 ℃
Before performing the heat treatment, it is desirable to perform a heat treatment at 900 ° C. to 1000 ° C. once. In other words, by adding such a thermal history before the heat treatment of more than 600 ° C. to 1000 ° C., the solid solubility of the whole wafer is increased, the defects caused by Cu are surely decomposed, and further as atomic Cu Solid solution can be made in the bulk, and Cu deposition on the wafer surface becomes easier.

If the temperature gradient in the thickness direction of the silicon wafer is maintained at 50 ° C. or more due to the temperature difference between the back surface and the front surface, for example, the wafer surface temperature at the low temperature gradient side is 600 ° C. or less. Even in some cases, the force to move Cu works from the high-solid-state high-temperature side wafer surface to the low-solid-state low-temperature side wafer surface, and Cu existing in the bulk precipitates on the low-temperature side wafer surface. Easier to do.

[0012] Cu precipitated on the silicon wafer surface and defects caused by Cu formed near the surface can be removed by SC-1 cleaning having an etching action.
Bit traces remaining on the silicon wafer surface by the SC-1 cleaning can be completely removed by subsequent mirror polishing to a depth of about 1 μm, so that the oxide film breakdown voltage characteristics of the device are not reduced.

The present invention has been completed on the basis of the above findings, and has the following (1) a method for manufacturing a silicon wafer and (2) an embodiment thereof.

(1) Under a condition that a temperature gradient occurs in the thickness direction of the mirror-polished silicon wafer, the wafer surface on either the back side or the front side is subjected to a heat treatment of over 600 ° C. to 1000 ° C. A method for manufacturing a silicon wafer, comprising cleaning the wafer.

(2) In the method for manufacturing a silicon wafer according to the above (1), it is preferable that the heat treatment at 900 ° C. to 1000 ° C. is performed on the mirror-polished silicon wafer before the heat treatment at more than 600 ° C. to 1000 ° C. . Furthermore, the temperature gradient in the thickness direction of the silicon wafer is 50 ° C due to the temperature difference between the back side and the front side.
It is desirable to make it above.

[0016] Even when the silicon wafer is cleaned after heat treatment at a temperature exceeding 600 ° C to 1000 ° C,
Further, it is desirable to perform mirror polishing.

The silicon wafer manufactured according to the present invention comprises:
The Cu concentration on the silicon wafer surface is 5 × 10 ⁹ / cm
^The goal is ² or less. This is because the deterioration of the oxide film breakdown voltage characteristics is prevented, and the Cu concentration is used as a guideline so that the life time is not reduced and the resistivity does not change.

Usually, since oxygen is contained in a silicon wafer, a thermal donor is generated, which causes a problem that the resistivity of the wafer is reduced. Conventionally, in order to solve this problem, an oxygen donor killer process is performed on a wafer after slicing before mirror polishing, at a temperature of 600 ° C. or higher, to eliminate a thermal donor.

In the manufacturing method of the present invention, since the heat treatment temperature for the silicon wafer is more than 600 ° C. to 1000 ° C., it has the function of oxygen donor killer treatment in the silicon wafer, and outwardly diffuses Cu in the bulk. It is technically possible to use both the heat treatment for the treatment and the oxygen donor killer treatment. For this reason, it is possible to omit the oxygen donor killer process for the wafer after the slice processing before the mirror polishing, which has been conventionally performed.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION The method of manufacturing a silicon wafer according to the present invention is characterized in that the temperature of a mirror-polished silicon wafer is increased by 600 ° C. It is characterized in that the silicon wafer is cleaned after a heat treatment of up to 1000 ° C. By this heat treatment, Cu that forms a solid solution in the bulk of the silicon wafer is precipitated on the wafer surface, or defects caused by Cu formed in the bulk are decomposed, and solid solution is formed as atomic Cu in the bulk. Cu is deposited on the surface by side diffusion. Then, the Cu that appeared on the wafer surface,
It is removed by surface cleaning.

In the present invention, the heat treatment at a temperature higher than 600 ° C. is adopted even if a defect caused by Cu is formed in a bulk near the surface, by decomposing into Cu in the atomic state. This is for facilitating out-diffusion. On the other hand, the upper limit of the heat treatment temperature is set to 1000 ° C. in order to prevent recontamination after heat treatment due to an increase in solid solubility of heavy metals, specifically, contamination of Cu, Fe, Ni, etc. from the heat treatment furnace. .
The holding time in the heat treatment is desirably about 30 minutes to 1 hour.

In the present invention, the above-mentioned 600
It is desirable to subject the mirror-polished silicon wafer to a heat treatment at 900 ° C. to 1000 ° C. before the heat treatment at a temperature higher than 1000 ° C. As described above, by adding a thermal history of 900 ° C to 1000 ° C in advance, the solid solubility of the whole wafer is increased, the defects caused by Cu are surely decomposed, and the Cu deposition on the wafer surface is further promoted. It becomes possible to do. In order to secure such a function, the holding time should be 30 minutes to 2 minutes.
About an hour.

As described above, in the heat treatment of over 600 ° C. to 1000 ° C. of the present invention, if a temperature gradient in the thickness direction can be maintained at 50 ° C. or more by the temperature difference between the back side and the front side, the surface on the low temperature side of the temperature gradient Even when the temperature drops to 600 ° C or less, the force that moves Cu from the high-temperature side wafer surface with high solid solubility to the low-temperature side wafer surface with low solid solubility acts and exists in the bulk.
Cu easily precipitates on the wafer surface on the low-temperature side, and the precipitated Cu can be reliably removed by subsequent surface cleaning.

This temperature gradient is simply obtained in an atmosphere at normal temperature.
The silicon wafer can be formed by heating only one of the front surface and the back surface of the silicon wafer. At this time, if it is desired to form a strong temperature gradient, the surface that is not heated may be forcibly cooled.

Next, Cu deposited on the wafer surface by the heat treatment is removed by the subsequent surface cleaning, and Cu in the bulk of the silicon wafer, which diffuses to the vicinity of the surface to form a defect, continues. It is removed by the etching action of surface cleaning. Since the surface cleaning adopted here is intended to selectively etch defects caused by Cu, the SC
It is desirable to use a -1 wash. At this time, the composition of the cleaning liquid is a mixed liquid of NH ₄ 0H, H ₂ 0 ₂ and H ₂ 0, and the cleaning conditions are 70
Washing time of 10 minutes or more at ~ 80 ° C.

Further, the silicon wafer after the cleaning is subjected to mirror polishing so as to have a depth of 1 μm from the surface.
By being polished to the extent, by the etching action,
Pit marks generated on the wafer surface and silicite remaining on the wafer surface can be reliably removed.

[0027]

EXAMPLE In order to confirm the effect of the silicon wafer manufacturing method of the present invention, a silicon wafer was manufactured by changing the step of introducing Cu into the bulk of the wafer. In the first embodiment, Cu is introduced in the mirror polishing step, and in the second embodiment, Cu is introduced.
A Cu aqueous solution is applied to introduce Cu.

(Example 1) FIG. 1 is a diagram showing the manufacturing steps of Example 1 of the present invention and Comparative Example 1 employed in Example 1.
As a test wafer substrate, p (111)
A silicon wafer having a resistivity of 50 Ωcm was used.

As shown in FIG. 1, in Example 1 of the present invention, after cleaning having no etching action (for example, HF cleaning), Cu was added to the polishing liquid so as to have a Cu concentration of 500 ppb. Polishing was performed. Then, after washing, mounted on a hot plate, a heat treatment is performed for 30 minutes so that the temperature becomes 650 ° C. on the hot plate and 320 ° C. on the wafer surface opposite to the hot plate, and the SC- 1
Washed (mixing ratio of _{NH 4 0H / H 2 0 2} / H 2 0 in the volume ratio 1: 1:
The surface was washed at 80 ° C. × 20 minutes according to 5). After that, mirror polishing is performed using a polishing liquid that does not contain Cu,
The surface was adjusted by washing.

In Comparative Example 1, after cleaning, an oxygen donor killer treatment was performed at 600 ° C. for 30 minutes. After the cleaning, Cu was added to the polishing liquid so that the Cu concentration became 500 ppb, and the mirror surface was removed. Polishing was performed and the surface was adjusted by washing.

The resistivity (Ωcm) and the judgment electric field of the silicon wafers produced in Example 1 of the present invention and Comparative Example 1 were 8 MV.
The non-defective rate of the oxide film withstand voltage of / cm was examined. The electrode of the MOS capacitor used for the oxide film breakdown voltage measurement was P-doped polysilicon, the area was 8 mm ² , and the gate oxide film thickness was 25 nm.
Table 1 shows the measurement results.

[0032]

[Table 1]

As is clear from the results in Table 1, Comparative Example 1
In this case, the resistivity is 23.3 Ωcm and the yield rate of oxide film breakdown voltage is only 43%. On the other hand, the silicon wafer manufactured in Example 1 of the present invention has a resistivity of 20.3 Ωcm and the yield rate of oxide film breakdown voltage is 74%.
% And excellent characteristics.

(Example 2) FIG. 2 is a diagram showing the manufacturing steps of Examples 2 to 4 of the present invention and Comparative Example 2 adopted in Example 2. As the test wafer substrate, a p-type silicon wafer having a crystal orientation of (100) and a resistivity of 40 Ωcm was used.
In order to introduce Cu into the bulk of the substrate, a 10 ppm Cu aqueous solution was applied to the wafer surface that had been cleaned after mirror polishing, and dried by a spin coater. At this time, the Cu concentration on the wafer surface was found to be 1.3
× 10 ¹³ cm ^-2 .

As shown in FIG. 2, in Example 2 of the present invention, a wafer dried by a spin coater was loaded on a hot plate in a clean draft at room temperature and adjusted to 620 ° C. on the hot plate. The surface of the wafer opposite to the hot plate was blown with clean air to set the surface temperature to 300 ° C., and heat-treated for 1 hour.
Thereafter, using the same SC-1 cleaning solution as in Example 1, 80 ° C. ×
Surface cleaning was performed for 10 minutes.

In the third embodiment, under the same conditions as in the second embodiment, the SC
-1 cleaning treatment was performed, and then mirror polishing was performed, and the surface was adjusted by ordinary cleaning.

In Example 4, the wafer dried in advance by the spin coater was put into a heat treatment furnace and subjected to heat treatment at 1000 ° C. × 1 hour in a nitrogen atmosphere, and then the treatment of Example 2 was performed.

In Comparative Example 2, a wafer dried by a spin coater was put into a heat treatment furnace, and was placed in a nitrogen atmosphere.
Heat treatment was performed at 500 ° C. × 1 hour, and thereafter, surface cleaning was performed using the same SC-1 cleaning solution as in Example 1 at 80 ° C. × 10 minutes.

The resistivity (Ωcm) of the silicon wafers produced in Examples 2 to 4 of the present invention and Comparative Example 2 and the non-defective rate under the same conditions as in Example 1 were examined, and the measurement results are shown in Table 2.

[0040]

[Table 2]

In Comparative Example 2, the resistivity was 45.5 Ωcm, and the non-defective rate of oxide film breakdown voltage was as low as 65%, but the silicon wafers manufactured in Examples 2 to 4 of the present invention all exhibited excellent characteristics. I understand.

[0042]

According to the method for producing a silicon wafer of the present invention, even in the case of a silicon wafer contaminated with Cu, the concentration of Cu in the bulk and on the surface of the silicon wafer can be effectively reduced,
Device characteristics such as oxide film breakdown voltage characteristics, lifetime, and resistivity can be improved.

[Brief description of the drawings]

FIG. 1 shows inventive example 1 and comparative example 1 employed in Example 1.
It is a figure which shows the manufacturing process of.

FIG. 2 is a view showing a manufacturing process of Invention Examples 2 to 4 and Comparative Example 2 employed in Example 2.

Claims (4)

[Claims] A heat treatment at a temperature exceeding 600 ° C. to 1000 ° C. is performed on either the back surface or the front surface under a condition in which a temperature gradient occurs in the thickness direction of the mirror-polished silicon wafer. A method for producing a silicon wafer. 2. The method according to claim 1, wherein the mirror-polished silicon wafer is subjected to a heat treatment at 900 ° C. to 1000 ° C. before the heat treatment. 3. The method for producing a silicon wafer according to claim 1, wherein a temperature gradient in a thickness direction of the silicon wafer is 50 ° C. or more as a temperature difference between the back surface and the front surface. . 4. The method for producing a silicon wafer according to claim 1, wherein mirror polishing is further performed after the cleaning of the silicon wafer.