JP2000269756A - Reception equipment and communications equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a transceiver device which has a small-sized and light- weight reception circuit with less current consumption. SOLUTION: A feedback circuit is connected only to an amplification circuit 33 in the preceding stage of two amplification circuits 33 and 35, between which a band pass filter is provided, and a DC component generated there is eliminated. The reception signal level which is amplified by the amplification circuit 33 and is inputted to the amplification circuit 35 is set to a level higher than the DC offset component generated in the first stage of the amplifying circuit 35, thereby outputting a signal responding to the signal inputted to the amplifying circuit 35.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving device used in a communication device and a communication device using the receiving device.

[0002]

2. Description of the Related Art As radio communication systems, there are various systems such as an analog system and a digital system.
Each system is assigned a frequency band centering on the UHF band.

FIG. 9 shows a configuration of a general mobile communication device (transceiver). 1 is a transmitting unit, 2 is a receiving unit, and a part of them (for example, a demodulator) can be constituted by an IC. The transmission signal output from the transmission unit 1 is sent to the antenna 9 via the duplexer 8. The received signal received by the antenna 9 is input to the receiving unit 2 via the duplexer 8.

[0004] Reference numeral 3 denotes an analog / digital conversion circuit, 4 denotes an audio digital signal processing circuit, and 5 denotes an audio interface circuit which operates as an interface between the microphone 6 and the speaker 7 and the audio digital signal processing circuit 4. The audio information input from the microphone 6 is subjected to digital signal processing in an audio digital signal processing circuit 4 and converted into an analog signal in an analog / digital conversion circuit 3.
It is input to the transmission unit 1.

[0005] The signal input to the transmission section 1 is orthogonally modulated by a quadrature modulator 10 to a signal of a transmission frequency.
The quadrature-modulated signal output from is amplified by a buffer amplifier 11, input to a power amplifier 13 via an RF (bandpass) filter 12, amplified to a desired power, and supplied to a duplexer 8.

The signal input to the receiving unit 2 is amplified by the low noise amplifier 14, input to the converter 16 via the RF filter 15, and is input to the converter 16 at a frequency of, for example, several hundred KHz.
The signal is converted to an F (intermediate frequency) signal, input to an IF amplifier 18 via a SAW (surface acoustic wave) filter 17, amplified, demodulated by a quadrature demodulator 19, and supplied to an analog / digital conversion circuit 3. The signal from the receiving unit 2 input to the analog / digital conversion circuit 3 is converted into a digital signal, subjected to digital signal processing by an audio / digital signal processing circuit 4, and supplied to a speaker 7 via an audio interface circuit 5. .

Reference numeral 20 denotes a crystal oscillator, reference numeral 21 denotes an RF synthesizer, and the RF synthesizer 21 includes a crystal oscillator 2
A signal of a desired frequency is generated from the oscillating signal from 0 and supplied to the offset mixer 22, the converter 16, and the IF oscillator 23 in the transmission unit 1. The offset mixer 22 outputs a quadrature carrier signal to the quadrature modulator 10 based on the signal from the RF synthesizer 21, and the converter 16 converts the RF signal of a desired reception frequency into an IF signal based on the signal from the RF synthesizer 21. After the conversion, the IF transmitter 23 outputs the quadrature phase I based on the signal from the RF synthesizer 21.
The F signal is output to the quadrature demodulator 19. The above description has been made using the quadrature demodulation circuit. However, as a configuration employing the second IF, demodulation may be performed using a 2nd MIXER circuit and a LIMITTER circuit.

The above is the configuration of a general mobile communication device. FIG. 10 shows a LIMIT in such a communication device.
3 shows an amplifying unit for an IF signal of a demodulation method using a TER circuit. As shown in FIG. 10, the IF signal is input to the amplifier 25 via the band pass filter 24. Then, in the amplifying section 25, first, the signal is amplified by a preceding-stage amplifier circuit 26, further passed through another band-pass filter 27, and then amplified by a subsequent-stage amplifier circuit 28, and then output to a demodulator.

The two amplifier circuits 2 in the amplifier 25
6 and 28 each have an amplification factor of several tens of dB.
Since each of the two amplifier circuits 26 and 28 has an amplification factor of several tens of dB, feedback is applied to each of the amplifier circuits 26 and 28 by feedback amplifier circuits 29 and 30, respectively.
The DC offset generated in each of the amplifier circuits 26 and 28 is removed.

[0010]

In the radio communication system, in the amplifying section 25 having a large amplification factor as described above, the DC component generated in the first stage of each amplification circuit also has the same amplification factor as the input signal to each amplification circuit. Therefore, a signal having a DC offset level or less cannot be taken out as an output.
When the signal is amplified, a deviation of the amplitude center occurs. In order to prevent such a situation, feedback is applied to each amplifier circuit to remove a DC offset.

However, in this structure, a feedback circuit must be prepared for each amplifier circuit.
If the portion including the amplifier circuit and the demodulation circuit is constituted by an IC, the number of pins of the IC is increased by the amount of the feedback circuit connected to the amplifier circuit, which does not contribute to the miniaturization of the IC package and the number of pads of the IC itself. There is no contribution to the reduction. Therefore, the mounting area of the IC is large, the number of components is large, and it has been a factor that hinders the reduction in size, weight, and current consumption of the device. That is, as shown in FIG. 11, the number of pins of the amplifier circuit portion of the IC chip 31 including the two amplifier circuits 26 and 28 and the two feedback circuits 29 and 30 is eight.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to solve the above-mentioned problems and to realize a compact, lightweight, and low current consumption type communication device.

[0013]

SUMMARY OF THE INVENTION The present inventor has disclosed an amplifying unit having two amplifying circuits having a band-pass filter between them, wherein a feedback circuit is connected only to the amplifying circuit of the preceding stage to generate the signal in the amplifying circuit of the preceding stage. By removing the DC offset and making the level of the received signal amplified and output by the preceding amplifier circuit higher than the level of the DC component generated in the first stage of the subsequent amplifier circuit, feedback is provided to the subsequent amplifier circuit. It has been found that a desired amplification factor of the whole amplification section can be obtained without connecting a circuit. That is, a feedback circuit is connected to the first-stage amplifier circuit, no feedback circuit is connected to the second-stage amplifier circuit, and a signal larger than a DC component generated in the first stage of the second-stage amplifier circuit can be input to the second-stage amplifier circuit. Even if the amplification factor of the preceding amplification circuit is set, a desired amplification factor of the entire amplification unit can be secured, and thereby, the DC offset of the entire amplification unit can be suppressed to a practically acceptable level. And that the received signal input to the amplifier can be amplified and output at a desired amplification factor. As a result, in the communication device, the amplifying portion of the receiving circuit can be reduced in size, thereby making it possible to reduce the size of the entire circuit and to reduce the size of the package even in the case of forming an IC.

According to a first aspect of the present invention, there is provided a first amplifier circuit for amplifying a received signal, a second amplifier circuit for amplifying an output signal of the first amplifier circuit, and a feedback for feeding back an output signal of the first amplifier circuit. Wherein the output of the second amplifier circuit is not fed back, and the attenuation factor of the feedback circuit is larger than the amplification factor of the first amplifier circuit.

According to a second aspect of the present invention, in the first aspect, a band-pass filter is disposed between the first amplifier circuit and the second amplifier circuit.

Further, according to a third aspect of the present invention, in the first or second aspect, the first amplifier circuit and the second amplifier circuit are limiter circuits, and the feedback circuit is a low-pass filter.

Further, according to a fourth aspect of the present invention, in any one of the first to third aspects, a third amplifier circuit and a control circuit are further provided, wherein the third amplifier circuit has a common input with the first amplifier circuit. The first amplifier circuit and the second amplifier circuit operate at the same time when a reception signal is input from an end, and the control circuit
It is characterized in that one of the amplifier circuit and the third amplifier circuit is controlled to operate.

According to a fifth aspect of the present invention, in the fourth aspect, the first amplification circuit and the second amplification circuit are connected to a conversion circuit for converting a received signal level into a DC potential.
The third amplifier circuit includes a variable amplifier, and an output of the variable amplifier is connected to a demodulator.

Further, the invention according to claim 6 is characterized in that the communication device uses the receiver according to any one of claims 1 to 5.

[0020]

Embodiments of the present invention will be described below in detail.

(Embodiment 1) The present invention will be described below with reference to Embodiment 1, but the present invention is not limited to this embodiment.

FIG. 1 shows a circuit diagram of this embodiment. Amplifier 3
2 is supplied with a received signal via a band-pass filter 24. The amplification circuit 33 in the preceding stage in the amplification unit 32 amplifies the signal from the bandpass filter 24, and the output is supplied to the feedback circuit 34 and the bandpass filter 27. The output of the feedback circuit 34 is fed back to the input of the amplifier circuit 33. Bandpass filter 27
Is supplied to the input of the subsequent amplification circuit 35.

FIG. 2 shows the configuration of the feedback circuit 34. The feedback circuit 34 includes a resistor and a capacitor to feed back only the DC component of the output signal when the reception frequency is several hundred KHz. The attenuation factor of the received signal by the low-pass filter is
, And only the DC component is fed back. This feedback circuit has a resistance of several tens KΩ and a resistance of several tens KΩ in order to secure the attenuation rate.
It is configured by a capacitor having a capacitance of nF, and when configured by an IC, the configurations shown in FIGS. 3 and 4 can be used. 3
Reference numerals 6 and 37 denote IC chip portions.

Although feedback is possible with the configuration of FIG. 3, in order to configure the IC with fewer terminals (pins), as shown in FIG. By cutting the DC, the input-side terminal of the IC chip 36 can be composed of three terminals.

FIG. 5 shows an amplifying section including the configuration of FIG. 4. Compared with FIG. 11 showing the structure of a conventional similar IC chip, the number of pins is reduced by two. Understand.

Here, a more specific example of the configuration shown in FIG. 5 will be described. For example, the amplifier circuits 33 and 35 can be operated as limiter circuits. In this case,
The operation of the amplifier will be described below.

Assuming that the received signal is Vsig and the amplification factor of the preceding amplification circuit 33 is G1, Vsig × G1 is input as the input signal of the subsequent amplification circuit 35. On the other hand, the DC offset component generated in the first stage of the amplification circuit 35 is Vof
f and the amplification factor G2 of the amplifier circuit 35, when there is no received signal or when the received signal is smaller than Voff, the output of the amplifier circuit 35 is Voff × G2. Is the number 1 as the limiter circuit
Since it has an amplification factor of 0 dB, it is fixed to one of the potentials of the output of the amplification circuit 35 as a limiter and has a constant voltage. Therefore, a signal responsive to a received signal smaller than Voff cannot be extracted as an output. This is shown in FIG.

However, the reception signal Vsig of the amplification circuit 35
When × G1 is larger than Voff, the amplification circuit 35
It is possible to output the received signal as a rectangular wave without removing Voff by the feedback in the above. For example, the level of the received signal input to the amplification unit
In the case where -100 dBm is received at the input section of the above, by setting the amplification factor of the amplifier circuit 33 to 50 dB or more,
The received signal level of the amplifier circuit 35 is −50 dBm,
When the input impedance of this portion is 1 KΩ, the magnitude of the received signal at the input of the amplifier circuit 35 is 2 mVp
Since the DC component generally occurs when the amplifier circuit 35 is formed of a bipolar circuit, the DC component can be reduced to about 1 mV, the amplifier circuit 35 can output a rectangular wave responsive to the input received signal. This is shown in FIG.

In another example of the configuration shown in FIG. 5, the gain of the front-stage amplifier circuit 33 constituting the amplifying section is set to 10 dB, and the gain of the rear-stage amplifier circuit 35 is set to 40 dB. The 10 mV DC offset is removed by the feedback circuit 34,
When signals of 0.05 mVpk, 1 mVpk, 10 mVpk, and 50 mVpk were input, an output responsive to the input signal could be extracted from the amplifier circuit 35 in any case. On the other hand, 1
Except that the 0 mV DC offset is not removed, the pre-amplifier 33 is supplied with 0.05 mVpk, 1 mVp
When signals of 10 mVpk and 50 mVpk are input, the output of the amplifier circuit 35 becomes a constant output of the upper limit voltage or the lower limit voltage of the rectangular wave with the signals of 0.05 mVpk and 1 mVpk (that is, the signal responding to the input signal becomes 10mVpk and 50mV
Only an output corresponding to the input signal could be extracted from the amplifier circuit 35 for the pk signal.

(Embodiment 2) FIG. 8 shows a receiving circuit of the present invention corresponding to a plurality of communication systems. The receiving circuit 100 of one communication system includes an amplifier circuit 33, an amplifier circuit 35,
The feedback circuit 34 and the received signal level
RSSI (Received S)
and a receiving indicator 200 of the other communication system.
It comprises a variable amplifier circuit 41, a demodulator 42, and a divide-by-4 circuit 51 that generates a local signal used when the demodulator 42 converts the signal into a baseband signal. By using a divide-by-2 or divide-by-4 circuit, signals having a phase difference of 90 degrees can be generated, and a local signal with high demodulation accuracy can be generated. The receiving circuit 100 and the receiving circuit 200 do not operate at the same time, and the control circuit 43 controls the RSSI circuit 38 and the variable amplifier circuit 41 so that one of them operates according to the communication system to be operated. This receiving apparatus can support a plurality of communication systems, and the receiving circuit 100 can use the FM signal, and the receiving circuit 200 can use the digital signal. The amplifying circuit 33 and the variable amplifying circuit 41 can share the feedback circuit 34 for removing the generated DC offset signal, and the entire circuit can be reduced in size and weight.

[0031]

As described above, according to the present invention, an inexpensive, compact and lightweight communication device can be constructed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing some details of the first embodiment;

FIG. 3 is a block diagram showing another example of some of the details of the first embodiment;

FIG. 4 is a block diagram showing still another example of some of the details of the first embodiment;

FIG. 5 is a block diagram showing still another example of some of the details of the first embodiment;

FIG. 6 is a diagram illustrating an example of an output from a limiter circuit when an input signal is larger than an offset voltage.

FIG. 7 is a diagram illustrating an example of an output from a limiter circuit when an input signal is smaller than an offset voltage.

FIG. 8 is a block diagram showing a second embodiment of the present invention.

FIG. 9 is a diagram showing a configuration of a general mobile communication device (transceiver).

FIG. 10 is a diagram illustrating an example of a conventional amplification unit.

FIG. 11 is a diagram showing details of the conventional amplification unit.

[Explanation of symbols]

 33,35 amplifying circuit 24,27 bandpass filter 34 feedback circuit

Continued on the front page F term (reference) 5J030 CB04 CB05 CB08 CC04 5J069 AA01 CA13 CA92 FA14 FA17 HA25 HA29 KA20 KA44 MA08 MA13 SA13 TA01 TA02 TA06 5J090 AA01 CA13 CA92 DN02 FA14 FA17 HA25 HA29 HN11 HN17 KA20 NN13 TA02 TA06 5J100 AA20 BA01 BC05 CA05 CA07 DA06 EA02 FA02 JA03 LA03 QA01 SA02 5K061 AA01 AA02 BB09 BB14 CC08 JJ24

Claims (6)

[Claims] A first amplifier circuit for amplifying a received signal; a second amplifier circuit for amplifying an output signal of the first amplifier circuit;
A feedback circuit for feeding back an output signal of the first amplifier circuit, wherein the output of the second amplifier circuit does not feed back, and an attenuation factor of the feedback circuit is larger than an amplification factor of the first amplifier circuit. Characteristic receiving device. 2. The receiving device according to claim 1, wherein a band-pass filter is arranged between the first amplifier circuit and the second amplifier circuit. 3. The receiving device according to claim 1, wherein the first amplifier circuit and the second amplifier circuit are limiter circuits, and the feedback circuit is a low-pass filter. 4. The device according to claim 1, further comprising a third amplifier circuit, and a control circuit, wherein the third amplifier circuit inputs a reception signal from an input terminal common to the first amplifier circuit. The first amplifier circuit and the second amplifier circuit operate simultaneously, and the control circuit controls one of the first amplifier circuit and the third amplifier circuit to operate. Receiver. 5. The device according to claim 4, wherein the first amplifier circuit and the second amplifier circuit are connected to a conversion circuit that converts a received signal level into a DC potential, and the third amplifier circuit is configured by a variable amplifier. An output of the variable amplifier is connected to a demodulator. 6. A communication device using the receiving device according to claim 1.