JP2000260775A - Wiring formation method - Google Patents

Abstract

(57) [Summary] (With correction) [PROBLEMS] A conventional antireflection film formed on the bottom of a resist pattern by an ARL process requires a separate process chamber and a gas introduction system, which leads to an increase in cost. In addition, the EM resistance is low, and a problem may occur in reliability. According to the present invention, a metal film (3) serving as a wiring is formed on an interlayer insulating film (2) formed on a semiconductor substrate (1). An anti-reflection film 4 made of a thin TiN film (or TiN / Ti film) is formed by a low-temperature process to form a resist pattern 5, and the metal film 3 is etched using the resist pattern as a mask to form a wiring pattern. This is a method of forming a wiring for forming a pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a wiring for connecting circuit elements, electrodes and the like formed on a semiconductor substrate.

[0002]

2. Description of the Related Art In general, after laminating various films on a semiconductor substrate, a mask having a predetermined pattern is formed by using a photoresist technique, and unnecessary regions are removed by etching to remove circuit elements and wirings. Has formed.

Usually, when a resist pattern is formed, a resist made of a photosensitive agent is applied on a semiconductor substrate using spin coating so that the surface is flattened, and then exposed using a reticle as a photomask. With this exposure,
The area irradiated with the light beam becomes soluble or hardly soluble in the developing solution, and these are developed to form a desired pattern.

However, finer wiring is required in accordance with higher integration of circuits, and when trying to reduce the width of wiring, fluctuations in the dimensional width of resist patterns, which were not so much a problem in the past, have become a serious problem. Come.

There are two main causes of the variation in the dimension width. One is caused by a variation in the performance of a resist material or a forming apparatus when a resist mask is formed. One is generated from the reflection of the substrate at the time of exposure of the photolithography technique.

One of the problems of dimensional variation due to substrate reflection is a phenomenon in which unexposed portions of a resist are exposed due to reflection from a step on a substrate or an oblique portion of an uneven portion. It is called halation.

In order to prevent this, a process of forming an anti-reflection film on the bottom of a resist has been proposed as one method of preventing reflection from a wiring film of aluminum or the like which causes harlation.

Conventionally, ARC (Anti-Reflective Coat)
ing) A method of forming an antireflection film called a process is known.

In this ARC process, an ARC material serving as an anti-reflection film is applied on a wiring film so as to have a flat surface, a resist pattern is formed on the ARC film, and then a resist pattern is formed thereon. ARC not done
The film region is removed to expose the wiring layer region.
After the exposure of the wiring layer, the process proceeds to an etching step to form a wiring pattern.

[0010]

However, the ARC process includes a step of applying an ARC material before the resist film is applied so as to make the surface flat, and a step of forming an unnecessary ARC material after forming the resist pattern. Is required. For this reason, there is a cost increase accompanying an increase in the number of steps. Further, when there is a step on the semiconductor substrate, the film thickness of the ARC material to be coated may become non-uniform, and the dimensions of a resist pattern formed in a later step may fluctuate. That is, if the ARC film thickness is different between the upper and lower steps, the dimension of the resist pattern is not accurately transferred to the wiring.

Therefore, instead of an antireflection film formed by an ARC process, an ARL (Anti-Reflective Layer deposite) is used.
An anti-reflection film by the d by CVD) process is being studied.

In the ARL process, a sufficiently thin antireflection film having a constant thickness is formed on a semiconductor substrate, and a resist film is formed thereon. Therefore, since the irregularities on the surface of the semiconductor substrate are traced, forming a resist pattern on the antireflection film is almost equivalent to forming a resist pattern directly on the wiring layer.

As a material for the reflection film, an amorphous carbon film or the like has been studied. However, when the film is formed by using the CVD technique or the like, a separate process chamber and a gas introduction system must be provided, which leads to an increase in cost. Connect. Also,
When TiN or TiN / Ti is used as an anti-reflection film, electromigration (EM) resistance is low,
In some cases, there was a problem in terms of reliability, so the present invention is based on thin film materials used in normal processes.
An object of the present invention is to provide a method for forming a wiring, which forms an antireflection film at the time of forming a resist pattern, and realizes miniaturization of the wiring and reliability of high EM resistance.

[0014]

According to the present invention, in order to achieve the above object, after a metal film to be a wiring is formed on a semiconductor substrate, the semiconductor substrate is cooled to room temperature,
A sufficiently thin Ti film or TiN / T on the metal film
forming an anti-reflection film made of any one of i-films;
Provided is a method for forming a wiring, comprising: applying a resist material on the antireflection film to form a resist pattern; and etching the metal film using the resist pattern as a mask to form a wiring pattern. I do. The metal film in the method for forming a wiring is made of either aluminum or an aluminum alloy.

According to the above-described method for forming a wiring, after a metal film to be a wiring is formed on a semiconductor substrate, the temperature of the semiconductor substrate is cooled to room temperature, and then a sufficiently thin TiN film is formed on the metal film. By forming a film or an anti-reflection film made of a TiN / Ti film by a low-temperature process, the components of the reflection film enter the metal film, thereby preventing the formed wiring from deteriorating the EM resistance.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a process step of a part of a wiring formed on a semiconductor plate. With reference to this, an embodiment according to a wiring forming method of the present invention will be described.

In this embodiment, for example, when a wiring made of aluminum (Al) or an aluminum alloy is formed, an anti-reflection film for forming a resist pattern is used.
A laminated film of Ti or TiN / Ti is used.

As shown in FIG. 1A, an interlayer insulating film 2 formed on a semiconductor substrate 1, for example, an Al
Is formed by a film forming apparatus such as sputtering or CVD.

After forming the metal film 3, the semiconductor substrate 1
Is cooled to room temperature (for example, about 20 ° C.). As a method, a table (not shown) on which a semiconductor substrate of a film forming apparatus is mounted is usually provided with a cooling mechanism. And cool. Further, it may be taken out of the process chamber and cooled by a cooling mechanism provided in another chamber, or may be naturally cooled as it is taken out. Conventionally, since the anti-reflection film was formed continuously after the Al film was formed, the anti-reflection film was formed while the Al film was kept at a high temperature, and the Ti component of the anti-reflection film was added to the Al film. Enters. When this Al film is formed as a wiring, the resistance value may increase and the EM resistance may easily deteriorate.

Therefore, in this embodiment, the formed Al film is cooled to a normal temperature, that is, a so-called room temperature.

Then, the metal film 2 of the semiconductor substrate cooled to room temperature is sufficiently thin, for example, a film thickness of 10 to 30.
An anti-reflection film 3 made of a Ti film (or a TiN / Ti film) of about nm is formed. When this antireflection film is formed, a low-temperature process such as a sputtering technique is preferable. Of course, the CVD technique may be used if it can be formed at a relatively low temperature.

As shown in FIG. 1B, a resist made of a photosensitive agent (positive type or negative type) is applied on the antireflection film 4 by spin coating so as to have a uniform thickness. Is exposed using as a photomask. By this exposure, the region irradiated with the light beam becomes soluble or hardly soluble in the developing solution, and is developed to form a desired resist pattern 5 as shown in FIG.

Thereafter, as shown in FIG. 1D, etching is performed to remove unnecessary regions of the metal film 3 to form wirings 6, and the resist pattern 5 is removed. An anti-reflection film 7 is left on the wiring 6.

Referring to FIG. 2, the characteristics of the wiring 6 thus formed will be described.

FIG. 2 shows [a] a wiring in which the above-described metal film 3 is formed and then a reflection film 4 is continuously formed without considering the temperature of the semiconductor substrate 1, and [b] the present embodiment. After the metal film 3 is formed according to the form, the semiconductor substrate 1 is cooled to room temperature, and the activation energy and the EM estimated lifetime of each of the wiring 5 on which the antireflection film 4 is formed by a low-temperature process are compared. Represents.

The film forming conditions in this example are as follows.
(00 ° C.), and a laminated film of a 10-nm-thick Ti film and a 150-nm-thick TiN film is formed as the anti-reflection film 3 by using a sputtering technique. As this characteristic condition, the activation energy is obtained from the slope of the temperature versus the disconnection time. However, the wiring temperature is 29
0 ° C, 310 ° C, and 330 ° C.

In this case, the activation energy is 0.75 eV for the wiring [a], and the activation energy is 1.07 eV for the wiring [b] according to the present embodiment.

The EM life is obtained by the following equation.

Ttf = AJ-2exp (Ea / kT) where Ttf: failure time, A: proportional constant, J: current density,
Ea: activation energy, T: semiconductor substrate temperature.
Based on this equation, 50% of the failures were at a wiring temperature of 125 ° C.
The graph shows the estimated disconnection time under the condition of a current density of 2E5 A / cm ² .

The EM life thus obtained is determined by the wiring [a]
Is 890, and wiring [b] is 32202.

Accordingly, the EM life of the wiring is inversely proportional to the square of the current density ratio as shown in the above equation. Therefore, assuming the same EM life, the current density is set to six times for the same wiring width. it can. Conversely, if the current density is the same, the wiring width can be reduced to 1/6.

As described above, according to the present embodiment, after forming a wiring film made of a metal film, the semiconductor substrate is cooled to room temperature, and an antireflection film made of Ti or Ti / TiN is formed by a low-temperature process. By forming the film, it is possible to prevent the components of the antireflection film from entering the metal film.
It can be formed as a wiring having high M resistance.

Further, since the anti-reflection film is formed using Ti and TiN as materials, it is possible to use a process chamber, a target or a gas introduction system equipped with a normal specification, and it is necessary to separately add the same. It is also useful in terms of cost.

A desired resist pattern can be formed on the antireflection film made of the thin film, and a wiring pattern as designed can be formed by etching without causing a conventional pattern shift. .

As described above, when the EM life of the wiring is considered to be the same as the conventional EM life years, if the wiring width is the same, the current density can flow several times. Conversely, if the current density is the same, the wiring width can be reduced to a fraction, and furthermore, it is possible to integrate the wiring.

In this embodiment, as compared with the ARC process described above, the antireflection film is formed as a thin film on the metal film to be the wiring, so that even if there is a step on the surface, the variation in film thickness is reduced. And dimensional variations can be minimized.

[0038]

As described above in detail, according to the present invention, an antireflection film is formed at the time of forming a resist pattern by using a thin film material used in a normal process, so that fine wiring and high EM resistance can be obtained. A method for forming a wiring which achieves reliability can be provided.

[Brief description of the drawings]

FIG. 1 is a process diagram for describing an embodiment according to a wiring forming method of the present invention.

FIG. 2 is a diagram for explaining activation energy and estimated EM life of a wiring formed according to the embodiment;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor substrate 2 interlayer insulating film 3 metal film 4 antireflection film 5 resist pattern 6 wiring

Claims (2)

[Claims] After a metal film to be a wiring is formed on a semiconductor substrate, the semiconductor substrate is cooled to room temperature, and a sufficiently thin Ti film or TiN film is formed on the metal film.
A step of forming an anti-reflection film made of any one of Ti / Ti film; a step of applying a resist material on the anti-reflection film to form a resist pattern; and etching the metal film using the resist pattern as a mask. And forming a wiring pattern. 2. The method according to claim 1, wherein the metal film in the method for forming a wiring is made of one of aluminum and an aluminum alloy.