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JP2000114701A - Component mounting method on circuit board - Google Patents

Component mounting method on circuit board

Info

Publication number
JP2000114701A
JP2000114701A JP10277199A JP27719998A JP2000114701A JP 2000114701 A JP2000114701 A JP 2000114701A JP 10277199 A JP10277199 A JP 10277199A JP 27719998 A JP27719998 A JP 27719998A JP 2000114701 A JP2000114701 A JP 2000114701A
Authority
JP
Japan
Prior art keywords
circuit board
chip
mounting
cream solder
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10277199A
Other languages
Japanese (ja)
Inventor
Kozo Masuda
幸造 増田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10277199A priority Critical patent/JP2000114701A/en
Publication of JP2000114701A publication Critical patent/JP2000114701A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To miniaturize an equipment and make it thinner by mounting a chip part on a side surface of a circuit board. SOLUTION: A recessed part 5 having a thin conductive layer for connecting a chip part is provided to a side surface of a board 1, and the recessed part 5 is filled with cream solder to mount a chip part. The thin conductive layer is previously formed on an inner surface of the recessed part 5 in a technique of through-hole plating to make soldering possible. In the circuit board 1, the recessed part 5 is exposed from the side surface of the circuit board 1. And the circuit board 1 is set on a supply jig 13, and a first-surface mounting part 14 and a side-surface mounting part 15 are fitted to specified positions, respectively, and the supply jig 13 is put in a reflow furnace, thereby obtaining a double faced circuit board wherein a chip part is mounted on a side surface.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、回路基板並びに部
品の実装方法に関するものである。
The present invention relates to a circuit board and a method for mounting components.

【0002】[0002]

【従来の技術】従来、回路基板への表面実装部品の実装
は回路基板の表面および裏面にのみ行われている。図8
(a)に示す回路基板30は、パソコン筐体31の内部
に収められ、周囲は筐体側面、キーボード32、ハード
ディスクドライブ33等によって囲まれている。図8
(a)に示す従来例の場合、パソコンの高さを制限して
いるのは回路基板30の表面に実装された背の高い表面
実装部品34である。背の高い表面実装部品34を図8
(b)のように回路基板30の側面に取り付ければ回路
基板30の高さを低くすることができる。この時、回路
基板30の面積は表面実装部品34の取り付け場所をな
くすことができるので、回路基板30の面積を小さくで
きる。従って、従来面積よりは小さくてよく、小型・軽
量・薄型化が達成できる。
2. Description of the Related Art Conventionally, surface mount components are mounted on a circuit board only on the front and back surfaces of the circuit board. FIG.
The circuit board 30 shown in (a) is housed inside a personal computer housing 31, and its periphery is surrounded by a side surface of the housing, a keyboard 32, a hard disk drive 33 and the like. FIG.
In the case of the conventional example shown in (a), the height of the personal computer is limited by the tall surface-mounted components 34 mounted on the surface of the circuit board 30. The tall surface mount component 34 is shown in FIG.
By attaching to the side surface of the circuit board 30 as shown in (b), the height of the circuit board 30 can be reduced. At this time, the area of the circuit board 30 can be reduced because the mounting area of the surface mount component 34 can be eliminated. Therefore, the area may be smaller than the conventional area, and a reduction in size, weight, and thickness can be achieved.

【0003】リード線付き部品の場合には、接続ランド
を回路基板の周辺に配しリード線を半田で固定した後リ
ード線を折り曲げて図8(b)のように表面実装部品を
寝かせることはできたが、平面端子を有するチップ部品
の場合には図8(a)の取り付けしかできなかった。
In the case of a component with a lead wire, it is difficult to arrange a connection land around the circuit board, fix the lead wire with solder, and then bend the lead wire to lay down the surface mount component as shown in FIG. However, in the case of a chip component having a flat terminal, only the mounting shown in FIG. 8A could be performed.

【0004】[0004]

【発明が解決しようとする課題】本発明は、チップ部品
の接続ランドを回路基板の側面に設け、機器の小型化、
薄型化に対応する回路基板を提供することを目的とす
る。
SUMMARY OF THE INVENTION According to the present invention, connection lands for chip components are provided on the side surface of a circuit board to reduce the size of equipment.
It is an object of the present invention to provide a circuit board corresponding to a reduction in thickness.

【0005】[0005]

【課題を解決するための手段】この課題を解決するため
に本発明は、回路基板の側面にチップ部品を実装するよ
うに構成したものである。
SUMMARY OF THE INVENTION In order to solve this problem, the present invention is configured to mount a chip component on a side surface of a circuit board.

【0006】[0006]

【発明の実施の形態】本発明の請求項1に記載の発明
は、基板の側面にチップ部品を接続するための薄い導電
層を有する凹部を設け、凹部にクリーム半田を充填し
て、前記チップ部品を実装することを特徴とするもので
あり、高密度実装回路基板を提供することができ、機器
の小型・軽量・薄型化を図ることができる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is characterized in that a concave portion having a thin conductive layer for connecting a chip component is provided on a side surface of a substrate, and the concave portion is filled with cream solder to form the chip. It is characterized by mounting components, so that a high-density mounting circuit board can be provided, and the size, weight, and thickness of the device can be reduced.

【0007】本発明の請求項2に記載の発明は、請求項
1に記載の発明であって、チップ部品を収納する収納枠
を凹部と対向する周辺基板に設けたことを特徴とするも
のであり、特別な治具を必要とすることなく側面実装基
板を製造することができる。
According to a second aspect of the present invention, there is provided the first aspect of the present invention, wherein a storage frame for storing the chip component is provided on a peripheral substrate facing the recess. In addition, the side mounting substrate can be manufactured without requiring a special jig.

【0008】以下、図1〜図7により本発明の実装方法
を説明する。 (実施の形態1)図1は、回路基板側面への部品ランド
の形成方法について説明する斜視図である。図におい
て、1は回路基板、2は回路基板1の周辺基板、3はス
ルーホール、4は配線パターン、5は側面ランドを形成
するために設けた凹部である。
Hereinafter, a mounting method of the present invention will be described with reference to FIGS. (Embodiment 1) FIG. 1 is a perspective view for explaining a method of forming a component land on a side surface of a circuit board. In the drawing, 1 is a circuit board, 2 is a peripheral board of the circuit board 1, 3 is a through hole, 4 is a wiring pattern, and 5 is a recess provided for forming a side land.

【0009】凹部5の内面には、半田付けが可能なよう
にスルーホールメッキの手法を用いて薄い導電層が予め
形成されている。
On the inner surface of the recess 5, a thin conductive layer is formed in advance by using a through-hole plating technique so that soldering can be performed.

【0010】配線パターン4は表面基板に設けている
が、内層基板に設けてもよい。周辺基板2は回路基板1
の製造工程、検査工程における、位置決め、搬送等に使
用するものであり、回路基板1に実装部品が取り付けら
れ最終工程検査が終了した後には、スルーホール3に沿
って周辺基板2が切り落とされ完成回路基板となる。
Although the wiring pattern 4 is provided on the front substrate, it may be provided on the inner substrate. The peripheral board 2 is the circuit board 1
Is used for positioning, transporting, etc. in the manufacturing process and the inspection process. After the mounting components are mounted on the circuit board 1 and the final process inspection is completed, the peripheral substrate 2 is cut off along the through holes 3 and completed. It becomes a circuit board.

【0011】実施の形態1では、図2に示すようにチッ
プ部品を接続するためのクリーム半田7を回路基板の側
面6より突出させて盛ることが必要である。
In the first embodiment, as shown in FIG. 2, it is necessary to protrude the cream solder 7 for connecting the chip components from the side surface 6 of the circuit board.

【0012】以下、製造工程の順を追って実施の形態1
の側面実装方法を説明する。図3は実施の形態1におけ
る回路基板1の全体正面図であり、8は実装部品を表面
実装するための接続ランド、9は周辺基板2を切り落と
す切り落とし線である。回路基板1の両面に部品実装さ
れるものであるが、第1面は通常のリフロー工程によっ
て製造できるので、側面実装を行う第2面のリフロー工
程より説明する。
Hereinafter, the first embodiment will be described in the order of the manufacturing process.
A side mounting method will be described. FIG. 3 is an overall front view of the circuit board 1 according to the first embodiment. Reference numeral 8 denotes connection lands for surface-mounting mounted components, and reference numeral 9 denotes a cut-off line for cutting off the peripheral board 2. Although components are mounted on both sides of the circuit board 1, the first surface can be manufactured by a normal reflow process. Therefore, the reflow process on the second surface for performing side mounting will be described.

【0013】第一面のリフロー工程が終了した回路基板
1は、始めに切り取り線9に沿って周辺基板2が切り落
とされ、図2のような凹部5が回路基板1の側面に露出
する。図4(a)は凸状のクリーム半田を凹部5に形成
するための治具プレート10である。治具プレート10
は周辺基板2を切り落とした回路基板1を収容する枠部
11を有し、枠部11の周辺には凹部5に対応する切り
込み12が設けてある。枠部11に第1面の実装が済ん
で、周辺基板2を切り落とした回路基板1を載置した断
面図が図4(b)である。図4(b)の表面に印刷法に
より、クリーム半田7を塗布する。クリーム半田7を風
乾後、回路基板1を治具プレート10より取り出すと、
接続ランド8の半田塗布と凹部5の突出半田(図2に示
す状態)とが同時に形成される。
The circuit board 1 on which the first surface reflow process has been completed is first cut off the peripheral board 2 along the cutout line 9, and the recess 5 as shown in FIG. 2 is exposed on the side surface of the circuit board 1. FIG. 4A shows a jig plate 10 for forming a convex cream solder in the concave portion 5. Jig plate 10
Has a frame 11 for accommodating the circuit board 1 obtained by cutting off the peripheral board 2, and a cut 12 corresponding to the recess 5 is provided around the frame 11. FIG. 4B is a cross-sectional view in which the circuit board 1 in which the first surface has been mounted on the frame portion 11 and the peripheral substrate 2 has been cut off has been mounted. A cream solder 7 is applied to the surface of FIG. 4B by a printing method. After the cream solder 7 is air-dried, the circuit board 1 is taken out from the jig plate 10.
The solder application of the connection lands 8 and the protruding solder of the concave portions 5 (the state shown in FIG. 2) are simultaneously formed.

【0014】上記回路基板1を供給治具13にセット
し、所定位置に表面実装部品14、側面実装部品15を
取り付け、供給治具13をリフロー炉に入れると、チッ
プ部品を側面実装した両面回路基板が得られる(図
5)。
When the circuit board 1 is set on a supply jig 13, a surface mount component 14 and a side mount component 15 are mounted at predetermined positions, and the supply jig 13 is placed in a reflow furnace. A substrate is obtained (FIG. 5).

【0015】(実施の形態2)図6は実施の形態2で使
用する回路基板16の部分正面図である。回路基板16
は周辺基板19に実装するチップ部品18を収納する収
納枠17を有する。
(Second Embodiment) FIG. 6 is a partial front view of a circuit board 16 used in a second embodiment. Circuit board 16
Has a storage frame 17 for storing a chip component 18 mounted on a peripheral substrate 19.

【0016】実施の形態1で説明した第1面の実装が終
了した回路基板16を裏向けにし、チップ部品18を収
納枠17にセットする。この時、チップ部品18の電極
が回路基板16に設けた側面ランドとなる凹部5に対向
するように、かつ回路基板16とチップ部品18の側面
の高さが面一となるように取り付ける(図7(a))。
The circuit board 16 on which the mounting of the first surface described in the first embodiment is completed is turned upside down, and the chip component 18 is set in the storage frame 17. At this time, the chip component 18 is attached so that the electrode of the chip component 18 faces the concave portion 5 serving as a side surface land provided on the circuit board 16 and the side surfaces of the circuit board 16 and the chip component 18 are at the same height (FIG. 7 (a)).

【0017】実施の形態1で説明した印刷法によって接
続ランド8、凹部5にクリーム半田を塗布する。クリー
ム半田7を塗布した凹部5のA断面を図7に示す。この
時、クリーム半田7の表面が盛り上がるように塗布し、
クリーム半田7がリフロー炉内で熔融して体積が収縮し
た場合に、盛り上がり部のクリーム半田7が凹部5に引
き込まれるようにする。リフロー後周辺基板19をスル
ーホール3に沿って切り落として、両面・側面実装基板
が得られる。
A cream solder is applied to the connection lands 8 and the recesses 5 by the printing method described in the first embodiment. FIG. 7 shows a section A of the recess 5 to which the cream solder 7 has been applied. At this time, apply so that the surface of the cream solder 7 rises,
When the cream solder 7 is melted in the reflow furnace and contracted in volume, the cream solder 7 in the raised portion is drawn into the recess 5. After the reflow, the peripheral substrate 19 is cut off along the through holes 3 to obtain a double-sided / side-side mounted substrate.

【0018】なお、回路基板16と側面チップ部品18
の厚みが大幅に異なる場合には、印刷法によらずディス
ペンサーによって、クリーム半田を凹部5に充填するこ
ともできる。図7(b)は、チップ部品18の端子電極
21が凹部5に対向するように、チップ部品18を収納
枠17に取り付け、ディスペンサー20によってクリー
ム半田7を接続部に充填している断面図である。
The circuit board 16 and the side chip components 18
In the case where the thickness of the solder paste is significantly different, the cream solder can be filled in the recess 5 by a dispenser regardless of the printing method. FIG. 7B is a cross-sectional view in which the chip component 18 is mounted on the storage frame 17 so that the terminal electrode 21 of the chip component 18 faces the recess 5, and the connection portion is filled with the cream solder 7 by the dispenser 20. is there.

【0019】また、実施の形態では回路基板の側面にチ
ップ部品を実装した例で説明したが、基板をロの字状に
切り欠いて、ロの字の内側側面に部品実装することも可
能である。
Although the embodiment has been described with an example in which chip components are mounted on the side surface of the circuit board, the substrate may be cut out in a square shape and the components may be mounted on the inner side surface of the square shape. is there.

【0020】[0020]

【発明の効果】本発明によれば、実装部品の高さを薄く
することができ、機器の薄型化を図ることができる。
According to the present invention, the height of the mounted component can be reduced, and the thickness of the device can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施の形態における側面凹部の周辺を示す斜視
FIG. 1 is a perspective view showing the periphery of a side recess in an embodiment.

【図2】実施の形態における側面凹部のクリーム半田の
斜視図
FIG. 2 is a perspective view of a cream solder in a side recess according to the embodiment;

【図3】実施の形態における回路基板の正面図FIG. 3 is a front view of a circuit board according to the embodiment;

【図4】(a)実施の形態における治具プレートの斜視
図(b)実施の形態における治具プレートに回路基板を
載置した断面図
FIG. 4A is a perspective view of a jig plate according to the embodiment; FIG. 4B is a cross-sectional view in which a circuit board is mounted on the jig plate according to the embodiment;

【図5】実施の形態におけるリフロー工程での供給治具
の斜視図
FIG. 5 is a perspective view of a supply jig in a reflow step in the embodiment.

【図6】実施の形態における他の回路基板を説明する正
面図
FIG. 6 is a front view illustrating another circuit board in the embodiment.

【図7】(a)実施の形態における側面凹部へのクリー
ム半田の塗布状態を説明する断面図 (b)ディスペンサーによるクリーム半田の充填を説明
する断面図
FIG. 7A is a cross-sectional view illustrating a state of applying cream solder to a side recess according to the embodiment; and FIG. 7B is a cross-sectional view illustrating filling of cream solder by a dispenser.

【図8】(a)従来の表面実装回路基板の断面図 (b)表面実装・側面実装回路基板の断面図FIG. 8A is a cross-sectional view of a conventional surface mount circuit board. FIG. 8B is a cross-sectional view of a surface mount / side mount circuit board.

【符号の説明】[Explanation of symbols]

1、16 回路基板 2 周辺基板 5 凹部 7 クリーム半田 8 表面接続ランド 15 側面実装部品 17 チップ部品収納枠 DESCRIPTION OF SYMBOLS 1, 16 Circuit board 2 Peripheral board 5 Depression 7 Cream solder 8 Surface connection land 15 Side mounting component 17 Chip component storage frame

フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 3/42 640 H05K 3/42 640Z Fターム(参考) 4M105 AA11 5E317 AA04 AA22 AA25 CC15 CC22 CD32 GG14 5E319 AA01 AA08 AA10 AB01 AB05 BB05 CC33 CD27 CD29 GG01 5E336 AA08 AA13 AA14 BB02 BC25 BC36 CC51 DD26 EE03 Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat II (Reference) H05K 3/42 640 H05K 3/42 640Z F term (Reference) 4M105 AA11 5E317 AA04 AA22 AA25 CC15 CC22 CD32 GG14 5E319 AA01 AA08 AA10 AB01 AB05 BB05 CC33 CD27 CD29 GG01 5E336 AA08 AA13 AA14 BB02 BC25 BC36 CC51 DD26 EE03

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】基板の側面にチップ部品を接続するための
薄い導電層を有する凹部を設け、前記凹部にクリーム半
田を充填して、前記チップ部品を実装することを特徴と
する回路基板への部品実装方法。
A concave portion having a thin conductive layer for connecting a chip component is provided on a side surface of the substrate, the concave portion is filled with cream solder, and the chip component is mounted. Component mounting method.
【請求項2】チップ部品を収納する収納枠を凹部と対向
する周辺基板に設けたことを特徴とする請求項1に記載
の回路基板への部品実装方法。
2. The method for mounting components on a circuit board according to claim 1, wherein a storage frame for storing the chip components is provided on the peripheral substrate facing the recess.
JP10277199A 1998-09-30 1998-09-30 Component mounting method on circuit board Pending JP2000114701A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10277199A JP2000114701A (en) 1998-09-30 1998-09-30 Component mounting method on circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10277199A JP2000114701A (en) 1998-09-30 1998-09-30 Component mounting method on circuit board

Publications (1)

Publication Number Publication Date
JP2000114701A true JP2000114701A (en) 2000-04-21

Family

ID=17580198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10277199A Pending JP2000114701A (en) 1998-09-30 1998-09-30 Component mounting method on circuit board

Country Status (1)

Country Link
JP (1) JP2000114701A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008533744A (en) * 2005-03-15 2008-08-21 メドコンクス, インコーポレイテッド Micro solder pot
CN111988910A (en) * 2019-05-23 2020-11-24 枣有限公司 Electronic component mounting structure and electronic component mounting method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008533744A (en) * 2005-03-15 2008-08-21 メドコンクス, インコーポレイテッド Micro solder pot
US7718927B2 (en) 2005-03-15 2010-05-18 Medconx, Inc. Micro solder pot
CN111988910A (en) * 2019-05-23 2020-11-24 枣有限公司 Electronic component mounting structure and electronic component mounting method
US11013118B2 (en) 2019-05-23 2021-05-18 Jujube Llc Electronic component mounting structure and method

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