JP2000182369A - Magnetic recording semiconductor memory device and method of manufacturing the same - Google Patents

Abstract

(57) Abstract: A semiconductor memory device having a novel cell configuration that solves the disadvantages of various semiconductor memory devices. In one memory cell, a magnetic core material (3) having a gap (3a) in a closed magnetic path, and a magnetic recording medium (4) magnetized by a leakage magnetic field from a gap (3a) of an adjacent magnetic core material (3).
And a write current for electromagnetically coupling to the magnetic core material 3 to generate a leakage magnetic field, or a read current affected by the magnetic field from the magnetized magnetic recording medium 4 is transferred to the bit line BL and the reference potential line (ground potential). And a word line WL connected between the coil 2 and the bit line BL.
And a switching element (nMOS transistor 1) controlled by the potential.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording semiconductor memory device for recording and holding data on a magnetic recording medium built in a memory cell, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, various types of semiconductor memory devices, such as EEPROMs such as DRAMs, SRAMs, and flash memories, have been provided as randomly accessible semiconductor memory devices.

[0003]

However, these conventional semiconductor memory devices have the following disadvantages.

For example, a DRAM has a simple cell configuration of one transistor and one capacitor, and is suitable for high integration and large capacity. However, the operation speed is slow because a large capacitor capacity needs to be charged and discharged at the time of writing / erasing. . Also,
Since the held data is volatilized, it is necessary to periodically refresh the held data, so that the timing control for the refresh is complicated and the load on peripheral circuits is large.

[0005] The SRAM has a high speed because the data rewriting is based on the inversion operation of the inverter, but requires a large number of elements in the memory cell and requires a power supply for backup.

An EEPROM such as a flash memory controls a threshold voltage of a memory transistor,
The presence / absence of a cell current due to turning off is detected by a change in bit line potential. However, since the threshold voltage of a transistor easily changes due to a process factor, it is basically difficult to control the threshold voltage. Further, since the transfer of the held charge is performed by tunneling through a thin gate insulating film, the quality of the gate insulating film is deteriorated. Therefore, the charge holding characteristic is poor, and the number of times of rewriting (or the rewriting characteristic) is limited. In other words, even if it is non-volatile, it is not perfect, and there is a problem in reliability that charge is gradually discharged during use. Further, studies are being made on multi-valued EEPROMs. However, if the threshold voltage, which is originally fluctuating, is to be controlled more finely, the configuration of peripheral circuits for that purpose becomes complicated, and the number of bits becomes large. Can't lower costs.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor memory device having a novel cell configuration which solves the above-mentioned disadvantages of various semiconductor memory devices.

[0008]

A magnetic recording semiconductor memory device according to the present invention is magnetized in one memory cell by a magnetic core material having a gap in a closed magnetic path and a leakage magnetic field from the gap of the magnetic core material adjacent to the magnetic core material. A magnetic recording medium and a write current for electromagnetically coupling to the magnetic core material to generate the leakage magnetic field, or a read current affected by a magnetic field from the magnetized magnetic recording medium, and a bit line and a reference potential. And a switching element connected between the coil and the bit line and controlled by the word line potential.

The magnetic core material includes, for example, first and second magnetic films laminated via an interlayer insulating film.
One end of the second magnetic film is connected to the other end of the second magnetic film, and the terminals are close to each other via a first insulating film having a predetermined thickness that determines a gap length.

It is preferable that the magnetic recording medium approaches the end face of the other end of the first and second magnetic films via a second insulating film having a predetermined thickness. Since the film thickness controllability in the semiconductor process is extremely high, the distance between the first and second magnetic films and the magnetic recording medium can be reduced to increase the coercive force, and the uniformity within the wafer or manufacturing lot can be increased. Because you can.

In order to reduce the cell area, it is preferable to share the magnetic recording medium between two adjacent memory cells.

In writing in the magnetic recording semiconductor memory device having such a configuration, for example, after setting a predetermined positive voltage to the bit line, the word line is controlled to turn on the switching element. Then, a write current flows from the bit line side to the reference potential line through the coil, and a magnetic flux flow is generated in the magnetic core material, and the magnetic flux leaks at the gap portion to generate a leakage magnetic field. Thereby, the magnetic recording medium is magnetized and data is written. For reading, for example, the switching element is turned on in the same manner as in writing, and a read current in the same direction as the write current flows through the coil. This read current differs under the influence of a magnetic field from the magnetic recording medium at least in an initial state after switching, and causes a difference in bit line potential. Data detection is possible by differentially amplifying this potential difference, for example. For erasing, for example, by setting a predetermined negative voltage to the bit line and turning on the switching element, an erasing current flows in the direction opposite to the writing, and the magnetic recording medium is turned in the direction opposite to the writing. This is performed by magnetizing.

According to a method of manufacturing a magnetic recording semiconductor memory device of the present invention, a step of forming a switching element controlled by a word line voltage on a semiconductor substrate and a step of forming an insulating film on a surface of the semiconductor substrate on which the switching element is formed are provided. A step of forming a magnetic core material having a gap having a closed magnetic path on the insulating film; and forming a magnetic recording medium magnetized by a leakage magnetic field from the gap of the magnetic core material on the insulating film. A step of forming close to the core material, and a write current for electromagnetically coupling with the magnetic core material to generate the leakage magnetic field or a read current affected by the magnetic field from the magnetized magnetic recording medium flows Forming a coil by connecting the coil to the switching element; covering the magnetic core material, the magnetic recording medium and the coil with a buried insulating film; , And forming the bit lines and the common potential line supplying a write current or read current to the coil through the switching element.

In the step of forming the magnetic core material, preferably, a first magnetic film is formed, an interlayer insulating film is formed on the first magnetic film, and connected to the first magnetic film at one end, A second magnetic film is formed on the interlayer insulating film in close proximity via a first insulating film having a predetermined thickness that determines a gap length on the other end side. In the step of forming the magnetic recording medium, the first and second magnetic films are formed. A second insulating film is formed on both end surfaces on the other end side of the second magnetic film, and the magnetic recording medium is disposed close to the first and second magnetic films via the second insulating film. Preferably, in the step of forming the magnetic core material, the magnetic core material is formed symmetrically between the two memory cells, and in the step of forming the magnetic recording medium, two adjacent magnetic core materials are formed in the space between the two magnetic cells. A magnetic recording medium shared by one memory cell is arranged close to the magnetic core material of each memory cell via the second insulating film.

The manufacture of the magnetic recording semiconductor memory device is as follows.
It can be achieved by normal semiconductor processes and does not require special processes. For the processing of the magnetic film and the like, a technique already established in the manufacture of the magnetoresistive element and the magnetic head can be used.

[0016]

DETAILED DESCRIPTION OF THE INVENTION First Embodiment FIG. 1 illustrates a memory cell structure of a magnetic recording semiconductor memory device according to an embodiment of the present invention. The memory cell MC of this magnetic recording semiconductor memory device has a switching element (for example, an nMOS transistor) 1, a coil 2, a magnetic core material 3, and a magnetic recording medium 4.

In the nMOS transistor 1, one of a source and a drain is connected to the bit line BL, and the gate is connected to the word line WL. The magnetic core material 3 is made of a magnetic material that induces magnetism, for example, permalloy, ferrite, sendust, or a Ni—Co alloy, and has a shape that forms a closed magnetic path having a gap 3a. One end of the coil 2 is connected to the other of the source and the drain of the nMOS transistor 1, and the other end of the coil 2 is connected to a supply line for a common potential (for example, a ground potential GND). The magnetic recording medium 4 is arranged near the gap 3a of the magnetic core material 3. The magnetic recording medium 4 is made of a magnetic material, for example, permalloy, ferrite, sendust, or a Ni—Co alloy.

In the magnetic recording semiconductor memory device according to the present embodiment, a large number of memory cells MC having the above configuration are arranged in a matrix in the memory cell array, and cell selection, power supply, data input / output are performed around the memory cell array. It has a peripheral circuit for etc.

FIG. 2 shows an example of a sectional structure of the memory cell shown in FIG. For example, a gate electrode 14 made of polysilicon and also serving as a word line WL is formed on a semiconductor substrate 10 such as a p-type silicon wafer via a gate insulating film 12 made of silicon oxide. Source / drain impurity regions 16 and 18 in which n-type impurities are introduced at a high concentration are formed in the surface regions of the semiconductor substrate on both sides of the gate electrode 14. Thus, the nMOS transistor 1 is formed.

On the nMOS transistor 1, a first interlayer insulating film 20 is formed. On the first interlayer insulating film 20,
A first magnetic film 3b constituting the magnetic core material 3 is formed in a predetermined pattern. A second film of a predetermined thickness is formed on the first magnetic film 3b.
An interlayer insulating film 22 is formed. The thickness of the second interlayer insulating film 22 determines the size (gap length) of the gap 3a (FIG. 1) of the magnetic core material 3 according to the present invention.
Corresponds to.

A predetermined number of lower coil wirings 2 a forming a part of the coil 2 are arranged on the second interlayer insulating film 22 at predetermined intervals, and the periphery thereof is covered with the insulating film 32. Insulating film 3
On the second 2, a second magnetic film 3c constituting the magnetic core material 3 is formed in a predetermined pattern. One end of the second magnetic film 3c
The second interlayer insulating film 22 is opened to the outside of the insulating film 32 and is connected to the first magnetic film 3b at an opening. Further, the other end of the second magnetic film 3c extends on the second interlayer insulating film 22 where the insulating film 32 is not provided. The other end of the second magnetic film 3c is connected to the first magnetic film 3b via the second interlayer insulating film 22.
And the gap 3a of the magnetic core material 3
Are formed.

The magnetic recording layer 4 is arranged close to the other ends of the first and second magnetic films 3b and 3c via an insulating film.

On the other hand, the source of the nMOS transistor 1
First plugs 24 and 26 of the first layer are formed on the drain impurity regions 16 and 18, respectively, in the first and second interlayer insulating films 2.
0, 22 are provided. A wiring layer 28 forming one end of the lower coil wiring 2a is connected to the plug 24. A landing pad 30 is formed on the plug 26 by patterning the same layer as the lower coil wiring 2a and the wiring layer 28.

A third interlayer insulating film 34 is formed on the wiring layer 28, the landing pad 30, the second magnetic film 3c and the magnetic recording layer 4. On the third interlayer insulating film 34, a predetermined number of upper coil wirings 2b forming a part of the coil 2 are formed. The upper coil wiring 2b is appropriately connected to the lower coil wiring 2a via a vertical connecting wiring (not shown),
As a whole, a coil 2 is formed which spirally surrounds the direction of rotation of the axis of the second magnetic film 3c.

On the coil 2, a fourth interlayer insulating film 36 is formed. A second-layer plug 38 connected to the landing pad 30 is embedded in the fourth interlayer insulating film 36. A wiring layer 40 connected to the plug 38 and forming the bit line BL is wired on the fourth interlayer insulating film 36. Further, a wiring layer 42 serving as a ground line connected to the lower coil wiring 2a (or the upper coil wiring 2b) via a connection portion (not shown) is wired on the fourth interlayer insulating film 36.

Although not shown, these wiring layers 40,
Another wiring layer is formed on the substrate 42 via an interlayer insulating film as necessary, and the outermost surface is covered with an overcoat film.

Next, an example of a method of manufacturing the magnetic recording semiconductor memory device will be described. 3 to 7 show cross sections of the magnetic recording semiconductor memory device in respective manufacturing steps.

In FIG. 3, a semiconductor substrate 10 such as a p-type silicon wafer is prepared. First, a silicon oxide film to be a gate insulating film 12 is formed by, for example, thermally oxidizing the substrate surface. Next, a polysilicon film is formed by CVD while introducing a predetermined amount of an n-type impurity on the silicon oxide film. This laminated film is processed in the pattern of the word line WL to obtain a laminated film of the gate electrode 14 and the gate insulating film 12. For example, a resist pattern is formed on the semiconductor substrate 10, and the source / drain impurity region 1 is formed by ion implantation using the resist pattern and the laminated film as a mask.
6, 18 are formed. After that, the first interlayer insulating film 20 is
The film is formed by VD.

In FIG. 4, on the first interlayer insulating film 20,
For example, permalloy, ferrite, sendust or Ni
A magnetic film made of a -Co alloy or the like is formed, and is patterned to form the first magnetic film 3b. After the second interlayer insulating film 22 is formed by CVD, openings are formed at the positions on the source / drain impurity regions 16 and 18 respectively. For example, after a film of Ti / W or the like is formed, the plugs 24 and 26 embedded in the openings are formed by etching back the film. Further, an opening 22a is formed in the second interlayer insulating film 22 at a position on one end of the first magnetic film 3b.

In FIG. 5, a conductive film is formed and patterned to form a lower coil wiring 2a, a wiring layer 28 forming one end thereof, and a landing pad 30.
After the insulating layer 32 is deposited and the lower coil wiring 2a is embedded, the insulating layer 32 other than the portion where the lower coil wiring 2a is embedded is removed. This removal is performed, for example, by using the insulating layer 3
2, a resist pattern is formed, the edge thereof is rounded by heat treatment to form a forward taper, and the surrounding insulating layer 32 is etched off under the condition that the resist recedes. Thereby, the edge of the insulating layer 32 is formed in a forward tapered shape, reflecting the resist shape.

In FIG. 6, a second magnetic film 3c made of any one of the above-described magnetic metal material groups is formed and processed in a predetermined pattern. As a result, the gap 3a in which the first and second magnetic films 3b and 3c are connected at one end and the first and second magnetic films 3b and 3c are close to each other via the second interlayer insulating film 22 at the other end. Magnetic core material 3 having a closed magnetic circuit shape is formed. Subsequently, the magnetic recording layer 4 is formed by, for example, a lift-off method or an etch-back method. In the lift-off method, a resist pattern having an opening at a position where the magnetic recording layer 4 is formed is formed, and an insulating film in the opening is etched.
After the formation of the magnetic film, the portion of the magnetic film on the peripheral resist pattern excluding the portion of the magnetic film in the opening is removed together with the resist. In the etch-back method, the magnetic recording layer 4 is formed almost in the same manner as when the plug is formed. In this case, the magnetic recording layer 4 may be formed after the surface is flattened using an insulating film (not shown). .

In FIG. 7, first, the third interlayer insulating film 34
Is formed. In the case where an insulating film for planarization is used in the step of forming the magnetic recording layer 4 in FIG. 6, first, the planarized insulating film is etched back to locate the second magnetic film 3c.
The third interlayer insulating film 34 is preferably formed. This is because the thickness of the third interlayer insulating film 34 determines the distance between the second magnetic film 3c and the coil. Next, after forming a vertical connection portion of the coil, a conductive film is formed on the third interlayer insulating film 34,
This is patterned into a predetermined shape to form an upper coil wiring 2
b is formed. Thereby, the coil 2 is completed. A relatively thick fourth interlayer insulating film 36 is formed on the coil 2, and after flattening, an opening is formed on the landing pad 30 in the fourth and third interlayer insulating films. After the opening is filled with, for example, a Ti / W film, the entire surface is etched back to form a second-layer plug 38.

As shown in FIG. 2, a wiring layer 40 forming a bit line BL and a wiring layer 42 forming a ground line are formed simultaneously.
At this time, the wiring layer 40 is connected to the plug 38, and the wiring layer 42 is connected to the other end of the coil 2. Thereafter, if necessary, an upper wiring layer is formed via an interlayer insulating film, and then the magnetic recording semiconductor memory device is completed through formation of an overcoat film, pad opening, and the like.

Next, the operation of the memory cell MC will be described.

At the time of writing, first, data "1"
A high-level predetermined voltage, for example, a power supply voltage V _DD : 5 V, is set to the bit line BL connected to the memory cell to which data is to be written, and the bit line BL connected to the memory cell to which data “0” is to be written is set to the reference potential For example, it is set to the ground potential GND. Next, the word line WL connected to the selected memory cell is activated, and the switching transistors 1 connected to the word line WL are all set to be in an ON state.

As a result, in the selected cell in which the bit line is set to a predetermined high-level voltage, the transistor 1 is turned on, and a cell current i flows from the selected bit line BL to the ground line through the coil 2 and the coil 2 Generates magnetic flux. The magnetic flux generated by the coil 2 is guided by the magnetic core material 3 and leaks outside at the gap 3a, thereby generating a leak magnetic field. Due to this leakage magnetic field, the surface of the magnetic recording medium (magnetic recording layer) 4 is magnetized with a polarity corresponding to the direction of the magnetic field, and data “1” is recorded. On the other hand, in a non-selected cell in which the bit line remains at the low level, no cell current flows because the transistor 1 does not turn on or there is no potential difference even when the transistor 1 turns on. Therefore, the above-described magnetic field is not generated, and the magnetic recording is not performed with the magnetization state having the opposite polarity to that when the data “1” is written. This magnetized state is called an erased state or a written state of data “0”.

Although erasing can be performed in bit units, it is usually performed collectively in, for example, sector units for each word line WL or in the entire memory cell array. Specifically, all of the bit lines BL to a predetermined negative voltage cell to be erased is connected, and set to, for example, -V _DD, to activate all of the word lines WL cell to be erased is connected. As a result, a cell current i ′ flows in each cell in the direction opposite to that in the above-described writing, and a magnetic flux and a leakage magnetic field in the direction opposite to that in the writing are generated. Therefore, the magnetic recording medium 4
Are magnetized in the opposite polarity to the case of data "1", and erase is performed.

At the time of reading, the selected bit line BL
After setting a predetermined precharge voltage, for example, a power supply voltage _VDD , the selected word line WL is activated. In this case, the cell current i flows through both the cell in which the data “1” is written and the cell in which the data “0” is written (in the erased state). However, the logical value of the data (“0” or “1”)
Accordingly, the recording magnetic field from the magnetic recording medium 4 is guided to the magnetic core material 3 and acts on the coil 2. Therefore, there is a difference in the change in the bit line potential at least in the initial state after the transistor 1 is turned on. For example, similarly to a known semiconductor memory device, data can be detected by differentially amplifying the difference between the potential changes with a sense amplifier using an intermediate potential as a reference potential.

As described above, in the magnetic recording semiconductor memory device according to the first embodiment, the magnetic recording medium (magnetic recording layer) 4
In contrast, the memory cell data is magnetically recorded and held or erased based on the cell current. Further, the recording data is read by a cell current change (bit line potential change) based on a magnetic field from the magnetic recording medium.

During these operations, the cell current only flows through the transistor 1 and the coil 2, and there is no need to charge / discharge a capacitor having a large capacitance such as a DRAM. As a result, the operation speed is extremely high. Further, since the magnetic recording medium 4 is used, the retained data is non-volatile, does not require a refresh operation unlike DRAM, and the peripheral circuit is simple. Further, the magnetic recording semiconductor memory device according to the first embodiment has a smaller number of elements than an SRAM, and does not require a power supply voltage for backup. Furthermore, the first
The magnetic recording semiconductor memory device according to the embodiment has an EEPR
As in the case of the OM, fine control of the threshold voltage is not required and the device is easy to produce. Therefore, there is almost no malfunction, and the device has excellent data retention characteristics and rewrite characteristics (endurance characteristics). The magnetic recording semiconductor memory device according to the first embodiment can perform random access, and can perform writing, erasing, and reading in cell units or sector units. In particular, in erasing, batch erasing of the memory cell array is possible.

The manufacture of the magnetic recording semiconductor memory device according to the first embodiment can be achieved by a normal semiconductor process, and does not require a special process. For the processing of the magnetic film and the like, a technique already established in the manufacture of the magnetoresistive element and the magnetic head can be used.

Second Embodiment The second embodiment is an example in which the magnetic recording layer is shared between adjacent cells. FIG. 8 is an enlarged view of the magnetic recording layer and its peripheral portion of the magnetic recording semiconductor memory device according to the second embodiment.

In this magnetic recording semiconductor memory device, the two magnetic core members 3 of the memory cells MC1 and MC2 are symmetrically arranged with the magnetic recording layer 4 'interposed therebetween, and the magnetic recording layer 4' is shared between the cells. . At this time, another insulating film 44 is newly interposed between the ends of the first magnetic film 3b and the second magnetic film 3c constituting the magnetic core material 3 and the magnetic recording layer 4 '. An insulating film 44 for determining the distance between the magnetic core material 3 and the magnetic recording layer 4 '
Corresponds to the “second insulating film” of the present invention.

9 to 12 are cross-sectional views of the magnetic core material 3 and the magnetic recording layer 4 'in respective manufacturing steps. First,
A first magnetic film 3b, a second interlayer insulating film 22, and a second magnetic film 3c are laminated on the first interlayer insulating film 20 on the semiconductor substrate 10 by the same method as in the first embodiment (FIG. 9). This is collectively patterned (FIG. 10).
Next, an insulating film 44 for determining the distance between the magnetic core material 3 and the magnetic recording layer 4 'is formed on the entire surface by CVD, and the magnetic recording layer 4' is formed.
A magnetic film is deposited to fill the space between the two magnetic core members 3 (FIG. 11). Further, the magnetic recording layer 4 'is formed by etching back the laminated film (FIG. 12). If there is a concern that the magnetic film remains in other parts during this etch-back, as in the first embodiment, that part is
Before patterning, flatten it with another insulating film,
This insulating film is also preferably patterned at a time in FIG. The other configuration including the portion not shown in the drawings and the method of forming the same are the same as in the first embodiment.

FIG. 13 shows that data is written in the memory cell MC1.
The flow of magnetic flux when erasing is performed in the memory cell MC2 is schematically shown. As shown, the portion magnetized by the leakage magnetic flux is the surface portion of the magnetic recording layer 4 '. Therefore,
By setting the width W of the magnetic recording layer 4 'to a size such that the respective magnetized regions are not mutually affected by the magnetic field from the magnetic core material 3 of the adjacent cell, the inter-cell sharing of the magnetic recording layer 4' is achieved. Becomes possible.

In the magnetic recording semiconductor memory device according to the second embodiment, in addition to various advantages similar to the first embodiment, the cell area can be reduced by sharing the magnetic recording layer 4 ′ between two adjacent cells. It becomes possible. Further, since the film thickness controllability of the film (the insulating film 44 in FIG. 8) in the semiconductor process is extremely high, the distance between the magnetic core material 3 and the magnetic recording layer 4 'is reduced to reduce the coercive force of the magnetic recording layer 4'. It can be made sufficiently large, and can be made uniform within a wafer or between production lots. As a result, malfunction can be prevented, and magnetic recording can be performed with a slight leakage magnetic field, and the width W of the magnetic recording layer 4 'can be reduced accordingly.

In implementing the present invention, the first
The present invention is not limited to the second embodiment, and other embodiments and various modifications are possible. For example, the magnetic core material 3 and the coil 2 may be stacked on the upper layer of the transistor 1 and integrated three-dimensionally. As a result, the cell area can be significantly reduced, and a cell area comparable to that of a DRAM can be realized. In this three-dimensional arrangement, the coil 2 is disposed between the transistor 1 and the wiring layer 42 supplying the ground potential.
Are arranged, the coil length is shortened, the wiring resistance is reduced, and higher speed and lower power consumption can be achieved. In the first and second embodiments, binary recording is premised. However, the magnetic recording semiconductor memory device of the present invention can realize a multi-bit memory of 2 bits or more. At this time, multi-value data can be recorded simply by finely changing the potential of the bit line BL. Therefore, a circuit for verify reading and complicated control like multi-valued EEPROM are not required, and the Does not increase the burden.

[0048]

In the magnetic recording semiconductor memory device of the present invention, the cell current only flows through the transistor and the coil during the writing and reading operations of the memory cell (magnetic recording memory cell), and has a large capacitance value as in a DRAM. It is fast because there is no need to charge / discharge the capacitor. In the magnetic recording memory cell, since the magnetic recording medium is used, the retained data is non-volatile, and does not require a refresh operation unlike DRAM. Further, the magnetic recording memory cell has a smaller number of elements than the SRAM cell, and does not need to back up the power supply voltage. Further, during the operation of the magnetic recording memory cell, fine control of the threshold voltage of the transistor is not required unlike the EEPROM, and the data does not gradually evaporate due to element deterioration.

The manufacture of the magnetic recording semiconductor memory device of the present invention can be easily achieved by applying a well-established technique such as processing of a magnetic film to an ordinary semiconductor process. By actively applying the high film thickness controllability of the semiconductor process, the gap length of the magnetic core material or the space between the magnetic core material and the magnetic recording medium can be miniaturized and made uniform, and a high-performance magnetic recording memory can be manufactured. Is possible.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a memory cell configuration of a magnetic recording semiconductor memory device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a specific structure of the memory cell of FIG. 1;

FIG. 3 is a cross-sectional view after the formation of a first interlayer insulating film in the manufacture of the memory cell of FIG. 2;

FIG. 4 is a cross-sectional view after forming a first-layer plug, following FIG. 3;

FIG. 5 is a cross-sectional view after forming an insulating film pattern covering a lower coil wiring, following FIG. 4;

FIG. 6 is a cross-sectional view after formation of the magnetic recording layer, following FIG. 5;

FIG. 7 is a cross-sectional view after formation of a second-layer plug, following FIG. 6;

FIG. 8 is an enlarged sectional view showing a magnetic recording layer and a peripheral portion thereof in a magnetic recording semiconductor memory device according to a second embodiment of the present invention.

FIG. 9 is a cross-sectional view after the formation of a second magnetic film in the manufacture of the magnetic recording layer portion of FIG. 8;

FIG. 10 is a cross-sectional view after patterning of the laminated film of the first and second magnetic films and the second interlayer insulating film, following FIG. 9;

11 is a cross-sectional view after the formation of a magnetic film to be a magnetic recording layer, following FIG. 10;

FIG. 12 is a cross-sectional view after forming the magnetic recording layer (etch back), following FIG. 11;

FIG. 13 is a diagram schematically showing the flow of magnetic flux when writing and erasing are performed in two adjacent memory cells.

[Explanation of symbols]

1 ... nMOS transistor (switching element), 2 ...
Coil, 2a: lower coil wiring, 2b: upper coil wiring, 3: magnetic core material, 3a: gap, 3b: first magnetic film,
3c: second magnetic film, 4, 4 ': magnetic recording layer, 10: semiconductor substrate, 12: gate insulating film, 14: gate electrode (word line), 16, 18: source / drain impurity region, 2
0: first interlayer insulating film, 22: second interlayer insulating film (first insulating film), 22a: opening, 24, 26, 38: plug, 2
Reference numeral 8: a wiring layer forming a coil end; 30, a landing pad; 32, an insulating layer; 34, a third interlayer insulating film;
Interlayer insulating film, 40: wiring layer forming bit line, 42: wiring layer forming ground line, 44: insulating film (second insulating film), MC,
MC1, MC2 ... memory cells, BL ... bit lines, WL ...
Word line, _VDD : power supply voltage, GND: ground potential, W: width of magnetic recording layer.

Claims (7)

[Claims] In one memory cell, a magnetic core material having a gap in a closed magnetic path, a magnetic recording medium magnetized by a leakage magnetic field from a gap between the magnetic core materials adjacent to each other, and electromagnetically coupled to the magnetic core material, A coil for causing a write current for generating the leakage magnetic field or a read current affected by a magnetic field from the magnetized magnetic recording medium to flow between a bit line and a reference potential line; and the coil and the bit line And a switching element controlled by a word line potential. 2. The magnetic core material includes first and second magnetic films stacked with an interlayer insulating film interposed therebetween, wherein the first and second magnetic films are connected at one end,
2. The magnetic recording semiconductor memory device according to claim 1, wherein the terminals are close to each other via a first insulating film having a predetermined thickness that determines a gap length. 3. The magnetic recording medium according to claim 2, wherein the magnetic recording medium is in proximity to an end face of the other end of the first and second magnetic films via a second insulating film having a predetermined thickness. Magnetic recording semiconductor memory device. 4. The magnetic recording semiconductor memory device according to claim 1, wherein said magnetic recording medium is shared between two adjacent memory cells. 5. A step of forming a switching element controlled by a word line voltage on a semiconductor substrate; a step of forming an insulating film on a surface of the semiconductor substrate on which the switching element is formed; Forming a magnetic core material having the magnetic core material on the insulating film; and forming a magnetic recording medium magnetized by a leakage magnetic field from a gap of the magnetic core material on the insulating film in proximity to the magnetic core material; A coil in which a write current for generating the leakage magnetic field or a read current affected by a magnetic field from the magnetized magnetic recording medium flows, which is electromagnetically coupled with a magnetic core material, is formed by connecting to the switching element. Covering the magnetic core material, the magnetic recording medium and the coil with a buried insulating film; and forming the coil on the buried insulating film via the switching element. Method of manufacturing a magnetic recording semiconductor memory device comprising forming a bit line and a common potential line supplying a write current or read current. 6. In the step of forming a magnetic core material, a first magnetic film is formed, an interlayer insulating film is formed on the first magnetic film, connected to the first magnetic film at one end, and connected to the other end. Forming a second magnetic film on the interlayer insulating film in close proximity via a first insulating film having a predetermined thickness which determines a gap length on the side; and forming the first and second magnetic recording media in the magnetic recording medium forming step.
A second insulating film is formed on both end surfaces on the other end side of the magnetic film, and the magnetic recording medium is connected to the first insulating film via the second insulating film.
6. The method for manufacturing a magnetic recording semiconductor memory device according to claim 5, wherein said magnetic recording semiconductor memory device is disposed in proximity to said second magnetic film. 7. In the step of forming the magnetic core material, the magnetic core material is formed symmetrically between the two memory cells. In the step of forming the magnetic recording medium, two memory cells adjacent to the space between the two magnetic core materials are provided. 7. The method of manufacturing a magnetic recording semiconductor memory device according to claim 6, wherein a magnetic recording medium shared between the cells is arranged close to each magnetic core material of each memory cell via the second insulating film.