JP2000181784A - Rewritable nonvolatile storage device - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To simplify the rewriting operation of frequently rewritten data of a specific size and to prevent the life of a flash memory chip from being shortened. When a write data size specified by a host processing device is equal to one sector size,
The write data is stored in the flash memory chip 13 having a memory block size of one sector. When the write data size specified by the host processing device 21 is
If the size is other than 1 sector size, the write data is stored in the flash memory chip 14 having a memory block size of 4 sectors.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a storage device using a rewritable nonvolatile storage medium, and more particularly to a storage device using a nonvolatile semiconductor memory having an upper limit on the number of rewrites.

[0002]

2. Description of the Related Art In recent years, a storage device using a nonvolatile semiconductor memory has been used as a data storage device of a digital still camera or as an external storage device of a portable information device such as a handheld PC. A typical example is a flash memory card. A flash memory card is a card-shaped small storage device equipped with a flash memory as a storage medium, and is generally a PC card size or smaller.

The flash memory used as a storage medium is a rewritable non-volatile semiconductor memory without losing data even when the operation power is turned off. The flash memory has the following features: (a) on-board rewriting is possible because of electrical erasing and writing; and (b) the cell area is small and suitable for large capacity.
However, on the other hand, the characteristics of the memory cell are degraded due to repetition of erasing / writing, so that there is an upper limit on the number of erasing / writing. An example of a storage device using such a flash memory is described in, for example, JP-A-6-4399.

[0004] In the flash memory, due to the characteristics of the flash memory cell, it is usually not possible to overwrite data that has already been written with new data as a data rewriting operation. Therefore, a predetermined size (for example, 5
It is necessary to write new data after erasing old data once in units of memory blocks (12 bytes). Here, a memory block is a minimum unit in which data is collectively erased in a nonvolatile semiconductor memory chip.
It has a different size depending on the flash memory cell system such as NAND type or NOR type.

Further, in the conventional flash memory cell, if the threshold voltage, which indicates the operating point, is in a high region, it is set to "0", and if it is in a low region, it is set to "1". Bits were stored.
On the other hand, in recent years, a multivalued technology, that is, a technology of storing multiple bits in one transistor cell by precisely controlling the amount of charge injected into the floating gate and subdividing the threshold voltage region has been developed. Was done. This multi-level technology has made it possible to realize a flash memory having a large capacity and various memory block sizes.

[0006] Some conventional flash memories include:
In some cases, the size of a memory block is matched with a sector (512 bytes), which is a general data management unit of a hard disk device. However, even in such flash memories, those in which the capacity of a memory block is increased have recently been developed. For example, a flash memory having a memory block size of 2 Kbytes (four sector size) has been developed.

[0007] A flash memory card using a flash memory as described above has a lower unit cost per bit and an upper limit number of times of data rewriting as compared with a hard disk which is a typical external storage device of a personal computer (hereinafter referred to as PC). Inferior. On the other hand, flash memory cards are (a) small and lightweight, easy to carry,
(B) strong against shock and vibration because there is no mechanical drive part, (c) low power consumption, convenient for use in batteries,
It is suitable for an external storage device such as a portable information device.

When a flash memory card is used as an external storage device of a PC, a file stored in the flash memory is often managed by a FAT (File Allocation Table) file system widely used in an operating system of the PC. .

FIG. 13 is a diagram showing a logical memory map in the FAT file system. As shown in the figure, the memory map includes a boot sector, a FAT area 1,
It is divided into a root directory area 2 and a normal data area 3.

[0010] The FAT area 1 stores data indicating the connection of clusters constituting a file. The cluster is a unit for allocating a file to a storage device such as a disk, and is composed of a plurality of (for example, four) sectors.

The root directory area 2 stores file information of files in the root directory. The normal data area 3 stores normal data constituting a file.

The data in the FAT area 1 and the root directory area 2 are frequently rewritten with one sector size (512 bytes), and the data in the normal data area 3 are rewritten in cluster units.

[0013]

In the case of a flash memory in which the size of a memory block corresponds to a plurality of sectors,
For efficient storage, a plurality of sectors are allocated to one memory block. In this case, if the file stored in the external storage device is managed by the FAT file system, one-sector data is frequently rewritten to the memory block storing the data such as the FAT area. ,as a result,
The life of the flash memory chip may be shortened more than necessary.

For example, consider a case where four sector data are stored in one memory block. In this case, when rewriting of one of the four sectors occurs, the writing process is performed after the entire memory block is once erased. That is, the number of erasures of the memory block can be increased four times as compared with the case where one sector is allocated to one memory block. As a result, there is a possibility that the deterioration of some of the memory blocks storing data such as the FAT area which is frequently rewritten in one sector size is extremely advanced, and the life of the entire flash memory chip is shortened more than necessary.

Further, when a plurality of sectors are allocated to a memory block serving as an erasing unit, processing for rewriting one sector data in a memory block storing a plurality of sector data is complicated. Become.
That is, when another sector data is written in the same memory block, first, all data in the memory block is saved to a buffer memory or the like,
In the buffer memory, one sector data to be rewritten is replaced with new one sector data. Then, the memory block including the sector to be rewritten is erased, and thereafter, the data in the buffer memory is transferred to the memory block for writing. As mentioned above,
Rewriting of one sector data in a memory block storing a plurality of sector data requires complicated processing to prevent loss of other sector data.

On the other hand, the size of the data management unit in the host processing device that reads / writes from / to the external storage device is:
If the size is larger than the size of the memory block, the data management unit is stored using a plurality of memory blocks. When the host processing device writes data to such a storage device in data management units, the storage device performs erasure processing for the number of memory blocks necessary to store the data of the data management unit. There must be. The time required for erasing one memory block is almost constant regardless of its size, so that the erasing time becomes longer in proportion to the number of memory blocks to be erased. That is, in a host processing device that frequently rewrites data in a data management unit larger than the memory block, the rewrite speed is reduced in proportion to the number of memory blocks required to store the data management unit.

It is an object of the present invention to prevent the life of the entire flash memory chip from being shortened due to deterioration of a specific memory block when data of a specific size is frequently rewritten. It is another object of the present invention to speed up the operation of rewriting data of a specific size in which rewriting frequently occurs.

[0018]

A storage device according to the present invention is a storage device for storing data written from a host processing device. A first data storage block having a first size and rewritable with the size; a second data storage block having a second size and rewritable with the size; Control means for storing the write data in one of the first and second data storage blocks according to the size of the write data to be instructed is provided.

In this case, the control means stores the data instructed to be written in the first size in the first data storage block, and stores the data in the second data storage block in the second data storage block. Data for which writing has been instructed may be stored in a size other than the size of 1.

Further, the second storage device according to the present invention comprises a first storage device which can be rewritten in units of blocks having a first size.
And a second storage unit that can be rewritten in block units having a second size, and when the size of the write data specified by the host processing device is the first size, The data is stored in the first storage unit, and if the size of the write data specified by the host processing device is other than the first size, the data is stored in the second storage unit. It is characterized by the following.

In the above case, the second size may be twice or more the first size. In this case, the second data storage block or the like having the second size can store a plurality of data having the first size. However, in the present invention,
Since the data instructed to be written in the first size is stored in a first data storage block or the like having the first size, the first data is frequently written in the first data storage block or the like. An increase in the number of times of rewriting of the second data storage block or the like can be suppressed as compared with a case where a plurality of data having a size are stored in the second data storage block or the like.

The first size may be at least twice as large as the second size. In this case, the data having the first size can be stored using a plurality of data storage blocks having the second size. However, in the present invention, since the data instructed to be written in the first size is stored in the first data storage block or the like having the first size, the data having the first size is stored in a plurality of first data storage blocks. The number of blocks to be rewritten can be reduced as compared with the case where data is stored using the second data storage block.

An information processing apparatus according to the present invention is provided with the storage device described above. The information processing apparatus includes, for example, a normal PC or a workstation (W
S) and the like.

The host processing apparatus according to the present invention comprises a first storage means which can be rewritten in block units having a first size and a second storage means which can be rewritten in block units having a second size. This is a host processing device that writes data to a storage device provided. For example, a normal PC, WS, digital still camera, or the like corresponds to the host processing device. The storage device corresponds to, for example, a small flash memory card.

If the size of the write data is the first size, the data is stored in the first storage means, and the size of the write data is other than the first size. In this case, the data is
Is stored in the storage means.

In this case, the host processing device may perform the data writing at the first size more frequently than the data writing at a size other than the first size.

A data storage method according to the present invention is a method for storing data transferred from a host processing device in a storage medium. Then, the size of the write data instructed by the host processing device is determined, and the data instructed to be written in the first size is stored in a first data storage block having a first size, and the first size is stored in the first data storage block. Data that is instructed to be written in a size other than the above is stored in a second data storage block having a second size.

In the above case, the size of the write data may be determined based on the instruction code transferred from the host processor.

The first and second data storage blocks may be provided in separate nonvolatile semiconductor memories, or may be provided in a single nonvolatile semiconductor memory.

[0030]

Embodiments of the present invention will be described below in detail with reference to the drawings.

First, a description will be given of a flash memory card in which data of one sector size transferred from the host processor is stored in a memory block of one sector size, and other than that, the data is stored in a memory block of four sector sizes.

FIG. 1 is a diagram showing the configuration of a flash memory card 11 which is a storage device according to the present invention and a host processing device 21 which reads and writes data from and to the storage device.

The host processing unit 21 is connected to the flash memory card 11 and
Read and write data to Host processing unit 21
Is a computer system such as a notebook PC or a desktop PC equipped with a slot for storing a PC card.

The flash memory card 11 is an ATA card of a PC card size used as an external storage device of the host processor 21. The flash memory card 11 supports an ATA (AT Attachment) interface, and data is read and written in sector units.

As shown in FIG. 1, the flash memory card 11 includes flash memory chips 13 and 14, a controller 17, a microprocessor 18, and a buffer memory 19.

The flash memory chip 13 has a memory block size of 1 sector and a total number of sectors of 16384 (=
4000h) A semiconductor memory chip having a sector and a data capacity of 64 Mbits. Note that h after the number is 1
Indicates a hexadecimal number.

The flash memory chip 14 has a memory block size of 4 sectors and a total number of sectors of 6553.
The semiconductor memory chip has 6 (= 10000h) sectors and a data capacity of 256 Mbits.

The controller 17 includes a host processor 21
Interface control with the flash memory chip and the like. The controller 17 supports an ATA interface as a host interface, and (a) an instruction code transferred from the host processing device 21, (b) an access start logical sector address, (c) the number of sectors to be transferred, and the like. Register group for storing the information of

The microprocessor 18 mainly comprises (a)
Reading data from the flash memory chip 13 or 14 to the host processing device 21; (b) erasing the flash memory chip 13 or 14 in memory block units; and (c) reading data from the host processing device 21 to the flash memory chip 13 or 14. Data writing is controlled.

The buffer memory 19 is used to temporarily hold data in operations such as reading data, erasing a memory block, and writing data. An appropriate size of the buffer memory 19 is selected depending on mounting conditions and the like. Here, a 4-sector size (2K) equal to the maximum memory block size of the flash memory chip provided in the flash memory card 11 is used.
B).

FIG. 2 is a diagram showing a physical address map in the flash memory card 11.

Flash memory chips 13 and 14
Has a data area (512 bytes) for storing sector data and a management area (16 bytes) for storing management information of the data area for each sector. For example, the flash memory chip 13 has a 2 Mbit management area corresponding to a 64 Mbit data area.

As shown in FIG. 2, physical sector addresses 000000h to 03FFF of the flash memory card 11
h, a flash memory chip 13 is allocated, and physical sector addresses 04000h to 13FFFFh
Is assigned a flash memory chip 14.

Since the memory block size of the flash memory chip 13 is one sector and the memory block size of the flash memory chip 14 is four sectors, the physical address to which the flash memory chip 13 is assigned will be described below. The area is called one sector area, and the physical address area to which the flash memory chip 14 is assigned is called four sector area.

The physical sector address 00000h to
81440 (= 13E20h) sectors of 13E1Fh are used as user data areas, and include normal data,
For example, data of each area in FIG. 13 is stored. Also,
48 of physical sector addresses 13E20h to 13FFFh
Zero sectors are used as an address translation table,
Address conversion information between a logical sector address and a physical sector address is stored.

FIG. 3 is a diagram showing a configuration example of a management area of a flash memory chip. As shown in the figure, the management area includes (a) the logical sector address 401 of the sector data stored in the corresponding data area, and (b) the number of physical erasures 4 of the memory block including the sector data.
02, (c) ECC (Error CorrectingCo
de) 403 and (d) a flag 404 indicating the erase / write state of the sector.

The flag 404 indicating the erase / write state of the sector is, for example, when "1", the corresponding sector is in the erase state, and when "0", valid data is written in the corresponding sector. Is a flag indicating that the By referring to the flag 404, it is possible to determine whether valid data is written in the corresponding sector.

FIG. 4 is a diagram showing a configuration example of an address conversion table for storing address conversion information between a logical address and a physical address of a sector in the flash memory card 11. As shown in the figure, the address conversion table records a physical sector address (3 bytes) corresponding to each logical sector address for all logical sectors. For example, a physical address corresponding to a logical address of logical addresses 0000h to 000A9h is stored in a physical sector with a physical address of 13FFFFh. When the use of the flash memory card 11 is started, the address conversion table is initialized so that, for example, the logical address and the physical address are equal.

Next, the basic operation of the flash memory card 11 will be described.

When the data reading is instructed from the host processor 21, the flash memory card 11 obtains the physical address of the logical sector designated for read access by referring to the address conversion table, and uses the obtained physical address. The necessary sector data is read from the flash memory chips 13 and 14 and passed to the host processor 21.

When the host processor 21 instructs the flash memory card 11 to write data of one sector size, the logical sector designated for write access is stored in one sector area (that is, the flash memory chip 13). If it is, the same physical sector is rewritten as it is. On the other hand, when the logical sector for which the write access is specified is stored in the 4-sector area (that is, the flash memory 14), the storage destination is changed to an unused (erased) memory block of the 1-sector area.

When data writing of a plurality of sector sizes is instructed, if there is a logical sector stored in a memory block of one sector area among the logical sectors designated for write access, the logical sector Is changed to the memory block of the 4-sector area. The above operation is performed by a program in the microprocessor 18.

As described above, data for which writing is instructed in one sector size is stored in a memory block of one sector area, and the other data is stored in a memory block of four sector areas. Therefore, sector data such as the FAT area, which is frequently rewritten, is stored in one sector area even if it is mapped to four sector areas at the time of initialization.

Hereinafter, processing in the flash memory card 11 when the host processor 21 writes data to the flash memory card 11 will be described in detail.

FIGS. 5 to 7 are diagrams showing the flow of processing in the flash memory card 11 when data is written from the host processing device 21.

The host processor 21 is the flash memory 1
1 when writing data to the host processor 21
Sets (a) a write instruction code, (b) a logical sector address to start a write access, and (c) the number of data sectors to be written in a register group in the controller 17 (S601).

Then, the microprocessor 18 first determines whether or not the set number of write sectors is equal to 1 (S602). Then, the contents of subsequent processing are changed depending on whether or not the number of write sectors is one.

First, the case where the number of write sectors is 1 will be described. FIG. 6 is a diagram showing a flow of processing in the flash memory card 11 when the number of write sectors is one.

First, the microprocessor 18 refers to the address conversion table in the flash memory chip 14 to acquire the physical sector address where the logical sector designated for the write access is stored (S701).

Then, the microprocessor 18 determines whether the obtained physical sector address is a physical sector address of one sector area or a physical sector address of four sector area (S702). The determination as to whether the area is in the one-sector area or the four-sector area is performed, for example, by comparing the boundary address (04000h) of both areas with the acquired physical sector address.

As a result of the determination, when the physical sector address to be rewritten is in one sector area (S702: Ye
s) The microprocessor 18 erases the memory block corresponding to the physical sector address. At the same time, the host processor 21 transfers the write data for one sector to the buffer memory 19 (S70).
3).

Then, the microprocessor 18 transfers the write data for one sector from the buffer memory 19 to the erased memory block, and performs writing (S7).
04), the write process ends.

On the other hand, if the physical sector address obtained in step S701 is in the 4-sector area (S70
2: No) First, the write access target sector is set to an erased state, that is, an unused state (S705). For erasing the write access target sector, for example, all data in the memory block including the write target sector is evacuated to the buffer memory 19 and the memory block is erased. This is done by transferring and writing to a memory block.

Before the data in the memory block is saved in the buffer memory 19, it is determined whether or not logical sector data not to be subjected to write access is written in the same memory block. If the logical sector data to be accessed is not written, the memory block may be immediately erased without saving to the buffer memory 19.

Next, the microprocessor 18 searches for an erased physical sector by referring to the flag 404 of the management area of the physical sector in one sector area (S70).
6). In parallel with this, write data for one sector transferred from the host processor 21 is stored in the buffer memory 1.
9 is stored.

Then, the microprocessor 18 determines whether or not the erased physical sector has been retrieved from the one sector area (S707). If the erased physical sector has been retrieved (S707: Yes), the microprocessor 18 determines 1 to physical sector
The write data for the sector is transferred from the buffer memory 19 and writing is performed (S708).

Then, the microprocessor 18 updates the address conversion table so as to allocate the searched physical sector address to the current logical sector to be write-accessed (S709). In this case, the logical sector assigned to the searched physical sector in the erased state is assigned the physical sector assigned to the current logical access target logical sector. That is, the physical sector to be assigned is exchanged between the erased (unused) logical sector and the write-access target logical sector.

On the other hand, if the physical sector in the erased state cannot be retrieved from the one sector area (S707: No), 1
Since there is no unused physical sector to be replaced in the sector area, the microprocessor 18 transfers the write data of one sector to the physical sector of the original four-sector area and performs writing (S710). ).

As described above, the data write operation when the number of write sectors is 1 is performed. Next, a data write operation when the number of write sectors is two or more will be described.

FIG. 7 is a diagram showing the flow of processing in the flash memory card 11 when the number of write sectors is two or more.

First, the microprocessor 18 refers to the address conversion table in the flash memory chip 14 and obtains a physical sector address storing each logical sector designated for write access (S801).

Next, the microprocessor 18 determines whether or not one of the acquired physical sector addresses is within one sector area (S802).

As a result of the determination, when all the physical sector addresses to be rewritten are in the 4-sector area (S80)
2: No), the microprocessor 18 proceeds to step S7.
All the physical sectors designated for write access are erased in the same manner as in the case of S05 (S803). In parallel,
Data of four sectors out of the write data transferred from the host processor 21 is stored in the buffer memory 19. When the number of write sectors is 2 or 3, 2
Write data for one sector or three sectors is stored in the buffer memory 19.

Next, the microprocessor 18 transfers the write data from the buffer memory 19 to the erased physical sector and performs writing (S804). If there is remaining write data, the host processor 2
1 is transferred to the buffer memory 19. Then, this process is repeated by the number of write sectors specified by the host processing device, and the data write process ends.

On the other hand, if the result of determination in step S802 is that the physical sector address to be rewritten includes the physical address of one sector area (S802: Ye
s), the microprocessor 18 firstly proceeds to step S7
As in the case of S05, all physical sectors designated for write access are erased (S805). In parallel with this, data of four sectors out of the write data transferred from the host processor 21 is stored in the buffer memory 19. When the number of write sectors is 2 or 3, write data for 2 or 3 sectors is stored in the buffer memory 19, respectively.

In the following, for the sake of simplicity, a case will be described in which the physical sector addresses to be rewritten are all in one sector area.

Next, the microprocessor 18 searches the erased physical sectors for the number of write sectors by referring to the management area of the physical sector in the four sector area (S80).
6) It is determined whether or not the erased physical sectors for the number of write sectors have been searched (S807).

As a result of the determination, when the erased physical sectors for the number of write transfer sectors can be searched (S807: Ye)
s), the microprocessor 18 has a buffer memory 19
Then, the write data is transferred to the physical sector searched for and written (S808). If there is untransferred write data, the write data transferred from the host processor 21 is stored in the buffer memory 19 in parallel with the write data. This process is repeated for the number of write sectors specified by the host processing device.

Finally, the microprocessor 18
Performs necessary updating of the address conversion table in accordance with the exchange of the physical sector address (S809), and ends the data write operation.

On the other hand, when the erased physical sectors for the write transfer sectors cannot be searched (S807: N
o) The microprocessor 18 determines from the buffer memory 19 that the storage destination of the write access logical sector data in the memory block in the one sector area cannot be changed to the physical sector in the four sector area. Then, the write data is transferred to the physical sector for writing (S810). If there is any remaining write data, the write data transferred from the host processing device 21 is stored in the buffer memory 19 in parallel. Then, this process is repeated by the number of write sectors specified by the host processing device, and the data write operation ends.

In the above, for the sake of simplicity, a case has been described where all the physical sector addresses to be rewritten are in one sector area. However, the physical sector addresses to be rewritten are one sector area and four sector areas. If there is a mixture, the same processing as described above is performed for the one sector area, and for the one already in the four sector area, writing is directly performed on the original physical sector.

According to the present embodiment, the data in the FAT area 1 and the root directory area 2 which can be rewritten in one sector size are stored in the one sector size memory block even if they are initially allocated to the four sector size memory block. Will be done. Therefore, it is possible to prevent the number of erasures of the memory block from being accumulated due to rewriting of other sector data, and to prolong the life of the flash memory chip. Further, it is not necessary to save other sector data in the rewriting process of data such as the FAT area which is frequently rewritten with one sector size.

In the flash memory card described above, the flash memory chip 13 having a memory block size of 1 sector and the flash memory chip 14 having a memory block size of 4 sectors are used.
However, in the FAT file system, unless a partition is created (that is, when the whole is used as one partition), the number of sectors used for the FAT area 1 and the root directory area 2 is limited.
The required memory block of one sector size is also limited.

Therefore, instead of the flash memory chip 13 composed of memory blocks of one sector size, a flash memory chip in which memory blocks of one sector size and four sector sizes are mixed is used. The flash memory card will be described.

FIG. 8 is a diagram showing the internal configuration of the second flash memory card 11b according to the present invention. As shown in the figure, the difference from the flash memory card 11 shown in FIG. 1 is that a flash memory chip 15 is provided instead of the flash memory chip 13.

The flash memory chip 15 is a semiconductor memory chip in which a memory block of one sector size and a memory block of four sector sizes are mixed. The flash memory chip 15 has a sufficient number of memory blocks of one sector size to store data in the FAT area 1 and the root directory area 2.

The process of storing data instructed to be written in one sector size in a memory block of one sector size and selectively storing other data in a memory block of four sector size is performed in the flash memory described above. This is performed in the same manner as in the case of the card 11.

As described above, in the case of management by the FAT file system, the normal data area 3 is generally accessed in cluster units composed of power-of-two sectors. For example, in the case of an external storage device having a capacity of about 100 Mbytes, the host processing device often accesses four sectors as one cluster.

Therefore, a flash memory card 11c for selectively storing 16 sector size data in addition to 1 sector size data in a 1 sector size memory block and a 16 sector size memory block will be described. . Data of other sizes is stored in a memory block of 4 sector size.

FIG. 9 is a diagram showing the internal configuration of the third flash memory card 11c according to the present invention. As shown in the figure, the difference from the flash memory card 11 shown in FIG. 1 is that a flash memory chip 16 is further provided in addition to the flash memory chips 13 and 14. Further, the microprocessor 18 and the buffer memory 19 are built in the controller 17, and space saving is achieved by integrating into one chip.

The flash memory chip 16 has a data capacity of 5 composed of memory blocks of 16 sector size.
It is a 12 Mbit semiconductor memory chip. The storage capacity of the entire flash memory card 11 is 104 Mbytes.

Here, one cluster has four sectors, and the host processor frequently writes data of four clusters (16 sectors) in addition to data of one sector to the flash memory card 11c.

FIG. 10 shows a flash memory card 11c.
FIG. 4 is a diagram showing a procedure until the host processor specifies the size of the write data specified by the host processor.

First, the host processing device stores (a) a write instruction code in a group of registers in the controller 17;
(B) a logical sector address at which to start write access,
(C) The number of sectors of data to be write-transferred is set (S1101).

Then, the microprocessor 18 first determines whether or not the set number of write sectors is equal to 1 (S1102).

If the result of the determination is that the number of write sectors is equal to 1 (S1102: Yes), the process proceeds to a process of storing write data in a memory block in the flash memory chip 13 (S1103).

On the other hand, if the number of write sectors is different from 1 (S1102: No), the microprocessor 18
Next, it is determined whether or not the number of write sectors is equal to 16 (S1104).

As a result of the determination, if the number of write sectors is equal to 16 (S1104: Yes), the process proceeds to a process of storing write data in a memory block in the flash memory chip 16 (S1105).

On the other hand, if the number of write sectors is different from 16 (S1104: No), the process proceeds to a process of storing write data in a memory block in the flash memory chip 14 (S1106).

As described above, the process after the size of the write data specified by the host processing device is performed is performed in the same manner as in the case of the flash memory card 11 described above.

In the flash memory card 11c, write data is stored in a 16-sector-size memory block in response to frequently occurring 4-cluster (16-sector-size) data writing.
The erasing time and the like in the data rewriting process of the 16-sector size can be suppressed to the erasing time and the like for one memory block. Since the erasing time of one memory block is almost constant irrespective of its size, the rewriting process can be speeded up as compared with the case where 16 sector size data is stored using four 4 sector size memory blocks. it can.

Of course, the case where there are three or more types of specific sizes in which frequent writing occurs among the sizes of the write data specified by the host processing apparatus is performed in the same manner as in the above-described embodiment. can do.

In the above-described embodiment, an ATA interface is employed as an interface between the host processing device and the controller 17. In this case, in the write transfer operation, the same write instruction code is used as the instruction code regardless of the transfer sector size.
The microprocessor 18 reads the number of write sectors separately from the register of the controller 17 and determines whether or not the number is the number of sectors of a specific size.

On the other hand, in data transfer between the host processing device and the controller 17, an interface provided with different write instruction codes for data of a specific size and data of other sizes may be used. In that case, the microprocessor 18 can determine whether to store the write data in a memory block of a specific size only by identifying the instruction code.

In the embodiment described above,
The storage device such as the flash memory card 11 includes flash memory chips 13 to 16 as storage media,
Although the controller 17, the microprocessor 18, and the buffer memory 19 are built in, these components may be physically separated.

FIG. 11 is a diagram showing a storage device in which the storage medium unit and the control unit can be separated. As shown in the figure, the present device is composed of a PC card adapter 20 and a small flash memory card 12 coupled to the PC card adapter. On the small flash memory card 12, flash memory chips 13 and 14 are mounted. The PC card adapter 20 has a controller 17, a microprocessor 18, and a buffer memory 19 mounted thereon. The small flash memory card 12 and the PC card adapter 20 are connected and mounted on a host processing device 21 (for example, a slot of a notebook PC).

FIG. 12 is a diagram showing a configuration of a digital still camera 22 to which the present invention is applied. As shown in the figure, the digital still camera 22 includes a controller 17,
A microprocessor 18 and a buffer memory 19 are provided. A small flash memory card 12 is mounted as an external storage device. The small flash memory card 12 includes a flash memory chip 13 having a memory block size of one sector and a flash memory chip 14 having a memory block size of four sectors. As described above, if the storage medium section including the flash memory chip can be separated from other sections including the controller and the like, the small flash memory card 12 can be used when the memory capacity is insufficient.
It is economical because you only need to buy a new one.

In the above description, the case where the flash memory is used as the storage medium has been described. However, another nonvolatile semiconductor storage medium, for example, FRAM (Ferro-electric
RAM) and EEPROM (Electrically Erasable Progra)
mmable ROM) may be used.

[0109]

As described above in detail, according to the present invention, data instructed to be written at a specific size is stored in a memory block of the same size. The memory block can be erased immediately without saving the data. Further, the erasing time of data of a specific size can be suppressed to the erasing time of one memory block. As a result, the speed of rewriting data of a specific size can be increased.

Also, since data of a specific size is stored in a memory block of the same size, erasure of a memory block due to rewriting of other data does not occur. Even if it is high, shortening of the life of the entire memory chip can be suppressed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration example of a first flash memory card and a host processing device according to the present invention.

FIG. 2 is a diagram showing an outline of a physical memory map in a first flash memory card.

FIG. 3 is a diagram showing an outline of a management area in a first flash memory card.

FIG. 4 is a diagram showing an outline of an address conversion table in the first flash memory card.

FIG. 5 is a flowchart showing a flow of processing for specifying the size of write data specified by the host processing device in the first flash memory card.

FIG. 6 is a flowchart showing a data write operation of one sector size.

FIG. 7 is a flowchart showing a data write operation of data having a size of two sectors or more.

FIG. 8 is a diagram showing an internal configuration of a second flash memory card according to the present invention.

FIG. 9 is a diagram showing an internal configuration of a third flash memory card according to the present invention.

FIG. 10 shows a third flash memory card.
9 is a flowchart until the size of write data specified by the host processing device is specified.

FIG. 11 is a configuration diagram of a small flash memory card, a PC card adapter, and a host processing device.

FIG. 12 is a diagram illustrating a configuration of a digital still camera to which the present invention has been applied.

FIG. 13 is a diagram showing a logical memory map in the FAT file system.

[Explanation of symbols]

11 Flash memory card 13 Flash memory chip (memory block size: 1 sector) 14 Flash memory chip (memory block size: 4 sectors) 17 Controller 18 Microprocessor 19 Buffer memory 21 Host processing unit

Continued on the front page (72) Inventor Takayuki Tamura 1099 Ozenji Temple, Aso-ku, Kawasaki City, Kanagawa Prefecture Inside the Hitachi, Ltd.System Development Laboratory (72) Inventor Kunihiro Katayama 1099 Ozenji Temple, Aso-ku, Kawasaki-shi, Kanagawa Hitachi, Ltd. F term in system development laboratory (reference) 5B025 AD01 AD04 AD08 5B060 AA06 AA12 AC11 5B065 BA05 CC03

Claims (5)

[Claims] 1. A storage device for storing data written from a host processing device, the storage device having a first size and being rewritable in the size.
A second data storage block having a second size and rewritable with the size.
And a control means for storing the write data in one of the first and second data storage blocks in accordance with the size of the write data specified by the host processing device. apparatus. 2. The control means stores, in the first data storage block, data designated to be written at the first size, and the second data storage block stores the first data in the first data storage block. 2. The storage device according to claim 1, wherein data for which writing is instructed in a size other than the size is stored. 3. A storage device for storing data to be written from a host processing device, comprising: first storage means capable of rewriting in units of a block having a first size; and rewriting in units of a block having a second size. When the size of the write data specified by the host processing device is the first size, the data is stored in the first storage means. If the size of the write data specified by the device is other than the first size, the data is stored in the second storage means. 4. A storage device comprising: a first storage means rewritable in block units having a first size; and a second storage means rewritable in block units having a second size. A host processing device for writing, wherein when the size of the write data is the first size, the data is stored in the first storage means, and the size of the write data is other than the first size. If so, the host processing device stores the data in the second storage unit. 5. A method for storing data transferred from a host processing device in a storage medium, the method comprising: determining a size of write data specified by the host processing device; , Storing in a first data storage block having a first size, and storing data designated to be written in a size other than the first size in a second data storage block having a second size. A data storage method characterized by the following.