JP2000165044A - Manufacture of multilayer printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacture method of a multiyear printed wiring board where the thickness of a metal layer on the surface of an insulating layer is thinned and a conductor layer is formed of a fine circuit pattern, while the thickness of a metal layer in a via hole is secured and connection reliability between the conductor layers is secured. SOLUTION: A multilayer printed wiring board, where conductor layers 1 and insulating layers 2 are alternately installed and the conductor layers 1 are connected through via holes 3 installed in the insulating layers 2, is manufactured. Metal layers 4 are formed on the surface of the insulating layers 2 where the via holes 3 are installed and in the via holes 3. Work for thinning the thickness of the metal layers 4 on the surfaces of the insulating layers 1 while the thickness of the metal layers 4 in the via holes 3 are kept is executed. Then, a circuit is formed by the metal layers 4 on the surfaces of the insulating layers 2 and the conductor layers 1 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to, for example, electronic equipment,
The present invention relates to a method for manufacturing a multilayer printed wiring board used for electric equipment, computers, communication equipment, and the like.

[0002]

2. Description of the Related Art In recent years, electronic components such as semiconductor chips and chip components have become lighter, thinner and smaller, and accordingly, multilayer printed wiring boards on which electronic components are mounted have connection styles between conductors called via holes. 2. Description of the Related Art Build-up multilayer printed wiring boards have been used because they can be thinned at high density.

There are various forms and methods of build-up, but one of the general methods is as follows.
That is, first, an insulating layer is formed on a conductor layer formed as a circuit pattern, and a via hole reaching the lower conductor layer is formed on the insulating layer by laser beam irradiation, photoreaction, or the like. Electroless plating and electrolytic plating are applied from the surface to the inner wall surface of the via hole to form the entire metal layer. Thereafter, the metal layer on the surface of the insulating layer is printed and processed into a circuit pattern to form a conductor layer, and the upper and lower conductor layers are electrically connected by the metal layer in the via hole. By repeating this operation, it is possible to obtain a multilayer printed wiring board in which a plurality of conductive layers electrically connected via via holes are provided in a plurality of layers via an insulating layer.

[0004] A problem in such a multilayer printed wiring board in which conductive layers are electrically connected via the via holes is the connection reliability between the conductive layers by the metal layer on the inner wall of the via holes. For example, when the conductor layer and the metal layer on the inner wall of the via hole are formed of copper, if the thickness of the metal layer on the inner wall of the via hole is not more than about 15 μm, disconnection occurs and it is difficult to obtain sufficient connection reliability. Therefore, when forming a metal layer by plating from the surface of the insulating layer to the inner wall surface of the via hole, the metal layer is formed with a thickness of 25 to 30 μm or more, and the thickness of the metal layer on the inner wall of the via hole is secured and connected. The current situation is to obtain high reliability.

[0005]

However, when the metal layer on the surface of the insulating layer is formed with a thickness of 25 to 30 μm or more as described above, the surface of the insulating layer is formed using a circuit forming technique such as a tenting method. When a conductor layer is formed by forming a circuit pattern using this metal layer, there is a problem that it is extremely difficult to form a circuit pattern of the conductor layer into a fine circuit having a line and space of 30 μm / 30 μm. Was.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has been made to reduce the thickness of the metal layer on the surface of the insulating layer while securing the thickness of the metal layer in the via hole and ensuring the connection reliability between the conductor layers. It is an object of the present invention to provide a method for manufacturing a multilayer printed wiring board that can be thinned to form a conductor layer with a fine circuit pattern.

[0007]

According to a first aspect of the present invention, there is provided a method for manufacturing a multilayer printed wiring board, comprising: a conductor layer and an insulating layer;
Are alternately provided so that the connection between the conductor layers 1 is made via the via holes 3 provided in the insulating layer 2, the surface of the insulating layer 2 provided with the via holes 3 and the inside of the via holes 3 are manufactured. After the metal layer 4 is formed over the entire surface of the insulating layer 1 while the thickness of the metal layer 4 in the via hole 3 is maintained, the thickness of the metal layer 4 on the surface of the insulating layer 1 is reduced. A circuit is formed on the metal layer 4 to form the conductor layer 1.

According to a second aspect of the present invention, in the first aspect, the thickness of the metal layer 4 on the surface of the insulating layer 1 is reduced while the thickness of the metal layer 4 in the via hole 3 is maintained. After injecting the liquid 5 into the insulating layer 1, the insulating layer 1
Is a process of chemically etching the metal layer 4 on the surface.

According to a third aspect of the present invention, in the second aspect, the liquid 5 to be injected into the via hole 3 is water, and the etching step is performed by a wet process using an etching solution containing sulfuric acid and hydrogen peroxide as main components. Characterized in that it is an etching process.

According to a fourth aspect of the present invention, in the second aspect, the liquid 5 to be injected into the via hole 3 is a liquid showing alkalinity, and the etching step is performed by using an etching solution containing sulfuric acid and hydrogen peroxide as main components. It is characterized in that it is a wet etching process used.

According to a fifth aspect of the present invention, the process of reducing the thickness of the metal layer 4 on the surface of the insulating layer 1 while maintaining the thickness of the metal layer 4 in the via hole 3 is performed by injecting the resin 6 into the via hole 3. After curing, the metal layer 4 on the surface of the insulating layer 1 is mechanically removed.

According to a sixth aspect of the present invention, the resin 6 to be injected and cured into the via hole 3 is an epoxy resin.
The process for mechanically removing the metal layer 4 on the surface of the substrate is mechanical polishing.

[0013]

Embodiments of the present invention will be described below.

FIG. 1 shows an embodiment of the present invention. First, an inner circuit board 11 in which conductor layers 1 (1a, 1b) are provided on both surfaces of an electrically insulating core substrate 10 is manufactured. . As the inner layer circuit board 11, for example, a double-sided metal-clad laminate having a metal foil such as a copper foil on both sides is used, and conductor layers 1a and 1b are formed by printing and wiring each metal foil into a circuit pattern. Can be used.

Then, insulating layers 2 and 2 are provided on both sides of the inner circuit board 11, and the conductor layers 1a and 1b are covered with the insulating layer 2 as shown in FIG. The insulating layer 2 can be provided with a thermosetting resin such as an epoxy resin by any application means such as printing or coating. In addition to such application, a metal foil with a resin in which a semi-cured resin layer is provided on one side of the metal foil is used, and the resin layer of the metal foil with the resin is laminated and formed on the surface of the inner circuit board 1. An insulating layer 2 may be provided.

Next, a via hole 3 reaching the conductor layers 1a and 1b is provided in each insulating layer 2 at a place where the conductor layers 1a and 1b are electrically connected. The processing of the via hole 3 can be performed by irradiating the insulating layer 2 with a laser beam such as a carbon dioxide gas laser or an ultraviolet laser to remove the resin of the insulating layer 2 at the irradiated portion. In the case where the via hole 3 is formed of a resin, the via hole 3 can be formed through an exposure and development process.

Next, after the surface of each insulating layer 2 is roughened by treatment with permanganic acid or the like, electroless plating such as electroless copper plating is performed, and then electrolytic plating such as electrolytic copper plating is performed. 1C, the inner circuit board 1 extends from the surface of the insulating layer 2 to the inside of the via holes 1a and 1b as shown in FIG.
A metal layer 4 is formed on the entirety of the substrate 1. Here, the thickness of the metal layer 4 formed on the inner wall surfaces of the via holes 1a and 1b needs to be 15 μm or more in order to secure conduction reliability between the conductor layers 1, and the inner wall surfaces of the via holes 1a and 1b are required. When the thickness of the metal layer 4 is 15 μm or more, the thickness of the metal layer 4 formed on the surface of the insulating layer 2 becomes 25 to 30 μm or more due to the surroundings of the electrolytic plating.

After the metal layer 4 is formed by plating as described above, a process of reducing the thickness of the metal layer 4 on the surface of the insulating layer 2 is performed. At this time, in the embodiment of FIG.
After the liquid 5 is injected and filled into the via hole 3 as shown in (d), the metal layer 4 on the surface of the insulating layer 2 is processed by a wet etching process using an etching solution, so that the surface of the insulating layer 2 is Processing for reducing the thickness of the metal layer 4 is performed. Since the via hole 3 is usually formed as a thin hole having an inner diameter of about 100 μm, the liquid 5 filled in the via hole 3 is held in the via hole 3 by its surface tension. The filled liquid 5 can prevent the etching liquid from acting on the via hole 3. Therefore, as shown in FIG. 1E, the thickness of the metal layer 4 in the via hole 3 is maintained and the thickness of the insulating layer 2 is reduced. The processing for reducing the thickness of the metal layer 4 on the surface can be performed. It is preferable that the thickness of the metal layer 4 on the surface of the insulating layer 2 is reduced to about 10 μm.

The processing by the above wet etching process is a technique called half etching, and can uniformly thin the metal layer 4 on the surface of the insulating layer 2 by uniformly etching the metal layer 4. is there. Here, when the metal layer 4 is formed of copper, an etching solution having a small etching amount and including sulfuric acid and hydrogen peroxide is used.
This etchant is sprayed onto the surface of the metal layer 4,
By exchanging the etching solution uniformly and frequently with respect to the surface of the metal layer 4 so that the etching solution does not stay on the surface for a long period of time, the surface of the insulating layer 2 is more likely than the metal layer 4 in the via hole 3. Metal layer 4 can be etched much more uniformly.
The process of reducing the thickness of the metal layer 4 on the surface of the insulating layer 2 can be performed while the thickness of the metal layer 4 in the via hole 3 is maintained.

When such an etching solution comprising sulfuric acid and hydrogen peroxide is used, water can be used as the liquid 5 to be filled in the via hole 3. However, since this etching solution is acidic, the etching solution in the via hole 3 is used. If an alkaline liquid such as a cleaning liquid for cleaning a printed wiring board is used as the liquid 5 to be filled into the via hole 3, the etching liquid is prevented from acting on the via hole 3 and the thickness of the metal layer 4 in the via hole 3 is secured. The effect can be further enhanced.

After the thickness of the metal layer 4 on the surface of the insulating layer 2 is reduced while securing the thickness of the metal layer 4 in the via hole 3 as described above, the metal on the surface of each insulating layer 2 is formed. A circuit is formed on the layer 4 to form the conductor layers 1 (1c, 1d) as a circuit pattern as shown in FIG. 1 (f), and a multilayer printed wiring board can be manufactured. The outer conductor layers 1c, 1 thus formed
d and the inner conductor layers 1 a and 1 b are electrically connected by the metal layer 4 on the inner wall of the via hole 3. Here, in forming a circuit on the metal layer 4 on the surface of the insulating layer 2, for example, an etching resist such as a dry film is formed on the surface of the metal layer 4, and after exposing and developing the resist, the metal foil 4 is removed. The etching can be performed by printed wiring processing. When a circuit is formed on the metal layer 4 on the surface of the insulating layer 2 as described above, since the metal layer 4 is processed to be thin, it is necessary to form the conductor layers 1c and 1d as a fine circuit pattern. It will be easier. Further, since the thickness of the metal layer 4 in the via hole 3 is ensured, a high conductive connection between the outer conductor layers 1c and 1d and the inner conductor layers 1a and 1b can be obtained.

FIG. 2 shows another example of the embodiment of the present invention. In FIG.
The steps up to FIG. 2C for forming the metal layer 4 on the entire inner-layer circuit board 11 in the area b are the same as those shown in FIGS. 1A to 1C.
Is the same as Then, as shown in FIG. 2 (c), plating is performed to form a metal layer 4, and then, as shown in FIG. 2 (d), a thermosetting resin 6 is injected and filled into the via holes 3 to be cured. The metal layer 4 on the surface of the layer 1 is mechanically removed, and processing for reducing the thickness of the metal layer 4 is performed. When the metal layer 4 on the surface of the insulating layer 1 is mechanically removed in this manner, the surface layer of the resin 6 filled in the via hole 3 is also removed at the same time, but the resin filled in the via hole 3 is removed. 6
Thus, the effect of mechanical removal can be prevented from acting on the inside of the via hole 3. Therefore, as shown in FIG.
The process of reducing the thickness of the metal layer 4 on the surface of the insulating layer 2 can be performed while the thickness of the metal layer 4 in the via hole 3 is secured, and the thickness of the metal layer 4 on the surface of the insulating layer 2 can be reduced. It is preferable to reduce the thickness to about 10 μm.
Here, as a method of mechanically removing the metal layer 4 on the surface of the insulating layer 1, a sand blast method in which abrasive grains are sprayed, a honing method using a honing machine, a milling method using a milling machine, an original plate having irregularities and an emboss A rough surface transfer method using a roll, a polishing method using various polishing machines such as a scrub polishing and a buff polishing with an oscillation function, and the like can be adopted.

Here, the resin 6 to be filled and cured in the via hole 3 is not particularly limited. However, when the metal layer 4 on the surface of the insulating layer 1 is mechanically polished with a buffing machine or the like, it is removed.
In order to protect the metal layer 4 in the via hole 3 and prevent the metal layer 4 from being damaged, the resin 6 is required to have a high strength. Therefore, the resin 6 is widely used as a material for a printed wiring board, and is often used for filling a through hole. It is preferable to use an epoxy resin which is easily obtained.

After the thickness of the metal layer 4 on the surface of the insulating layer 2 is reduced while securing the thickness of the metal layer 4 in the via hole 3 as described above, the metal on the surface of each insulating layer 2 is formed. A circuit is formed on the layer 4 to form the conductor layer 1 (1c, 1d) as a circuit pattern as shown in FIG. 2 (f), and a multilayer printed wiring board can be manufactured. The outer conductor layers 1c and 1d and the inner conductor layers 1a and 1b are electrically connected by the metal layer 4 on the inner wall of the via hole 3. Here, when forming a circuit on the metal layer 4 on the surface of the insulating layer 2, FIG.
This can be performed in the same manner as in the case of (f). When a circuit is formed on the metal layer 4 on the surface of the insulating layer 2 as described above, since the metal layer 4 is processed to be thin, the conductor layers 1c,
It is easy to form 1d. Further, since the thickness of the metal layer 4 in the via hole 3 is ensured, a high conductive connection between the outer conductor layers 1c and 1d and the inner conductor layers 1a and 1b can be obtained.

[0025]

Next, the present invention will be described specifically with reference to examples.

(Example 1) A copper foil on both sides of a double-sided copper-clad laminate is printed, and an inner circuit board 11 having conductor layers 1a and 1b on both sides is used. The surface of each copper conductor layer 1a and 1b is used. After the blackening treatment, 5000 parts by weight of a thermosetting resin “Propimer 52” manufactured by Ciba-Geigy, 1000 parts by weight of a curing agent “xj9001” manufactured by Ciba-Geigy, 1600 parts by weight of a matting additive “DW91t” manufactured by Ciba-Geigy, ethylene glycol monomethyl An epoxy resin composition consisting of 975 parts by weight of ether and 325 parts by weight of cyclohexanone was applied by printing on both surfaces of the inner circuit board 11 so as to have a thickness of 60 μm, and dried at 150 ° C. for 180 minutes.
An insulating layer 2 was provided (see FIG. 1A).

Next, a via hole 3 having a diameter of 100 μm was formed in the insulating layer 2 by irradiating a carbon dioxide laser beam.
And diethylene glycol monobutyl ether
5% of the inner circuit board 11 is placed in a swelling liquid at 75 ° C. containing 0% by weight.
After immersing the inner circuit board 11 in an 80 ° C. desmear solution having 50 g / L of sodium permanganate for 10 minutes, 5 minutes in a 50 ° C. neutralized solution containing 10% by weight of sulfuric acid.
The surface of the insulating layer 2 was subjected to a surface roughening treatment by immersing for 2 minutes (see FIG. 1B).

Next, electroless copper plating using palladium-tin as a catalyst is applied to the surface of the insulating layer 2 of the inner circuit board 11 by 0.5.
After applying a thickness of μm, electrolytic copper plating was performed to form a metal layer 4 by panel plating from the surface of the insulating layer 2 to the inside of the via hole 3. The thickness of the metal layer 4 is
25 μm on the surface of the insulating layer 2 and 14 μm in the via hole 3
(See FIG. 1 (c)).

After that, the via hole 3 is completely filled with water (see FIG. 1D), and in this state, a half etching solution (“SE-7000” manufactured by Mitsubishi Gas Corporation) is spray-sprayed to form the insulating layer 2. The thickness of the metal layer 4 on the surface of
m thickness. At this time, there was no change in the thickness of the metal layer 4 in the via hole 3 (see FIG. 1E).

Then, a dry film ("AQ-4093" manufactured by Asahi Kasei Corporation) is formed so as to cover the metal layer 4 on the surface of the insulating layer 2.
Were laminated and subjected to exposure, development, and copper chloride etching to form a circuit, thereby forming conductor layers 1c and 1d (see FIG. 1 (f)).

In this case, the metal layer 4 on the surface of the insulating layer 2
Was 15 μm, so that a fine circuit having a line and space of 30 μm / 30 μm could be manufactured.
In addition, since the thickness of the metal layer 4 in the via hole 3 is 14 μm, the conduction reliability between the outer conductor layers 1c and 1d and the inner conductor layers 1a and 1b is high.

(Example 2) Except that the via hole 3 was filled with an alkaline liquid containing 50 mL / L of an alkaline printed wiring board cleaner ("902" manufactured by Atotech) in the step of FIG. It was the same as in Example 1.

Also in this case, the metal layer 4 on the surface of the insulating layer 2
Was 15 μm, so that a fine circuit having a line and space of 30 μm / 30 μm could be manufactured.
In addition, since the thickness of the metal layer 4 in the via hole 3 is 14 μm, the conduction reliability between the outer conductor layers 1c and 1d and the inner conductor layers 1a and 1b is high.

(Example 3) A copper foil on both sides of a double-sided copper-clad laminate is printed, and an inner layer circuit board 11 having conductor layers 1a and 1b on both sides is used. The surface of each copper conductor layer 1a and 1b is used. After the blackening treatment, 5000 parts by weight of a thermosetting resin “Propimer 52” manufactured by Ciba-Geigy, 1000 parts by weight of a curing agent “xj9001” manufactured by Ciba-Geigy, 1600 parts by weight of a matting additive “DW91t” manufactured by Ciba-Geigy, ethylene glycol monomethyl An epoxy resin composition consisting of 975 parts by weight of ether and 325 parts by weight of cyclohexanone was applied by printing on both surfaces of the inner circuit board 11 so as to have a thickness of 60 μm, and dried at 150 ° C. for 180 minutes.
An insulating layer 2 was provided (see FIG. 2A).

Next, a via hole 3 having a diameter of 100 μm was formed in the insulating layer 2 by irradiating a carbon dioxide laser beam.
And diethylene glycol monobutyl ether
5% of the inner circuit board 11 is placed in a swelling liquid at 75 ° C. containing 0% by weight.
After immersing the inner circuit board 11 in an 80 ° C. desmear solution having 50 g / L of sodium permanganate for 10 minutes, 5 minutes in a 50 ° C. neutralized solution containing 10% by weight of sulfuric acid.
The surface of the insulating layer 2 was subjected to a surface roughening treatment by immersing for 2 minutes (see FIG. 2B).

Next, electroless copper plating using palladium-tin as a catalyst is applied to the surface of the insulating layer 2 of the inner circuit board 11 by 0.5.
After applying a thickness of μm, electrolytic copper plating was performed to form a metal layer 4 by panel plating from the surface of the insulating layer 2 to the inside of the via hole 3. The thickness of the metal layer 4 is
25 μm on the surface of the insulating layer 2 and 14 μm in the via hole 3
(See FIG. 2C).

Thereafter, 5000 parts by weight of a thermosetting resin “Propimer 52” manufactured by Ciba-Geigy, 1000 parts by weight of a curing agent “xj9001” manufactured by Ciba-Geigy, 1600 parts by weight of a matting additive “DW91t” manufactured by Ciba-Geigy, ethylene glycol monomethyl ether An epoxy resin composition comprising 975 parts by weight and 325 parts by weight of cyclohexanone was injected and filled into the via hole 3 with a dispenser.
It was cured by heating at 0 ° C. for 60 minutes (FIG. 2).
(D)).

In this state, the surface of the inner layer circuit board 11 is polished with a buffing machine (“Slc leveling line” manufactured by Ishii Notation Co., Ltd .: buff # 600) to reduce the thickness of the metal layer 4 on the surface of the insulating layer 2. To a thickness of 15 μm. At this time, there was no change in the thickness of the metal layer 4 in the via hole 3 (see FIG. 2E).

Then, a dry film ("AQ-4093" manufactured by Asahi Kasei Corporation) covers the metal layer 4 on the surface of the insulating layer 2.
Were laminated and subjected to exposure, development and copper chloride etching to form a circuit, thereby forming conductor layers 1c and 1d (see FIG. 2 (f)).

In this case, the metal layer 4 on the surface of the insulating layer 2
Was 15 μm, so that a fine circuit having a line and space of 30 μm / 30 μm could be manufactured.
In addition, since the thickness of the metal layer 4 in the via hole 3 is 14 μm, the conduction reliability between the outer conductor layers 1c and 1d and the inner conductor layers 1a and 1b is high.

COMPARATIVE EXAMPLE 1 A circuit was formed in the same manner as in Example 1 on the metal layer 4 having a thickness of 25 μm on the surface of the insulating layer 2 without performing the processes shown in FIGS. 1 (d) and 1 (e). Then, the conductor layers 1c and 1d were formed. In this case, since the thickness of the metal layer 4 on the surface of the insulating layer 2 was 25 μm, disconnection occurred when a fine circuit having a line and space of 30 μm / 30 μm was produced.

[0042]

As described above, according to the first aspect of the present invention, there is provided a multilayer printed wiring board in which conductive layers and insulating layers are alternately provided, and connection between the conductive layers is performed through via holes provided in the insulating layer. In manufacturing, a metal layer is formed over the surface of the insulating layer having the via hole and the inside of the via hole,
After processing to reduce the thickness of the metal layer on the surface of the insulating layer while maintaining the thickness of the metal layer in the via hole, a circuit is formed using this metal layer on the surface of the insulating layer to form a conductor layer. Therefore, it is possible to form a conductor layer with a fine circuit pattern by reducing the thickness of the metal layer on the surface of the insulating layer while securing the thickness of the metal layer in the via hole and ensuring the connection reliability between the conductor layers. You can do it.

According to a second aspect of the present invention, the processing of reducing the thickness of the metal layer on the surface of the insulating layer while maintaining the thickness of the metal layer in the via hole is performed by injecting a liquid into the via hole. Since the surface metal layer is chemically etched, the thickness of the metal layer on the surface of the insulating layer is reduced while securing the thickness of the metal layer in the via hole and ensuring the connection reliability between the conductor layers. It is possible to easily form a conductor layer with a fine circuit pattern.

According to a third aspect of the present invention, the liquid to be injected into the via hole is water, and the etching step is a wet etching process using an etching solution containing sulfuric acid and hydrogen peroxide as main components. It is easy to form a conductor layer with a fine circuit pattern by reducing the thickness of the metal layer on the surface of the insulating layer while securing the thickness of the metal layer to secure the connection reliability between the conductor layers. You can do it.

According to a fourth aspect of the present invention, the liquid injected into the via hole is a liquid exhibiting alkalinity, and the etching process is a wet etching process using an etching solution containing sulfuric acid and hydrogen peroxide as main components. In addition, the effect of protecting the metal layer in the via hole from the acidic etching solution can be enhanced, and the effect of securing the thickness of the metal layer in the via hole can be further enhanced.

According to a fifth aspect of the present invention, the process of reducing the thickness of the metal layer on the surface of the insulating layer while maintaining the thickness of the metal layer in the via hole is performed by injecting and hardening a resin in the via hole. Since the metal layer on the surface of the layer is mechanically removed, the thickness of the metal layer on the surface of the insulating layer is reduced while securing the thickness of the metal layer in the via hole and ensuring the connection reliability between conductor layers. Thus, it is possible to easily form a conductor layer with a fine circuit pattern.

According to a sixth aspect of the present invention, the resin to be injected and cured into the via hole is an epoxy resin, and the process of mechanically removing the metal layer on the surface of the insulating layer is mechanical polishing. Thus, the metal layer in the via hole can be protected, and the effect of securing the thickness of the metal layer in the via hole can be further enhanced.

[Brief description of the drawings]

FIG. 1 shows an example of an embodiment of the present invention,
(A) to (f) are cross-sectional views.

FIG. 2 shows another example of the embodiment of the present invention, and (a) to (f) are cross-sectional views.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Conductive layer 2 Insulating layer 3 Via hole 4 Metal layer 5 Liquid 6 Resin

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Koji Takagi 1048 Kazumasa Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works, Ltd. (72) Inventor Kazunori Mori 1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works, Ltd. (72) Inventor Isao Hirata 1048 Kadoma Kadoma, Kadoma-shi, Osaka Pref. Matsushita Electric Works, Ltd. (72) Inventor Kiyoaki Ihara 1048 Kadoma, Kadoma, Kadoma-shi, Osaka F-term (reference) 5E346 AA32 AA43 CC09 CC55 GG22

Claims (6)

[Claims] 1. A method of manufacturing a multilayer printed wiring board in which conductive layers and insulating layers are provided alternately and connection between conductive layers is made via via holes provided in the insulating layer, the surface of the insulating layer provided with via holes. And forming a metal layer over the inside of the via hole, reducing the thickness of the metal layer on the surface of the insulating layer while maintaining the thickness of the metal layer in the via hole, and then forming the metal layer on the surface of the insulating layer. Forming a conductor layer by forming a circuit by using the method described above. 2. A process for reducing the thickness of the metal layer on the surface of the insulating layer while maintaining the thickness of the metal layer in the via hole, the method comprising: injecting a liquid into the via hole; 2. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the etching is a process of etching. 3. The liquid injected into the via hole is water,
3. The method for manufacturing a multilayer printed wiring board according to claim 2, wherein the etching step is a wet etching process using an etching solution containing sulfuric acid and hydrogen peroxide as main components. 4. The method according to claim 1, wherein the liquid injected into the via hole is a liquid exhibiting alkalinity, and the etching step is a wet etching process using an etching liquid containing sulfuric acid and hydrogen peroxide as main components. 3. The method for manufacturing a multilayer printed wiring board according to 2. 5. A process for reducing the thickness of the metal layer on the surface of the insulating layer while maintaining the thickness of the metal layer in the via hole, by injecting and hardening a resin in the via hole, and then forming the metal layer on the surface of the insulating layer. The method for producing a multilayer printed wiring board according to claim 1, wherein the method is a process of mechanically removing the resin. 6. A method according to claim 5, wherein the resin to be injected and hardened into the via hole is an epoxy resin, and the processing for mechanically removing the metal layer on the surface of the insulating layer is mechanical polishing.
3. The method for producing a multilayer printed wiring board according to item 1.