JP2000164865A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) [Problem] In a conventional technique, for example, in a step of forming a silicon nitride film that straddles between two electrodes and is in contact with an active region, one extra step is performed after forming a silicon nitride film.
One photo step and one etching step are required. A photo process of an electrode is performed on a semiconductor silicon substrate. Next, after etching the silicide film 4, the polysilicon film 3, and the silicon oxide film 2, the resist pattern 7 is removed by ashing. Next, a silicon oxide film 8 is formed, the whole surface is etched back, and the process is stopped with the silicon oxide film 8 left so that the silicon nitride film 6 on the electrode is not exposed. Next, immersion treatment is performed until the silicon oxide film 8 left during the entire etch back is removed and the surface of the silicon nitride film 6 on the electrodes is exposed. Next, a silicon oxide film 16 and a silicon nitride film 17 are formed. Next, a contact hole is formed on the active region and on the electrode. At this time, the difference in the thickness of the silicon oxide film is offset by the difference in the thickness of the silicon nitride film. As a result, the contact holes 12 and 13 on the active region and on the electrode can be formed almost simultaneously.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a wiring layer contact structure having a surface flattening insulating film and a step, and a method of manufacturing the same.

[0002]

2. Description of the Related Art The prior art (Japanese Patent Laid-Open No. 10-79430) discloses, for example, that a silicon oxide film 22, a polysilicon film 23 made of doped polysilicon, and a tungsten silicide (WSi) are formed on a semiconductor silicon substrate 21. After a silicide film 24, a silicon oxide film 25, and an antireflection film 26 made of a silicon nitride film are sequentially formed, a photo process of an electrode is performed (FIG. 14).

Next, after the silicon nitride film 26 and the silicon oxide film 25 are etched using the resist pattern 27 as a mask, the resist pattern 27 is removed by ashing. Next, the silicide film 24, the polysilicon film 23, and the silicon oxide film 22 are etched using the silicon nitride film 26 and the silicon oxide film 25 as a mask. next,
A silicon oxide film 28 is formed.
Is etched back to form side walls (FIG. 15).

Next, a silicon nitride film 29 is formed, a photo process is performed, and the silicon nitride film 29 is etched using a resist pattern as a mask, whereby a silicon nitride film 29 is formed between the two electrodes, and is formed in the active region. Touch (FIG. 16).

Next, a silicon oxide film 30 (BPSG film)
After forming the contact, a contact photo step is performed (FIG. 1).
7). The contact pattern is formed on the active region and on the electrode.

Next, by etching the silicon oxide film 30 on the active region and on the electrode using the resist pattern 31 as a mask, the contact holes 32 and 33 become the silicon nitride film 29 on the active region and the silicon nitride film on the electrode. 26 respectively (FIG. 18).

Next, using the resist pattern 31 and the silicon oxide film 30 as a mask, the silicon nitride film 2 on the active region is formed.
9 and silicon nitride film 26 and silicon oxide film 2 on electrodes
The contact hole 3 is etched by etching
2 and 33 reach the active region and the electrode, respectively (FIG. 1).
9).

Next, after removing the resist pattern 31 by ashing, the wiring layer 34 is formed (FIG. 20). The wiring layer contact structure has been formed by the above-described steps.

[0009]

In the above-mentioned conventional technique, for example, in the step of forming a silicon nitride film 29 which straddles between two electrodes and is in contact with an active region, after forming electrodes and sidewalls, Nitride film 29
After the formation of the silicon nitride film 29, an extra photo process and an etching process are required after the silicon nitride film 29 is formed by etching the silicon nitride film 29 using the resist pattern as a mask. The purpose of depositing a silicon nitride film of approximately the same thickness as the silicon nitride film on the electrode on the active region is in the process of contacting the stepped electrode and the active region with silicon as an etching stopper for the silicon oxide film. This is because a nitride film is required.

Further, when etching the silicon nitride film 29 to form the silicon nitride film 29 which straddles the two electrodes and is in contact with the active region, the silicon nitride film on the electrodes may be etched at the same time. Yes. When the silicon nitride film 29 on the electrode is etched, a silicon oxide film 30 (BPSG film) is formed thereon, a contact photo step is performed, and a resist pattern 3 is formed.
1 as a mask when etching the silicon oxide film 30 on the active region and on the electrode, and then using the resist pattern 31 and the silicon oxide film 30 as a mask, the silicon nitride film 29 on the active region and the silicon nitride film 26 on the electrode. When the silicon oxide film 25 is etched, there is a possibility of adverse effects.

For example, when etching the silicon nitride film 29 to form the silicon nitride film 29 which is in contact with the active region and extends between the two electrodes, if the silicon nitride film 26 on the electrodes is etched to some extent, Since the silicon nitride film 29 on the active region is protected by the resist pattern, it is not etched, and the silicon nitride film 26 on the electrode becomes thinner than the silicon nitride film 29 on the active region. Alternatively, the silicon nitride film 26 on the electrode may be almost or completely etched (FIG. 21). As a result, at the time of contact etching in a later step, the silicon oxide film 30
And silicon nitride film 29 and silicon oxide film 3 on the electrode
When the thickness of the portion to be etched of the silicon nitride film 26 becomes larger than that of the silicon nitride film 26 (both the silicon oxide film and the silicon nitride film become thinner on the electrode), when the etching of the active region is completed, The electrode is excessively over-etched in the contact step.

As a countermeasure, for example, when etching the silicon nitride film 29 to form the silicon nitride film 29 which is in contact with the active region and extends between the two electrodes, the silicon nitride film 26 on the electrodes is not etched. In forming the electrode layer, a silicon oxide film 35 may be formed on the silicon nitride film 26 (anti-reflection film made of silicon). When the entire surface of the oxide film 28 is etched back, there is a possibility that the silicon oxide film 35 is etched (FIG. 22). As a result, as described above, eventually, the electrode is excessively over-etched. It becomes a state. As described above, during the contact etching, the upper portion of the electrode becomes over-etched, and when the contact penetrates the tungsten silicide film and reaches the electrode layer (polysilicon film 23) made of doped polysilicon, the wiring layer 34 is formed. When formed, the electrical characteristics are adversely affected, such as an increase in contact resistance. Moreover, in the first place, the silicon nitride film 2 is directly formed on the surface of the silicon substrate 21 on the active region.
9 is formed, and there is a concern that the silicon substrate 21 may be affected by stress or the like.

An object of the present invention is to provide a method of manufacturing a semiconductor device having a stable wiring layer contact structure without complicating the process.

[0014]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming an active region and a gate electrode on a semiconductor silicon substrate; The film is made to have an etching selectivity between the first silicon nitride film and the first silicon oxide film (the first silicon nitride film / the first silicon oxide film) by the thickness of the first silicon oxide film formed in a later step. (A silicon oxide film) and a second silicon oxide film are formed on the entire surface, and dry etching and wet etching are sequentially performed to form only the second silicon oxide film. Removing, exposing the surface of the first silicon nitride film formed on the electrode, and exposing the surface of the silicon substrate on the active region to form a sidewall in the electrode layer; Yo Forming a third silicon oxide film only on the active region, sequentially forming a second silicon nitride film and a first silicon oxide film, and planarizing the surface; A third silicon oxide film,
Forming a first hole on the silicon substrate on the active region by selectively removing the second silicon nitride film and the second silicon oxide film formed by the selective oxidation; 3, a silicon oxide film, a second silicon nitride film,
By selectively removing the first silicon nitride film,
Forming a second hole on the electrode, filling the first hole, and forming an electrically connected first wiring layer;
Filling the second hole and forming an electrically connected second wiring layer.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming an active region and a gate electrode on a semiconductor silicon substrate; and forming a first silicon nitride film on the electrode. Etching selectivity between the first silicon nitride film and the first silicon oxide film (first silicon nitride film / first silicon oxide film) A first silicon oxide film is formed on the entire surface, and dry etching and wet etching are sequentially performed to remove only the first silicon oxide film. Exposing the surface of the first silicon nitride film formed on the electrode, and exposing the surface of the silicon substrate on the active region;
Forming a side wall on the electrode layer, forming a second silicon oxide film only on the active region by selective oxidation, and forming a third silicon oxide film;
Flattening the surface; and forming a third silicon oxide film, a second silicon nitride film, and a second silicon oxide film on the active region by selective oxidation.
A first hole is formed on the silicon substrate on the active region by selectively removing the silicon oxide film of the first region, and a third silicon oxide film and a second silicon nitride film on the electrode are formed. Forming a second hole on the electrode by selectively removing the first silicon nitride film; and a first wiring layer filling the first hole and electrically connected to the first hole. And filling the second hole to form an electrically connected second wiring layer.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments.

FIGS. 1 to 7 are cross-sectional views showing the steps of manufacturing a semiconductor device according to the first embodiment of the present invention. FIGS. 8 to 13 are cross-sectional views of the semiconductor device according to the second embodiment of the present invention. It is sectional drawing which shows a manufacturing process. 1 to FIG.
Is a semiconductor silicon substrate, 2, 8, 10, 16, and 18 are silicon oxide films, 3 is a polysilicon film (doped polysilicon), 4 is a silicide film (tungsten silicide), 6, 17 are silicon nitride films, 7, Reference numeral 11 denotes a photoresist (resist pattern), 12 denotes a contact on the active region, 13 denotes a contact on the electrode, 14 denotes a wiring, A denotes a region for forming a contact in the active region, and B denotes a region for forming a contact on the electrode.

(First Embodiment) Next, a first embodiment of the present invention will be described.
The method of manufacturing the semiconductor device according to the embodiment will be described with reference to FIGS. The ion implantation step is omitted.

First, a film having a thickness of about 1
A silicon oxide film 2 of 0 nm, a polysilicon film 3 of about 100 nm thickness made of doped polysilicon, a silicide film 4 of about 100 nm thickness of tungsten silicide (WSi), and a silicon nitride film 6 of about 20 nm thickness are sequentially formed. After the formation, a photo step of an electrode is performed (FIG. 1).

Next, using the resist pattern 7 as a mask, the silicon nitride film 6 is etched with a gas such as CHF ₃ , CF ₄ , Ar, O ₂ , and then Cl ₂ , N ₂ , HB
After etching the silicide film 4, the polysilicon film 3, and the silicon oxide film 2 with a gas such as r and O ₂ , the resist pattern 7 is removed by ashing.

Next, a silicon oxide film 8 (HTO film) is formed, and the entire surface of the silicon oxide film 8 is etched back with a gas such as CHF ₃ , CF ₄ , or Ar. The entire etch back is stopped in a state where the silicon oxide film 8 is left (several tens nm) so that the silicon nitride film 6 on the electrode is not exposed. This is because, when the entire surface of the silicon oxide film 8 is etched back, the silicon nitride film 6 (film thickness: 20 nm) on the electrode is formed.
This is to prevent the etching of.

The stopping of the etching can be monitored by measuring the oxide film thickness on the active region. If a silicon nitride film appears during etching of the silicon oxide film, the film is somewhat reduced.

Next, using a chemical such as HF, the silicon oxide film 8 (several tens of nm) left during the entire etch back is removed, and immersion treatment is performed until the surface of the silicon nitride film 6 on the electrodes is exposed. (FIG. 2).

Next, a silicon oxide film 16 is formed to a thickness of about 20 nm by thermal oxidation. The silicon oxide film 16 has an intended thickness (about 20 nm) on the active region and the silicon nitride film 6 is exposed on the electrode, so that the silicon oxide film 16 is hardly formed (film thickness 1). ２2 nm).

Next, a silicon nitride film 1 having a thickness of about 10 nm
7 is formed. The pretreatment for forming the silicon nitride film 17 is performed by using a chemical solution such as HF to form the silicon oxide film 16
(1 to 2 nm) is removed, and immersion treatment is performed until the surface of the silicon nitride film 6 is exposed (FIG. 3). After the formation of the silicon nitride film 17 (about 10 nm), the silicon nitride film thickness on the active region is about 10 nm, and the silicon nitride film thickness on the electrode is about 30 nm.

Next, the silicon oxide film 18 (about 100 n
m), silicon oxide film 10 (BPSG film)
Is formed, and a flattening process such as a melt process is performed. Under the conditions of the present silicon oxide film 10 (BPSG film) formation and planarization processing, the surface of the silicon oxide film 10 (BPSG film)
It becomes almost flat, and the silicon oxide film thickness (BPSG film thickness) on the active region is about 770 nm, and the silicon oxide film thickness (BPSG film thickness) on the electrode is about 560 nm.

Next, a contact photo step is performed. The contact pattern is formed on the active region and on the electrode (FIG. 4). At this point, the difference in film thickness between the active region (on the surface of the silicon substrate 1, about 900 nm) and the electrode (on the silicide, about 690 nm) is about 210 nm.
That is the difference in film thickness of the silicon oxide film 10 (BPSG film).

Next, using the resist pattern 11 as a mask, a silicon oxide film 10 (BPSG) having a film thickness of about 770 nm on the active region is formed by using a gas such as CHF ₃ , CF ₄ , or Ar.
Film), a silicon oxide film 18 having a thickness of about 100 nm, a silicon nitride film 17 having a thickness of about 10 nm, and a silicon oxide film 16 having a thickness of about 20 nm are formed on the electrode by a silicon oxide film 10 (BPSG film) having a thickness of about 560 nm. ), A silicon oxide film 18 having a thickness of about 100 nm, and a silicon nitride film 1 having a thickness of about 30 nm.
7 and 6 are respectively etched. The etching selectivity (BPSG film / silicon nitride film) between the silicon oxide film (BPSG film) and the silicon nitride film under this etching condition is about 10. As a result, the difference in the thickness of the silicon oxide film (BPSG film) (about 210 nm) is offset by the difference in the thickness of the silicon nitride film (about 20 nm). Contact holes 12, 13
Can be formed almost simultaneously. That is, one or both of the active region and the electrode are not over-etched (FIGS. 5 and 6). Next, after removing the resist pattern 11 by ashing, the wiring layer 14 is removed.
Is formed (FIG. 7).

(Second Embodiment) Next, a second embodiment of the present invention will be described.
The method of manufacturing the semiconductor device according to the embodiment will be described with reference to FIGS. The ion implantation step is omitted.

First, on a semiconductor silicon substrate 1, a silicon oxide film 2 of about 10 nm in thickness, a polysilicon film 3 of about 100 nm in thickness of doped polysilicon, and a film of tungsten silicide (WSi) of about 100 nm in thickness. 100n
After sequentially forming an m-silicide film 4 and a silicon nitride film 6 having a thickness of about 20 nm, a photo step of electrodes is performed (FIG. 8).

Next, using the resist pattern 7 as a mask, the silicon nitride film 6 is etched with a gas such as CHF ₃ , CF ₄ , Ar, O ₂ , and then Cl ₂ , N ₂ , HB
After etching the silicide film 4, the polysilicon film 3, and the silicon oxide film 2 with a gas such as r and O ₂ , the resist pattern 7 is removed by ashing.

Next, a silicon oxide film 8 (HTO film) is formed, and the entire surface of the silicon oxide film 8 is etched back with a gas such as CHF ₃ , CF ₄ , or Ar. The entire surface etch back is stopped in a state where the silicon oxide film 8 is left (several tens of nm) so that the silicon nitride film 6 on the electrode is not exposed. This is to prevent the silicon nitride film 6 having a thickness of about 20 nm on the electrode from being etched when the entire surface of the silicon oxide film 8 is etched back.

Next, a solution such as HF is used to remove the silicon oxide film 8 (several tens of nanometers) left during the etch-back process on the entire surface and to perform a liquid treatment until the surface of the silicon nitride film 6 on the electrodes is exposed. (FIG. 9).

Next, after forming a silicon oxide film 18 having a thickness of about 100 nm, the silicon oxide film 10 (BPSG film) is formed.
Is formed, and a flattening process such as a melt process is performed. Under the conditions of the present silicon oxide film 10 (BPSG film) formation and planarization processing, the surface of the silicon oxide film 10 (BPSG film)
It is almost flat, and the silicon oxide film thickness (BPSG film thickness) on the active region is about 770 nm, and the silicon oxide film thickness (BPSG film thickness) on the electrode is about 540 nm.

Next, a contact photo step is performed. The contact pattern is formed on the active region and on the electrode (FIG. 10).

Reference: At this point, the difference in film thickness between the active region (on the surface of the silicon substrate 1, about 870 nm) and the electrode (on silicide, about 660 nm) is about 210 nm, which is a silicon oxide film. This is almost the same as the thickness difference (about 230 nm) of 10 (BPSG film).

Next, using the resist pattern 11 as a mask, a silicon oxide film 10 (BPS) having a thickness of about 770 nm
G film) and a silicon oxide film 18 having a thickness of about 100 nm are formed on the electrode by a silicon oxide film 10 (BP
(SG film), a silicon oxide film 18 having a thickness of about 100 nm, and a silicon nitride film 6 having a thickness of about 20 nm are respectively etched. Silicon oxide film (BPS) under this etching condition
G film) and silicon nitride film (BPSG)
Film / silicon nitride film) is about 10.

As a result, the aforementioned difference in thickness of the silicon oxide film (BPSG film) (about 230 nm) is offset by the silicon nitride film 6 (about 20 nm) formed on the electrode, and as a result, the active region is formed. It is possible to form the contact holes 12 and 13 on the upper and the electrodes almost simultaneously. That is, either or both of the active region and the electrode are not over-etched (FIGS. 11 and 12).

Next, after removing the resist pattern 11 by ashing, a wiring layer 14 is formed (FIG. 13).

The present invention is not limited by the above-described embodiments. For example, even if the film thickness difference on the active region and the electrode and the etching conditions (etching rate) change, the wiring of the present invention is not changed. If it is a layer contact structure,
This can be achieved by adjusting the thickness of the silicon nitride film.

[0041]

As described in detail above, when the method of manufacturing a semiconductor device according to the present invention is used, unlike the prior art, the process is not complicated and the silicon on the electrode once formed is formed. The nitride film is over-etched before the contact etching step (before forming the contact), so that only over the electrode is not excessively over-etched during the contact etching.

Further, the silicon nitride film is not formed directly on the surface of the silicon substrate on the active region, so that the structure is not affected by stress or the like.

As described above, a semiconductor device having a stable wiring layer contact structure can be manufactured.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of a manufacturing step of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 3 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 4 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 5 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 6 is a partial cross-sectional view of the manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 7 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the first embodiment of the present invention;

FIG. 8 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 9 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 10 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the second embodiment of the present invention;

FIG. 11 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 12 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the second embodiment of the present invention;

FIG. 13 is a partial cross-sectional view of a manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 14 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 15 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 16 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 17 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 18 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 19 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 20 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 21 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

FIG. 22 is a partial cross-sectional view of a manufacturing step of a conventional semiconductor device.

[Explanation of symbols]

1, 21 semiconductor silicon substrate 2, 8, 10, 16, 18, 22, 25, 28, 30,
35 silicon oxide film 3, 23 polysilicon film (doped polysilicon) 4, 24 silicide film (tungsten silicide) 6, 17, 26, 29 silicon nitride film 7, 11, 27, 31 photoresist (resist pattern) 12, 32 Active area contact 13, 33 Electrode contact 14, 34 Wiring layer

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H01L 21/768 F term (Reference) 4M104 AA01 BB01 CC05 DD08 DD16 DD17 DD19 DD23 DD99 EE06 EE15 EE17 FF14 GG09 5F004 AA11 DA00 DA01 DA04 DA16 DA23 DA25 DA26 DB02 DB03 DB06 DB07 DB15 EA10 EA12 EA25 EA27 EA32. FA18 FA19 FC00 FC22 FC26 5F058 BC02 BC08 BD04 BD10 BE04 BF14 BH08 BH12 BH13 BJ02 BJ05 BJ07

Claims (2)

[Claims] A step of forming an active region and a gate electrode on a semiconductor silicon substrate; and forming a first silicon nitride film on the electrode to a thickness of a first silicon oxide film formed in a later step. Forming a thickness multiplied by an etching selectivity (first silicon nitride film / first silicon oxide film) of the first silicon nitride film and the first silicon oxide film; Forming a second silicon oxide film and sequentially performing dry etching and wet etching to remove only the second silicon oxide film and expose the surface of the first silicon nitride film formed on the electrode; A step of exposing a surface of the silicon substrate on the active region to form a sidewall on the electrode layer; and a step of forming a third silicon oxide film only on the active region by selective oxidation. Forming a second silicon nitride film and a first silicon oxide film in order, and planarizing the surface; and forming a third silicon oxide film, a second silicon nitride film, and a selective oxidation on the active region. Forming a first hole on the silicon substrate on the active region by selectively removing the second silicon oxide film, and forming a third silicon oxide film and a second silicon nitride film on the electrode; Forming a second hole on the electrode by selectively removing the film and the first silicon nitride film; and a first wiring filling and electrically connected to the first hole. Forming a layer, filling the second hole, and forming an electrically connected second wiring layer. 2. A step of forming an active region and a gate electrode on a semiconductor silicon substrate; and forming a first silicon nitride film on the electrode to a thickness of a first silicon oxide film formed in a later step. Forming a thickness multiplied by an etching selectivity (first silicon nitride film / first silicon oxide film) of the first silicon nitride film and the first silicon oxide film; Forming a silicon oxide film, performing dry etching and wet etching sequentially, thereby removing only the first silicon oxide film, exposing the surface of the first silicon nitride film formed on the electrode, A step of exposing a surface of the silicon substrate on the active region to form a sidewall on the electrode layer; and a step of forming a second silicon oxide film only on the active region by selective oxidation. Forming a third silicon oxide film and flattening the surface; selectively forming a third silicon oxide film, a second silicon nitride film, and a second silicon oxide film by selective oxidation on the active region. Forming a first hole on the silicon substrate on the active region, and removing a third silicon oxide film, a second silicon nitride film, and a first silicon nitride film on the electrode. Forming a second hole on the electrode by selectively removing; filling the first hole to form a first wiring layer electrically connected to the second hole; Filling the holes and forming an electrically connected second wiring layer.