JP2000164510A - Nitride III-V compound semiconductor substrate, method of manufacturing the same, semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-quality, large-area nitride-based III-V compound semiconductor substrate, a method of manufacturing the same, a semiconductor device having good characteristics using the same, and a method of manufacturing the same. SOLUTION: A nitride III-V compound semiconductor substrate is grown by growing an Al ₂ O ₃ crystal layer 2 on a Si substrate 1 and growing a nitride III-V compound semiconductor layer 4 thereon. To manufacture. The plane orientation of the Si substrate 1 is (11
1) or (100). Al ₂ O ₃ crystal layer 2 has γ
—Al ₂ O ₃ crystal layer or α-Al ₂ O ₃ crystal layer. The Al ₂ O ₃ crystal layer 2 may be a continuous film or an island shape. After manufacturing the substrate, the Si substrate 1 and the Al ₂ O ₃ crystal layer 2 may be removed. Another crystal substrate may be used instead of the Si substrate 1, and an amorphous substrate may be used instead of the crystal substrate. A GaN-based semiconductor laser and a GaN-based FET are manufactured using the nitride-based III-V compound semiconductor substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a -V compound semiconductor substrate, a method for manufacturing the same, a semiconductor device and a method for manufacturing the same, and is particularly suitable for application to a semiconductor laser, a light emitting diode, or an electron transit element using a nitride III-V compound semiconductor such as GaN. It is something.

[0002]

2. Description of the Related Art A nitride III-V group represented by GaN, comprising a group III element such as Al, Ga, and In and a group V element containing N as a light emitting material ranging from green or blue to the ultraviolet region. Semiconductor lasers and light emitting diodes using compound semiconductors have been developed. Of these, light emitting diodes have already been put to practical use. on the other hand,
In a semiconductor laser, although continuous oscillation at room temperature is realized, further improvement in crystallinity of a nitride III-V compound semiconductor is required for prolonging the life. A sapphire substrate is generally used as a growth substrate for the nitride III-V compound semiconductor, but in order to further improve the crystallinity of the nitride III-V compound semiconductor, ELOG-GaN (epitaxially) is used. latera
Technologies such as lly overgrown GaN) have also been applied and have shown their effects.

Further, the use of a GaN substrate is aimed at further improving the performance. Various methods have been proposed as a method of manufacturing a GaN substrate. In these methods, a GaN crystal is grown on a variety of crystal substrates, and then the substrate crystal is removed.
Manufactures N substrates. For example, G on a sapphire substrate
A method of removing the sapphire substrate after growing the aN layer (Japanese Patent Application Laid-Open No. 9-313417), or a method of growing a ZnO layer as an intermediate layer on a sapphire substrate and then forming a GaN
A method of chemically removing the ZnO layer after growing the layer (Japanese Patent Application Laid-Open No. 7-202265) is known.

[0004] As a method of producing a bulk crystal of GaN, a method of producing a GaN bulk crystal under a high-pressure nitrogen atmosphere of 10 to 20 kbar is used.
A method of growing from liquid Ga at a high temperature of 00 to 1600 ° C (J. Crystal Growth 166 (1996) 583), or growing by heating at 600 to 700 ° C by enclosing metallic gallium and sodium azide in a stainless steel tube. Flux method and sublimation method are also known.

On the other hand, as described above, a sapphire substrate is generally used as a substrate for manufacturing a semiconductor device using a nitride III-V compound semiconductor. In addition, a SiC substrate, a GaAs substrate, and a Si substrate are used. Substrates are also used. For example, a method of manufacturing a semiconductor device by sequentially growing Al and GaN on a Si substrate has been proposed (Japanese Patent Application Laid-Open No. 10-107317).
In addition, GaN-based crystals are grown after AlN, GaAs, Si ₃ N _4, etc. are grown on a Si substrate (Appl. Phys. Lett. 72 (1998) 551, Appl. Phys. Le.
tt. 69 (1996) 3566, Appl. Phys. Lett. 73 (1998) 827).

[0006]

However, in the method of growing a thick film of GaN on a heterogeneous substrate and then removing the substrate, generally, a thick film of Ga is formed due to a difference in coefficient of thermal expansion.
There is a problem that the heterogeneous substrate on which N is grown is greatly warped or broken. When a stable material such as a sapphire substrate or a SiC substrate is used,
It is very difficult to remove the substrate itself, and it is also difficult to remove the substrate uniformly over a wide area. In order to improve the productivity of the semiconductor device, it is desired to increase the area of the substrate. However, it is generally difficult to increase the diameter of these substrates. Further, these substrates are generally expensive. On the other hand, GaN
In a method of manufacturing a GaN substrate by growing a bulk crystal, it is difficult at present to obtain a uniform and large-area substrate. In addition, GaN is formed on a sapphire substrate via a ZnO layer.
After growing the layer, the ZnO layer is chemically removed to remove the GaN
In the method of manufacturing a substrate, high quality GaN is deposited on a ZnO layer.
There is a new need for the development of technologies that will grow.

Accordingly, an object of the present invention is to provide a nitride-based III-V compound capable of manufacturing a semiconductor device using a nitride-based III-V compound semiconductor having good characteristics with high productivity at low cost. It is an object of the present invention to provide a semiconductor substrate and a method for manufacturing the same, and a semiconductor device using such a nitride III-V compound semiconductor substrate and a method for manufacturing the same.

[0008]

Means for Solving the Problems The present inventor has made intensive studies in order to solve the above-mentioned problems of the prior art. The outline is described below.

In order to manufacture a semiconductor device using a nitride-based III-V compound semiconductor having good characteristics, a high-quality nitride-based III-V compound semiconductor substrate is required. In order to improve the performance, it is necessary to increase the area of the substrate. Meanwhile, a technique for growing a nitride III-V compound semiconductor such as GaN on a sapphire (α-Al ₂ O ₃ ) substrate has already been established.

[0010] Against this background, the present inventor:
In order to solve the above-described problems, Al ₂ O ₃ is epitaxially grown on another crystal substrate as a substrate on which a nitride-based III-V compound semiconductor crystal is grown, and a nitride-based III-V compound semiconductor is grown thereon. It has been concluded that it is effective to use a grown compound semiconductor. As this crystal substrate, a large-area and relatively inexpensive Si substrate can be used. A technique for epitaxially growing Al ₂ O ₃ on a Si substrate is already known (for example, Jpn.J. Ap
pl.Phys.34 (1995) 831), low pressure chemical vapor deposition (LPCV
The growth can be performed using the D) method or the metal organic molecular beam epitaxy (MOMBE) method. A substrate other than the Si substrate can be used as the crystal substrate. For example, in the case of a Ge substrate or a quartz (SiO ₂ crystal) substrate,
This can be realized by using a MOMBE technique or the like that can grow Al ₂ O _{3 at} a lower temperature. Alternatively, a material obtained by growing Al ₂ O ₃ on a sapphire substrate and growing a nitride III-V compound semiconductor on a clean surface thereof may be used. Furthermore, even if an amorphous substrate is used instead of the crystalline substrate, the crystalline A substrate can be crystallized by using the graphepitaxy technique.
It is possible to grow l ₂ O ₃ , on which a nitride-based III-V compound semiconductor crystal can be grown.

[0011] In this way a multilayer substrate manufactured by may be directly used as a nitride III-V compound semiconductor substrate, but the lower portion of the crystal substrate or a crystal substrate and Al ₂
The substrate from which O ₃ has been removed can be used as a nitride III-V compound semiconductor substrate. For example, when a Si substrate is used, it can be easily removed by chemical etching using a nitric acid-hydrofluoric acid-acetic acid solution or the like. Al ₂ O
₃ can also be easily removed using hot phosphoric acid or the like by controlling the thickness. Therefore,
There are basically no problems associated with substrate removal. Furthermore, by using a Si substrate or the like, a large-area nitride III-
It is possible to manufacture a group V compound semiconductor substrate.

By forming the multilayer structure on both sides of the crystal substrate, the substrate can be prevented from being curved. Further, by removing the central crystal substrate, two at a time
It is also possible to obtain three nitride III-V compound semiconductor substrates.

The nitride II produced as described above
By growing a nitride III-V compound semiconductor on an IV compound semiconductor substrate, a semiconductor device can be manufactured. In addition, conductive nitride III-V
Group III compound semiconductor substrate, and nitride III-
By manufacturing a semiconductor device by growing a group V compound semiconductor, an electrode can be taken out from the back surface of the substrate.

On the other hand, by using the Al ₂ O ₃ epitaxial layer in the middle of the nitride III-V compound semiconductor laminated structure, the crystal structure has a continuous epitaxial property, and is electrically connected between the upper and lower layers. It is also possible to manufacture another plurality of insulated semiconductor devices and a plurality of semiconductor devices that cooperate vertically (for example, those having a connection portion between the upper and lower semiconductor devices). In addition, Al ₂ O ₃
The epitaxial layer can also be used as a capacitor insulating film, a gate insulating film, or the like with less non-uniformity. For example, FE using a nitride III-V compound semiconductor
By epitaxially growing an Al ₂ O ₃ layer on the channel layer in T, it can be used as a crystalline gate insulating film. If necessary, a nitride-based III-V compound semiconductor layer can be further grown thereon.

In Jpn. J. Appl. Phys. 34 (1995) 831 described above, Al ₂ O _{3 to be} grown is γ-Al ₂ O ₃ (cubic spinel type). γ-Al ₂ O ₃ is 100
Α-Al ₂ O by heat treatment at a high temperature of 0 ° C. or higher.
_{Since a} phase transition to ₃ (trigonal corundum type) has also been reported, it can be used as α-Al ₂ O ₃ by heat treatment. In this case, the same manufacturing conditions as those when the sapphire substrate is used can be applied.

According to Appl. Phys. Lett. 52 (1988) 1672, on a Si (100) substrate, γ-Al ₂ O ₃
The (100) plane grows parallel to the substrate plane, and Si (111)
Since the γ-Al ₂ O ₃ (111) plane grows in parallel with the substrate surface on the substrate, the crystal orientation of Al ₂ O ₃ to be epitaxially grown by selecting the crystal orientation of the crystal substrate to be used, and furthermore, Is nitride III
-The crystal orientation of the group V compound semiconductor can be selected.

The present invention has been devised based on the above study by the present inventors. That is, in order to achieve the above object, a first invention of the present invention includes an Al ₂ O ₃ crystal layer epitaxially grown and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. A nitride-based III-V compound semiconductor substrate characterized by the above-mentioned.

According to a second aspect of the present invention, there is provided a crystal substrate, an Al ₂ O ₃ crystal layer epitaxially grown on the crystal substrate, and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. Characterized by having a nitride III-
It is a group V compound semiconductor substrate.

According to a third aspect of the present invention, there is provided a substrate having at least one main surface formed of an amorphous substrate and an A substrate grown on one main surface of the substrate.
l ₂ O ₃ crystal layer and nitride II on Al ₂ O ₃ crystal layer
A nitride III-V compound semiconductor substrate comprising an IV compound semiconductor layer.

According to a fourth aspect of the present invention, Al ₂
A method of manufacturing a nitride III-V compound semiconductor substrate, comprising growing an O ₃ crystal layer and growing a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. It is.

According to a fifth aspect of the present invention, there is provided a semiconductor device having an epitaxially grown Al ₂ O ₃ crystal layer and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. It is.

According to a sixth aspect of the present invention, there is provided a crystal substrate, an Al ₂ O ₃ crystal layer epitaxially grown on the crystal substrate, and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. A semiconductor device comprising:

According to a seventh aspect of the present invention, there is provided a substrate having at least one main surface formed of an amorphous substrate and an A substrate grown on one main surface of the substrate.
l ₂ O ₃ crystal layer and nitride II on Al ₂ O ₃ crystal layer
A semiconductor device having an IV group compound semiconductor layer.

An eighth aspect of the present invention is directed to a nitride type III
A wherein a with Al ₂ O ₃ crystal layer on -V compound semiconductor layer.

According to a ninth aspect of the present invention, Al ₂
A method of manufacturing a semiconductor device, comprising growing an O ₃ crystal layer and growing a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer.

According to a tenth aspect of the present invention, a nitride III-V compound semiconductor layer is grown on a substrate, and an Al ₂ O ₃ crystal layer is grown on the nitride III-V compound semiconductor layer. A method of manufacturing a semiconductor device, characterized in that the method is as described above.

In the present invention, the Al ₂ O ₃ crystal layer may be a continuous film or an island shape. Al ₂ O
Whether the _three crystal layers are formed as a continuous film or as an island is determined by Al ₂ O ₃
It can be controlled by the growth thickness of the crystal layer.

The Al ₂ O ₃ crystal layer may be a γ-Al ₂ O ₃ crystal layer or an α-Al ₂ O ₃ crystal layer. The γ-Al ₂ O ₃ crystal layer can be grown directly on the substrate. The α-Al ₂ O ₃ crystal layer may be grown directly on the substrate, but it is necessary to first grow the γ-Al ₂ O ₃ crystal layer on the substrate and perform a heat treatment at a temperature equal to or higher than the γ-α transition temperature. This γ-Al ₂ O ₃ crystal layer is converted to α-Al ₂ O ₃
It may be formed by phase transition to a crystal layer.

[0029] There is also growing the Al ₂ O ₃ crystal layer in the nitride based III-V compound semiconductor layer, the Al ₂
A nitride-based III-V compound semiconductor layer may be further grown on the O ₃ crystal layer.

An Al ₂ O ₃ crystal layer and a nitride III-V compound semiconductor layer may be sequentially grown on one main surface of the substrate, or an Al ₂ O ₃ crystal layer and a nitride The group III-V compound semiconductor layers may be grown sequentially. Although the substrate may be left as it is, A
After growing the l ₂ O ₃ crystal layer and the nitride III-V compound semiconductor layer, the layer may be removed by etching or the like. At this time, the Al ₂ O ₃ crystal layer may be removed in addition to the substrate. An Al ₂ O ₃ crystal layer and a nitride III-V compound semiconductor layer are sequentially grown on both main surfaces of the substrate, and then the substrate is removed.
A II-V compound semiconductor substrate can be obtained.

The substrate is preferably a crystal substrate, such as a Si substrate (especially one having a (001) plane orientation or a (111) plane orientation), an Al ₂ O ₃ crystal substrate, or a nitride III-
Group V compound semiconductor substrate, quartz substrate, GaAs substrate, Ge
A substrate or the like can be used. As the substrate, an amorphous substrate having at least one main surface may be used. In this case, A is formed thereon by using graphoepitaxy technology.
An l ₂ O ₃ crystal layer can be grown. This amorphous substrate may be entirely amorphous, may have an amorphous film formed on a crystalline substrate, or may have an amorphous surface of the crystalline substrate.

In the case of using Al ₂ O ₃ crystal substrate as a crystal substrate, Al ₂ O ₃ crystal layer is epitaxially grown surface of the Al ₂ O ₃ crystal substrate can be made to have an uneven structure. In this case, the concave portion of the surface, the Al ₂ O ₃ more crystal directions and crystal planes growth of nitride III-V compound semiconductor layer crystal layer in the grown Al ₂ O ₃ crystal substrate And thereby the crystal orientation relationship between the Al ₂ O ₃ crystal substrate and the nitride-based group III-V compound semiconductor grown thereon can be more accurately matched to each other. A system III-V compound semiconductor layer can be grown. From the viewpoint of more accurately matching the crystal orientation relationship between the Al ₂ O ₃ crystal substrate and the nitride III-V compound semiconductor grown thereon, at least a part of the inner surface of the concave portion on the surface is preferably used. An angle of at least 10 degrees is formed with respect to one main surface of the substrate. Regarding the size of the concave portion, from the same viewpoint, preferably, the depth is 25 nm or more and the width is 3
0 nm or more.

In the present invention, the nitride III-V compound semiconductor contains at least one group III element selected from the group consisting of Ga, Al, In and B and at least N, and optionally further contains As or It is composed of a group V element containing P, and specific examples include GaN, In
N, AlN, AlGaN, GaInN, AlGaInN
And so on.

In the present invention, the Al ₂ O ₃ crystal layer is grown by a low pressure chemical vapor deposition (LPCVD) method, a metal organic chemical vapor deposition (MOCVD) method, a metal organic molecular beam epitaxy (MOMBE) method, or the like. Can be used. Further, for growth of the nitride III-V compound semiconductor layer,
An organometallic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy (MBE) method, or the like can be used. The growth of the Al ₂ O ₃ crystal layer and the nitride III-V compound semiconductor layer is preferably performed successively in the same growth apparatus, but may be performed in separate growth apparatuses. . In the latter case, the transfer of the substrate between the growth apparatuses is preferably performed by vacuum transfer so that the substrate is not exposed to outside air and contaminated.

In the present invention, the semiconductor device may be basically any type. Specifically, the semiconductor device may be a light-emitting element such as a semiconductor laser or a light-emitting diode, or a light-emitting element.
An electron transit element such as an aN-based FET.

According to the present invention constructed as described above, a high quality nitride III-V is formed on the Al ₂ O ₃ crystal layer.
Since the group III compound semiconductor layer can be grown, a high quality nitride III-V compound semiconductor substrate can be obtained. In this case, a large-area nitride III-
A group V compound semiconductor substrate can be obtained at low cost. These substrates are easy to remove.

[0037]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a nitride III-V compound semiconductor substrate according to a first embodiment of the present invention.

As shown in FIG. 1, in the nitride III-V compound semiconductor substrate according to the first embodiment, a γ-Al ₂ O ₃ crystal layer 2 is laminated on a Si substrate 1, A nitride III-V compound semiconductor layer 4 is stacked on the Al ₂ O ₃ crystal layer 2 with a GaN buffer layer 3 interposed therebetween. In this case, the γ-Al ₂ O ₃ crystal layer 2
It has a thickness that becomes a continuous film, for example, a thickness of 5 nm to 1 μm. The γ-Al ₂ O ₃ crystal layer 2 and the GaN buffer layer 3
May be flat or may have irregularities. The Si substrate 1 has, for example, a (100) plane orientation or (11)
1) It has a plane orientation. The γ-Al ₂ O ₃ crystal layer 2 has, for example, a (100) plane orientation or a (111) plane orientation. γ
The relationship between the crystal orientation of the Al ₂ O ₃ crystal layer 2 and the Si substrate 1 is (10) when the Si substrate 1 has the (100) plane orientation.
0) γ-Al ₂ O ₃ // (100) Si and [1-1
0] γ-Al ₂ O ₃ // [1-10] Si, and Si
When the substrate 1 has the (111) plane orientation, (111) γ-A
l ₂ O ₃ // (111) Si and [1-1-2] γ-A
l ₂ O ₃ // [1-1-2] Si (Appl. Phys.
tt.52 (1988) 1672). The thickness of the GaN buffer layer 3 is, for example, 30 nm.

The nitride III according to the first embodiment
-To manufacture a group V compound semiconductor substrate, first, a chemically cleaned Si substrate 1 is placed in an LPCVD apparatus,
The substrate temperature is set to 900 to 1200 ° C., and the Si substrate 1
The γ-Al ₂ O ₃ crystal layer 2 is epitaxially grown thereon at a growth pressure of, for example, 25 Torr. This γ-Al ₂ O
The growth material of the _three- crystal layer 2 is, for example, trimethylaluminum (Al (CH ₃ ) ₃ , TMA) as an Al material
And dinitrogen monoxide (N ₂ O) is used as a raw material of O. Further, nitrogen (N ₂ ) is used as a carrier gas.

Next, after the Si substrate 1 on which the γ-Al ₂ O ₃ crystal layer 2 has been grown is vacuum-transported to an MOCVD apparatus, the substrate temperature is set to, for example, 520 ° C., and the γ-Al ₂ O ₃ crystal layer 2 A GaN buffer layer 3 is grown thereon by MOCVD. Next, the substrate temperature is raised to, for example, 1000 ° C., and the nitride III-V compound semiconductor layer 4 is epitaxially grown on the GaN buffer layer 3 by MOCVD.

The γ-Al ₂ O ₃ crystal layer 2 may be grown by, for example, the MOMBE method, and the nitride-based III-V compound semiconductor layer 4 may be grown by, for example, the MBE method. According to these methods, growth can be performed at a lower temperature.

According to the first embodiment, a large-diameter substrate can be easily obtained, and an inexpensive Si substrate 1 is used, on which a γ-Al ₂ O ₃ crystal layer 2 is interposed. III
Since the -V group compound semiconductor layer 4 is epitaxially grown, a large-area, high-quality nitride-based III-V compound semiconductor substrate can be obtained at low cost.

FIG. 2 shows a nitride III-V compound semiconductor substrate according to a second embodiment of the present invention.

As shown in FIG. 2, in the nitride III-V compound semiconductor substrate according to the second embodiment, an α-Al ₂ O ₃ crystal layer 5 is laminated on a Si substrate 1, A nitride III-V compound semiconductor layer 4 is stacked on the Al ₂ O ₃ crystal layer 5 with a GaN buffer layer 3 interposed therebetween. In this case, the α-Al ₂ O ₃ crystal layer 5
It has a thickness that becomes a continuous film, for example, a thickness of 5 nm to 1 μm. The α-Al ₂ O ₃ crystal layer 2 and the GaN buffer layer 3
May be flat or may have irregularities. The Si substrate 1 has, for example, a (100) plane orientation or (11)
1) It has a plane orientation. The α-Al ₂ O ₃ crystal layer 5 has, for example, a (0001) plane orientation. The thickness of the GaN buffer layer 3 is, for example, 30 nm.

The nitride III according to the second embodiment
-To manufacture a group V compound semiconductor substrate, first, a chemically cleaned Si substrate 1 is placed in an LPCVD apparatus,
The substrate temperature is set to 900 to 1200 ° C., and the Si substrate 1
A γ-Al ₂ O ₃ crystal layer is epitaxially grown thereon at a growth pressure of, for example, 25 Torr. This γ-Al ₂ O ₃
As the growth material for the crystal layer, the same material as in the first embodiment is used.

Next, the γ-Al ₂ O ₃ crystal layer is phase-transformed to the α-Al ₂ O ₃ crystal layer 5 by performing a heat treatment at a temperature of 1000 ° C. or higher.

Next, after the Si substrate 1 on which the α-Al ₂ O ₃ crystal layer 5 is laminated is vacuum-conveyed to the MOCVD apparatus, the substrate temperature is set to, for example, 520 ° C., and the α-Al ₂ O ₃ crystal layer 5 A GaN buffer layer 3 is grown thereon by MOCVD. Next, the substrate temperature is raised to, for example, 1000 ° C., and the nitride III-V compound semiconductor layer 4 is epitaxially grown on the GaN buffer layer 3 by MOCVD.

For the growth of the γ-Al ₂ O ₃ crystal layer, for example, M
The OMBE method may be used, and the growth of the nitride-based III-V compound semiconductor layer 4 may be performed by, for example, the MBE method. According to these methods, growth can be performed at a lower temperature.

According to the second embodiment, the same advantages as in the first embodiment can be obtained.

FIG. 3 shows a nitride III-V compound semiconductor substrate according to a third embodiment of the present invention.

As shown in FIG. 3, in the nitride III-V compound semiconductor substrate according to the third embodiment, the γ-Al ₂ O ₃ crystal layer 2 laminated on the Si substrate 1 is used.
Has an island shape. In this case, the γ-Al ₂ O ₃
The crystal layer 2 does not become a continuous film but has a thickness that becomes an island-shaped growth film, for example, a thickness of less than 5 nm. Other points are the same as those of the first embodiment, and the description is omitted.

The nitride III according to the third embodiment
Since the method for manufacturing the -V group compound semiconductor substrate is the same as that of the first embodiment, the description is omitted.

According to the third embodiment, the same advantages as in the first embodiment can be obtained.

FIG. 4 shows a nitride III-V compound semiconductor substrate according to a fourth embodiment of the present invention.

As shown in FIG. 4, in the nitride III-V compound semiconductor substrate according to the fourth embodiment, the α-Al ₂ O ₃ crystal layer 5 laminated on the Si substrate 1 is formed.
Has an island shape. In this case, the α-Al ₂ O ₃
The crystal layer 5 does not become a continuous film but has a thickness that becomes an island-shaped growth film, for example, a thickness of less than 5 nm. Other points are the same as those of the first embodiment, and the description is omitted.

The nitride III according to the fourth embodiment
Since the method for manufacturing the -V group compound semiconductor substrate is the same as that of the first embodiment, the description is omitted.

According to the fourth embodiment, the same advantages as in the first embodiment can be obtained.

Next, a method of manufacturing a nitride III-V compound semiconductor substrate according to a fifth embodiment of the present invention will be described.

As shown in FIG. 5, in the fifth embodiment, a γ-Al ₂ O ₃ crystal layer 2, a GaN buffer layer 3 and a nitride III-V compound semiconductor layer 4 is grown sequentially. These γ-Al ₂
O ₃ crystal layer 2, GaN buffer layer 3 and nitride II
The method of growing the group IV compound semiconductor layer 4 is the same as in the first embodiment. In this case, the nitride-based III-V compound semiconductor layer 4 has a thickness sufficient to enable itself to be used as a substrate, for example, about 100 μm.

Next, the Si substrate 1 is removed by etching.
For the etching of the Si substrate 1, for example, a chemical etching method using a nitric acid-hydrofluoric acid-acetic acid solution or the like can be used. By this etching, two nitride III-V compound semiconductor layers 4 on both surfaces of the Si substrate 1 are obtained separately from each other. Next, nitride III-
Γ-Al ₂ O formed integrally with the group V compound semiconductor layer 4
_{The three} crystal layers 2 are removed by etching. This γ-Al ₂ O ₃
For etching the crystal layer 2, for example, a chemical etching method using hot phosphoric acid or the like can be used.

As described above, two nitride III-V compound semiconductor substrates composed of the nitride III-V compound semiconductor layer 4 can be simultaneously obtained.

According to the fifth embodiment, the same advantages as in the first embodiment can be obtained, and the nitride-based I
Since the productivity of the II-V compound semiconductor substrate is high, the advantage that the manufacturing cost can be significantly reduced can be obtained.

Next, a method of manufacturing a nitride III-V compound semiconductor substrate according to a sixth embodiment of the present invention will be described.

As shown in FIG. 6, in the sixth embodiment, after a γ-Al ₂ O ₃ crystal layer is grown on both surfaces of the Si substrate 1, the γ-Al ₂ O ₃ crystal layer is changed to α. -Al ₂
O ₃ crystal layer 5 is a phase transition, the alpha-Al ₂ O ₃ on the crystal layer 5, GaN buffer layer 3 and the nitride-based III-V
Group compound semiconductor layers 4 are sequentially grown. These γ-A
l ₂ O ₃ crystal layer, GaN buffer layer 3 and nitride-based I
The method of growing the II-V compound semiconductor layer 4 is the same as in the first embodiment. In this case, the nitride-based III-V compound semiconductor layer 4 has a thickness sufficient to enable itself to be used as a substrate, for example, about 100 μm.

Next, the Si substrate 1 is removed by etching.
For the etching of the Si substrate 1, for example, a chemical etching method using a nitric acid-hydrofluoric acid-acetic acid solution or the like can be used. By this etching, two nitride III-V compound semiconductor layers 4 on both surfaces of the Si substrate 1 are obtained separately from each other. Next, nitride III-
Α-Al ₂ O formed integrally with the group V compound semiconductor layer 4
_{The three} crystal layers 5 are removed by etching. This α-Al ₂ O ₃
For etching the crystal layer 5, for example, a chemical etching method using hot phosphoric acid or the like can be used.

As described above, two nitride III-V compound semiconductor substrates comprising the nitride III-V compound semiconductor layer 4 can be simultaneously obtained.

According to the sixth embodiment, the same advantages as those of the fifth embodiment can be obtained.

Next, a method of manufacturing a nitride III-V compound semiconductor substrate according to a seventh embodiment of the present invention will be described.

As shown in FIG. 7, in the seventh embodiment, a γ-Al ₂ O ₃ crystal layer 2 is formed on both surfaces of a Si substrate 1.
Is grown in an island shape, and a GaN buffer layer 3 and a nitride III-V compound semiconductor layer 4 are sequentially grown on the γ-Al ₂ O ₃ crystal layer 5. These γ-Al ₂
O ₃ crystal layer 2, GaN buffer layer 3 and nitride II
The method of growing the group IV compound semiconductor layer 4 is the same as in the first embodiment. In this case, the nitride-based III-V compound semiconductor layer 4 has a thickness sufficient to enable itself to be used as a substrate, for example, about 100 μm.

Next, the Si substrate 1 is removed by etching.
For the etching of the Si substrate 1, for example, a chemical etching method using a nitric acid-hydrofluoric acid-acetic acid solution or the like can be used. By this etching, two nitride III-V compound semiconductor layers 4 on both surfaces of the Si substrate 1 are obtained separately from each other. Next, nitride III-
Γ-Al ₂ O formed integrally with the group V compound semiconductor layer 4
_{The three} crystal layers 2 are removed by etching. This γ-Al ₂ O ₃
For etching the crystal layer 2, for example, a chemical etching method using hot phosphoric acid or the like can be used.

As described above, two nitride III-V compound semiconductor substrates composed of the nitride III-V compound semiconductor layer 4 can be simultaneously obtained.

According to the seventh embodiment, the same advantages as in the fifth embodiment can be obtained.

Next, a method of manufacturing a nitride III-V compound semiconductor substrate according to the eighth embodiment of the present invention will be described.

[0075] As shown in FIG. 8, in this eighth embodiment, after growing the islands of γ-Al ₂ O ₃ crystal layers on both sides of the Si substrate 1, the γ-Al ₂ O ₃ crystals Layer α-
The phase transition is made to the Al ₂ O ₃ crystal layer 5, and the α-Al ₂ O ₃
GaN buffer layer 3 and nitride-based II on crystal layer 5
Group IV compound semiconductor layers 4 are sequentially grown. The method of growing the γ-Al ₂ O ₃ crystal layer, the GaN buffer layer 3 and the nitride III-V compound semiconductor layer 4 is the same as in the first embodiment. In this case, the nitride III-V
The group IV compound semiconductor layer 4 has a thickness sufficient to use itself as a substrate, for example, about 100 μm.

Next, the Si substrate 1 is removed by etching.
For the etching of the Si substrate 1, for example, a chemical etching method using a nitric acid-hydrofluoric acid-acetic acid solution or the like can be used. By this etching, two nitride III-V compound semiconductor layers 4 on both surfaces of the Si substrate 1 are obtained separately from each other. Next, nitride III-
Γ-Al ₂ O formed integrally with the group V compound semiconductor layer 4
_{The three} crystal layers 2 are removed by etching. This γ-Al ₂ O ₃
For etching the crystal layer 2, for example, a chemical etching method using hot phosphoric acid or the like can be used.

As described above, two nitride III-V compound semiconductor substrates comprising the nitride III-V compound semiconductor layer 4 can be simultaneously obtained.

According to the eighth embodiment, the same advantages as in the fifth embodiment can be obtained.

FIG. 9 shows a nitride III-V compound semiconductor substrate according to a ninth embodiment of the present invention.

As shown in FIG. 9, in the nitride III-V compound semiconductor substrate according to the ninth embodiment, an α-Al ₂ O ₃ crystal layer 5 is laminated on a sapphire substrate 6. A nitride III-V compound semiconductor layer 4 on an Al ₂ O ₃ crystal layer 5 via a GaN buffer layer 3
Are laminated. In this case, the α-Al ₂ O ₃ crystal layer 5
Has a thickness of a continuous film, for example, a thickness of 5 nm to 1 μm. The interface between the α-Al ₂ O ₃ crystal layer 5 and the GaN buffer layer 3 may be flat or uneven. The sapphire substrate 6 has, for example, a (0001) plane (c
Plane), and the α-Al ₂ O ₃ crystal layer 5 also has the (0
001) plane (c-plane) orientation. In this case, the sapphire substrate 6 and the α-Al ₂ O ₃ crystal layer 5 are continuously connected crystallographically. The thickness of the GaN buffer layer 3 is, for example, 30 nm.

The nitride III according to the ninth embodiment
In order to manufacture a -V compound semiconductor substrate, first, a sapphire substrate 6 whose surface has been previously flattened and mirror-finished is placed in a reaction tube of a MOCVD apparatus (not shown),
The surface of the sapphire substrate 6 is thermally cleaned by performing a heat treatment at, for example, 1000 to 1300 ° C. in the reaction tube.

Next, after lowering the substrate temperature to, for example, 520 ° C., the GaN buffer layer 3 is grown on the α-Al ₂ O ₃ crystal layer 5. Next, the substrate temperature is raised to, for example, 1000 ° C., and the GaN buffer layer 3 is formed by MOCVD.
A nitride III-V compound semiconductor layer 4 is epitaxially grown thereon.

According to the ninth embodiment, the α-Al ₂ O ₃ crystal layer 5 is grown on the sapphire substrate 6 having a clean surface, and the nitride III-V compound semiconductor layer is formed on the clean surface. By growing the layer 4, the nitride-based III-V compound semiconductor layer 4 having good crystallinity can be obtained, and a high-quality nitride-based III-V compound semiconductor substrate can be obtained.

FIG. 10 shows a nitride III-V compound semiconductor substrate according to a tenth embodiment of the present invention.

As shown in FIG. 10, in the nitride III-V compound semiconductor substrate according to the tenth embodiment, an island-like α-Al ₂ O ₃ crystal layer 5 is laminated on a sapphire substrate 6. Ga on the α-Al ₂ O ₃ crystal layer 5
A nitride III-V compound semiconductor layer 4 is stacked with an N buffer layer 3 interposed therebetween. In this case, α-Al ₂ O ₃
Crystal layer 5 has an island-like thickness, for example, a thickness of less than 5 nm. The sapphire substrate 6 has, for example, a (0001) plane (c-plane) orientation, and the α-Al ₂ O ₃ crystal layer 5 also has a (0001) plane (c-plane) orientation. In this case, the sapphire substrate 6 and the α-Al ₂ O ₃ crystal layer 5 are continuously connected crystallographically. The thickness of the GaN buffer layer 3 is, for example, 30 nm.

The nitride type II according to the tenth embodiment
The method for manufacturing an IV group compound semiconductor substrate is the same as in the ninth embodiment, and a description thereof will be omitted.

According to the tenth embodiment, the same advantages as in the ninth embodiment can be obtained.

FIG. 11 shows a GaN-based semiconductor laser according to an eleventh embodiment of the present invention. This GaN-based semiconductor laser is an SCH (Separate Confinement Heterostructur).
e) It has a structure.

As shown in FIG. 11, in the GaN-based semiconductor laser according to the eleventh embodiment, the Si substrate 1
1, a γ-Al ₂ O ₃ crystal layer 12 is laminated. In this case, the γ-Al ₂ O ₃ crystal layer 12 has a thickness of a continuous film, for example, 5 nm to 1 μm. This γ
The interface between the Al ₂ O ₃ crystal layer 2 and the GaN buffer layer 3 may be flat or uneven. The Si substrate 11 has, for example, a (100) plane orientation or a (111) plane orientation. The γ-Al ₂ O ₃ crystal layer 12 is, for example, (10
It has a 0) plane orientation or a (111) plane orientation. γ-Al
The crystal orientation relationship between the ₂ O ₃ crystal layer 12 and the Si substrate 11 is (10) when the Si substrate 11 has the (100) plane orientation.
0) γ-Al ₂ O ₃ // (100) Si and [1-1
0] γ-Al ₂ O ₃ // [1-10] Si, and Si
When the substrate 11 has the (111) plane orientation, (111) γ-
Al ₂ O ₃ // (111) Si and [1-1-2] γ-
Al ₂ O ₃ // [1-1-2] Si (Appl. Phys.
Lett. 52 (1988) 1672). Then, on the γ-Al ₂ O ₃ crystal layer 12, via a GaN buffer layer 13, an undoped GaN layer 14, n-type GaN contact layer 15, n-type A
lGaN cladding layer 16, n-type GaN optical waveguide layer 17, G
a _1-x In _x N / Ga _1-y In _y N Multiple quantum well structure active layer 18, p-type AlGaN cap layer 19, p-type Ga
An N optical waveguide layer 20, a p-type AlGaN cladding layer 21, and a p-type GaN contact layer 22 are sequentially stacked. Here, when growing the p-type GaN optical waveguide layer 20, the p-type AlGaN cladding layer 21, and the p-type GaN contact layer 22 at a temperature of about 1000 ° C., the p-type AlGaN cap layer 19 is Ga _1-x In _x N The purpose of this is to prevent InN from decomposing from the active layer 18 having the / Ga _1-y In _y N multiple quantum well structure and to prevent overflow of electrons from the active layer 18.

The GaN buffer layer 13 has a thickness of, for example, 30
nm, and the undoped GaN layer 14 has a thickness of, for example, 1
μm. The n-type GaN contact layer 15 has a thickness of, for example, 4 μm, and is doped with, for example, Si as an n-type impurity. The n-type AlGaN cladding layer 16 has a thickness of, for example, 0.5 μm, and is doped with, for example, Si as an n-type impurity. The n-type GaN optical waveguide layer 17 has a thickness of, for example, 0.1 μm, and is doped with, for example, Si as an n-type impurity. The p-type AlGaN cap layer 19 has a thickness of, for example, 20 nm.
g is doped. The p-type GaN optical waveguide layer 20 has a thickness of, for example, 0.1 μm and has a thickness of, for example, M
g is doped. p-type AlGaN cladding layer 21
Has a thickness of, for example, 0.5 μm and is doped with, for example, Mg as a p-type impurity. Further, A of the n-type AlGaN cladding layer 16 and the p-type AlGaN cladding layer 21
The 1 composition ratio is, for example, 0.07, and the Al composition ratio of the p-type AlGaN cap layer 19 is, for example, 0.16. Ga _1-x I
_{n x N / Ga 1-y} In y N active layer 1 of a multiple quantum well structure
For example, x = 0.11, y = 0.01, G
The thicknesses of the a _1-x In _x N layer and the Ga _1-y In _y N layer are, for example, 3 nm and 6 nm, respectively, and the number of quantum wells is 4.

The upper part of the n-type GaN contact layer 15, n
-Type AlGaN cladding layer 16, n-type GaN optical waveguide layer 1
_{7, Ga 1-x In x} N / Ga 1-y In y N multi quantum well active layer structure 18, p-type AlGaN cap layer 19, p
-Type GaN optical waveguide layer 20, p-type AlGaN cladding layer 21
The p-type GaN contact layer 22 has a mesa shape having a predetermined width. The upper layer of the p-type AlGaN cladding layer 21 and the p-type GaN contact layer 2
2, a ridge portion having a predetermined width extending in one direction is formed. N-type Ga on the surface of the mesa portion and portions other than the mesa portion
An insulating film 23 such as a SiO ₂ film is provided on the surface of the N contact layer 15. In this insulating film 23,
An opening 23a is formed above the ridge portion, and an opening 2a is formed above the n-type GaN contact layer 15 adjacent to the mesa portion.
3b is provided. Then, the opening 23 of the insulating film 23 is formed.
The p-side electrode 24 is connected to the p-type GaN contact layer 22 through a.
Ohmic contact is provided. The p-side electrode 24 has, for example, a Ni / Pt / Au structure in which a Ni film, a Pt film, and an Au film are sequentially stacked. Further, the n-type GaN contact layer 15 is formed through the opening 23 b of the insulating film 23.
An n-side electrode 25 is provided thereon in ohmic contact. This n-side electrode 25 is made of, for example, a Ti film, an Al film,
Ti / Al / Pt / in which a Pt film and an Au film are sequentially laminated
It has an Au structure.

Next, the eleventh constructed as described above is used.
A method for manufacturing a GaN-based semiconductor laser according to the embodiment will be described.

That is, to manufacture this GaN-based semiconductor laser, first, a γ-Al ₂ O ₃ crystal layer 12 is epitaxially grown on a chemically cleaned Si substrate 11. The growth of the γ-Al ₂ O ₃ crystal layer 12 is performed in the same manner as in the first embodiment.

Next, the Si substrate 11 on which the γ-Al ₂ O ₃ crystal layer 12 has been grown is transported by vacuum to an MOCVD apparatus.
The substrate temperature is set to, for example, 520 ° C., and the GaN buffer layer 13 is formed on the γ-Al ₂ O ₃ crystal layer 12 by MOCVD.
Grow. Next, the substrate temperature is raised to, for example, 1000 ° C., and the GaN buffer layer 13 is formed by MOCVD.
Above, the undoped GaN layer 14, n-type GaN contact layer 15, n-type AlGaN cladding layer 16, n-type GaN optical waveguide layer _{17, Ga 1-x In x} N / Ga 1-y In y N multi quantum well structure The active layer 18, the p-type AlGaN cap layer 19, the p-type GaN optical waveguide layer 20, the p-type AlGaN cladding layer 21, and the p-type GaN contact layer 22 are sequentially grown. Here, Ga _1-x In _x N, which is a layer containing In, is used.
The growth of the active layer 18 having the / Ga _1-y In _y N multiple quantum well structure is performed at a substrate temperature of 700 to 800 ° C. As a growth material for these GaN-based semiconductor layers, for example, trimethylgallium (TM
G), trimethylaluminum (TMA) as a raw material for Al which is a group III element, and I
As a raw material for n, trimethylindium (TMI)
Ammonia (NH ₃ ) is used as a raw material for N which is a group V element.
Is used. As the carrier gas, for example, a mixed gas of hydrogen (H ₂ ) and nitrogen (N ₂ ) is used. As for the dopant, for example, monosilane (SiH ₄ ) is used as the n-type dopant, and methylcyclopentadienyl magnesium ((MCp) ₂ ) is used as the p-type dopant.
Mg).

Next, an SiO ₂ film having a thickness of, for example, 0.4 μm is formed on the entire surface of the p-type GaN contact layer 22 by, for example, a CVD method, a vacuum evaporation method, a sputtering method, or the like, and then lithography is performed on the SiO ₂ film. To form a resist pattern (not shown) having a predetermined shape, and using the resist pattern as a mask, the SiO ₂ film is etched by wet etching using, for example, a hydrofluoric acid-based etchant. Thereby, the p-type GaN contact layer 2
2, a mask (not shown) made of a SiO ₂ film is formed.

Next, using this mask, etching is performed by, for example, reactive ion etching (RIE) until the n-type GaN contact layer 15 is reached. At this time, for example, the n-type GaN contact layer 15 is etched by 0.5 μm. As the RIE etching gas, for example, a chlorine-based gas is used.

[0097] Next, after removing the etching mask, again the entire substrate surface, for example, a CVD method, a vacuum deposition method, after the example of thickness such as a sputtering method to form a SiO ₂ film of 0.2 [mu] m, the SiO ₂ film A resist pattern (not shown) of a predetermined shape is formed by lithography,
Using this resist pattern as a mask, for example, SiO
₂ Etch the film. Thus, a mask (not shown) made of the SiO ₂ film is formed on the surface of the substrate including the mesa.

Next, using this mask, a groove is formed by etching to a predetermined depth in the thickness direction of the p-type GaN contact layer 22 by, for example, RIE, thereby forming a ridge portion. As the RIE etching gas, for example, a chlorine-based gas is used.

Next, a resist pattern (not shown) is formed by lithography to cover the surface of the region excluding the n-side electrode formation region.

Next, by using the resist pattern as a mask, the insulating film 23 is etched to form the opening 23b.
To form

Next, a Ti film and an Al film are formed on the entire surface of the substrate by, for example, a vacuum evaporation method while the resist pattern is left.
After sequentially forming a film, a Pt film and an Au film, the resist pattern is removed together with the Ti film, Al film, Pt film and Au film formed thereon (lift-off). Thereby, the n-type Ga in the portion of the opening 23b of the insulating film 23 is formed.
An n-side electrode 25 having a Ti / Al / Pt / Au structure is formed on the N contact layer 15.

Next, for example, by performing a heat treatment at 800 ° C. for 10 minutes in a nitrogen gas atmosphere, the p-type AlG
aN cap layer 19, p-type GaN optical waveguide layer 20, p-type A
The p-type impurity doped in the lGaN cladding layer 21 and the p-type GaN contact layer 22 is electrically activated, and the n-side electrode 25 is alloyed.

Next, a resist pattern (not shown) is formed by lithography to cover the surface of the region excluding the ridge region.

Next, an opening 23a is formed by etching the insulating film 23 using the resist pattern as a mask, and the upper surface of the ridge portion is exposed.

Next, a resist pattern (not shown) is formed by lithography to cover the surface of the region excluding the p-side electrode formation region.

Next, after a Ni film, a Pt film and an Au film are sequentially formed on the entire surface of the substrate by, for example, a vacuum evaporation method, the resist pattern is removed together with the Ni film, the Pt film and the Au film formed thereon. Thus, the p-side electrode 24 having the Ni / Pt / Au structure is formed on the ridge.
Next, for example, at 600 ° C. in an N ₂ gas atmosphere,
By performing the heat treatment for 0 minutes, the alloy processing of the p-side electrode 24 is performed.

Thereafter, the Si substrate 11 on which the laser structure is formed as described above is processed into a bar shape to form both resonator end faces, and after coating the end faces, the bar is formed into chips. Thus, the intended GaN-based semiconductor laser having the ridge structure and the SCH structure is manufactured.

As described above, according to the eleventh embodiment, a large-diameter one can be easily obtained, and the inexpensive Si is used.
Since the GaN-based semiconductor layer forming the laser structure is epitaxially grown on the substrate 11 via the γ-Al ₂ O ₃ crystal layer 12 with high productivity, high performance, long life, and high reliability GaN-based semiconductor laser can be obtained at low cost.

FIG. 12 shows a GaN-based semiconductor laser according to a twelfth embodiment of the present invention. This GaN-based semiconductor laser has an SCH structure.

As shown in FIG. 12, the GaN-based semiconductor laser according to the twelfth embodiment is
An α-Al ₂ O ₃ crystal layer 26 is laminated instead of the γ-Al ₂ O ₃ crystal layer 12, and a G layer forming a laser structure thereon is formed.
Except that the aN-based semiconductor layer is laminated,
Has the same configuration as the GaN-based semiconductor laser according to the embodiment. In this case, the α-Al ₂ O ₃ crystal layer 26 has a thickness that becomes a continuous film, for example, a thickness of 5 nm to 1 μm.
The α-Al ₂ O ₃ crystal layer 26 and the GaN buffer layer 13
May be flat or may have irregularities. The α-Al ₂ O ₃ crystal layer 26 has, for example, a (0001) plane orientation.

Since the method for manufacturing the GaN-based semiconductor laser is the same as the method for manufacturing the GaN-based semiconductor laser according to the eleventh embodiment, the description is omitted.

According to the twelfth embodiment, the same advantages as in the eleventh embodiment can be obtained.

FIG. 13 shows a GaN-based semiconductor laser according to a thirteenth embodiment of the present invention. This GaN-based semiconductor laser is of a refractive index guided type and has an SCH structure.

As shown in FIG. 13, in the GaN-based semiconductor laser according to the thirteenth embodiment, for example, an n-type AlGaN cladding layer 32 and an n-type GaN optical waveguide layer are formed on an n-type GaN substrate 31 having a c-plane orientation. 33, Ga _1-x In _x N
/ Ga _1-y In _y N Multiple quantum well structure active layer 34, p
-Type AlGaN cap layer 35, p-type GaN optical waveguide layer 3
6. A p-type AlGaN cladding layer 37 and a p-type GaN contact layer 38 are sequentially laminated. p-type AlGaN
The upper layer of the cladding layer 37 and the p-type GaN contact layer 38 have a ridge shape of a predetermined width extending in one direction.
An n-type AlGaN current confinement layer 39 is embedded in both sides of the ridge. And these p-type Ga
N contact layer 38 and n-type AlGaN current confinement layer 3
On p. 9, a p-side electrode 40 is provided in ohmic contact with the p-type GaN contact layer 38. On the other hand, n-type G
An n-side electrode 41 is provided on the back surface of the aN substrate 31 in ohmic contact. The other points are the same as those of the GaN-based semiconductor laser according to the eleventh embodiment, and a description thereof will not be repeated.

Next, the thirteenth constructed as described above is used.
A method for manufacturing a GaN-based semiconductor laser according to the embodiment will be described.

To manufacture the GaN-based semiconductor laser according to the thirteenth embodiment, first, an α-Al ₂ O ₃ crystal layer is formed on a Si substrate (not shown) in the same manner as in the second embodiment. MOCVD is formed on the α-Al ₂ O ₃ crystal layer.
An n-type GaN layer is grown via a GaN buffer layer by a method. This n-type GaN layer has a thickness sufficient to enable itself to be used as a substrate, for example, 100 μm.
Grow more. Next, a Si substrate and α-Al ₂ O
_{The three} crystal layers are removed by etching. The n-type GaN layer thus obtained becomes the n-type GaN substrate 31.

Next, on this n-type GaN substrate 31, MO
By CVD, n-type AlGaN cladding layer 32, n-type GaN optical waveguide layer _{33, Ga 1-x In x} N / Ga 1-y In
_y N multiple quantum well structure active layer 34, p-type AlGaN cap layer 35, p-type GaN optical waveguide layer 36, p-type AlGa
The N cladding layer 37 and the p-type GaN contact layer 38 are sequentially grown epitaxially.

Next, after forming a stripe-shaped resist pattern (not shown) on the p-type GaN contact layer 38 by lithography, using the resist pattern as a mask, the thickness of the p-type AlGaN cladding layer 37 is formed by, eg, RIE. Etching is performed to a certain depth in the direction. Thereby, a ridge portion is formed. Next, the n-type A is formed on both sides of the ridge portion by a selective growth technique or the like.
The 1GaN current confinement layer 39 is buried.

Next, a p-side electrode 40 is formed on the entire surface of the p-type GaN contact layer 38 and the n-type AlGaN current confinement layer 39, and an n-side electrode 41 is formed on the back surface of the n-type GaN substrate 31.

Thereafter, the n-type GaN substrate 31 on which the laser structure has been formed as described above is processed into a bar shape to form both resonator end faces, and after coating the end faces,
This bar is chipped. Thus, the intended GaN-based semiconductor laser having the ridge structure and the SCH structure is manufactured.

According to the thirteenth embodiment, in addition to the same advantages as the eleventh embodiment, the substrate is made of a conductive n-type G type.
The use of the aN substrate 31 has an advantage that the n-side electrode 41 can be taken out from the back surface of the substrate. For this reason, AlGaAs-based semiconductor lasers and Al
An assembly process similar to that of a GaInP-based semiconductor laser or the like can be used, and a dedicated assembling apparatus is not required, and the same package can be used.
As a result, the number of manufacturing steps of the GaN-based semiconductor laser can be reduced, and the manufacturing cost can be reduced.

Next, a GaN-based FET according to a fourteenth embodiment of the present invention will be described. FIG.
3 shows an s-system FET.

As shown in FIG. 14, in the GaN-based FET according to the fourteenth embodiment, a γ-Al ₂ O ₃ crystal layer 52 is laminated on a Si substrate 51. In this case, the γ-Al ₂ O ₃ crystal layer 52 has a thickness that becomes a continuous film, for example, a thickness of 5 nm to 1 μm. Si substrate 5
1 has, for example, a (100) plane orientation or a (111) plane orientation. The γ-Al ₂ O ₃ crystal layer 52 is, for example, (100)
It has a plane orientation or a (111) plane orientation. γ-Al ₂ O
The relationship between the crystal orientation of the _three- crystal layer 52 and the Si substrate 51 is S
If the i-substrate 51 has the (100) plane orientation, (100) γ
—Al ₂ O ₃ // (100) Si and [1-10] γ-
Al ₂ O ₃ // [1-10] Si, and the Si substrate 51
Is (111) plane orientation, (111) γ-Al ₂ O
₃ // (111) Si and [1-1-2] γ-Al ₂ O
₃ /// [1-1-2] Si. And this γ-A
an Al _x Ga ₁ -xN layer 54 (0 ≦ x ≦ 1) on the l ₂ O ₃ crystal layer 52 via a GaN buffer layer 53;
Al _y Ga _1-y N layer 55 (where, 0 <y ≦ 1), n -type Al _z Ga _1-z N layer 56 (where, 0 ≦ z ≦ 1), an undoped Al _z Ga _1-z N layer 57 (However, 0 ≦ z ≦
1), an undoped Ga _1-u In u N layer 58 (where 0
≦ u ≦ 1) and γ-Al ₂ O ₃ crystal layer 59 are sequentially stacked. Here, the Al _y Ga _1-y N layer 55 is a barrier layer, the n-type Al _z Ga _1-z N layer 56 is an electron supply layer, the undoped Al _z Ga _1-z N layer 57 is a spacer layer, and the undoped Ga _{1- u} In _u N layer 58 is an electron transit layer, γ-Al ₂ O ₃
Crystal layer 59 forms a gate insulating film. The thickness of the undoped Ga _1-u In u N layer 58 is, for example, 1nm or 15nm or less, preferably to 2nm or 10nm or less. The doping concentration of the n-type Al _z Ga _{1 -zN} layer 56 as the electron supply layer is, for example, 1.0 × 10 ¹⁹ cm ⁻³ .
Also, the impurity concentration of the n-type Al _z Ga _{1 -z} N layer 56 ×
The thickness product is 5 × 10 ¹⁸ [cm ⁻³ ] [nm] or more and 1 × 10 ^21.
[Cm ⁻³ ] [nm] or less, preferably 5 × 10 ¹⁹ [cm]
⁻³ ] [nm] or more and 5 × 10 ²⁰ [cm ⁻³ ] [nm] or less.

A gate electrode 60 is provided on a γ-Al ₂ O ₃ crystal layer 59 as a gate insulating film. As the gate electrode 60, for example, a Ti / Au film, Ti / Pt
/ Au film, Ti / W film or the like can be used. Further, an undoped Ga _1-u In _u N layer 58 source electrode 61 and drain electrode 62 on the portion of γ-Al ₂ O ₃ crystal layer 59 is exposed by removing is provided by ohmic contact.

This GaN-based F having the above-described configuration
The ET has a metal-insulator-semiconductor (MIS) structure and a high electron mobility transistor (HEMT).
r) It has a structure. FIG. 15 shows an energy band diagram, particularly a conduction band, of the GaN-based FET under the flat band condition. ΔE _c1 , ΔE _c2 , ΔE _c3 and ΔE _c5 are energy discontinuities existing at each heterojunction interface. The areal density of electrons in the undoped Ga _{1-u InuN} layer 58 immediately below the gate electrode 60 is, for example, 2.0 × 10 ¹³ cm ⁻² . 14 shows the path of the electron in the undoped Ga _1-u In _u N layer 58 as an electron transit layer by arrows. In addition, undoped Ga _1-u
The area where electrons are present in the In _u N layer 58 is stippled.

Next, the GaN thus constructed is
A method for manufacturing a system FET will be described.

That is, in order to manufacture this GaN-based FET, first, a γ-type FET was placed on a chemically cleaned Si substrate 51.
An Al ₂ O ₃ crystal layer 52 is epitaxially grown. The growth of the γ-Al ₂ O ₃ crystal layer 52 is performed in the same manner as in the first embodiment.

Next, the Si substrate 51 on which the γ-Al ₂ O ₃ crystal layer 52 has been grown is vacuum-transported to an MOCVD apparatus.
The substrate temperature is set to, for example, 520 ° C., and the GaN buffer layer 53 is formed on the γ-Al ₂ O ₃ crystal layer 52 by MOCVD.
Grow. Next, the substrate temperature is raised to, for example, 1000 ° C., and the GaN buffer layer 53 is formed by MOCVD.
On top of this, an Al _x Ga _1-x N layer 54 and an Al _y Ga _1-y N layer 5
5, n-type Al _z Ga _{1 -z} N layer 56, undoped Al _z G
a _1-z N layer 57 and the undoped Ga _1-u In u N layer 5
8 are grown sequentially.

Next, the undoped Ga _1-u In _u N layer 58
A γ-Al ₂ O ₃ crystal layer 59 is epitaxially grown thereon. The γ-Al ₂ O ₃ crystal layer 59 is grown in the same manner as the γ-Al ₂ O ₃ crystal layer 2 in the first embodiment.

Next, a gate electrode 60 is formed on the γ-Al ₂ O ₃ crystal layer 59 by a lift-off method or the like.

Next, a resist pattern (not shown) having openings corresponding to the source electrode and drain electrode formation portions is formed on the surface on which the gate electrode 60 is formed as described above by lithography. an undoped Ga _1-u in u N layer 58 is partially exposed by etching a γ-Al ₂ O ₃ crystal layer 59 using the resist pattern as a mask. For the etching of the γ-Al ₂ O ₃ crystal layer 59, for example, a chemical etching method using hot phosphoric acid or the like can be used.

Next, after forming a metal film for forming a source electrode and a drain electrode on the entire surface by, for example, a vacuum evaporation method, the resist pattern is removed together with the metal film formed thereon. Thereby, undoped Ga _1-u In
_{u A} source electrode 61 and a drain electrode 62 are formed on the N layer 58.
Is formed, and a target GaN-based FET is manufactured.

According to the fourteenth embodiment, Japanese Patent Application No.
Similar high G _m and the proposed GaN-based FET in No. -104609 (transconductance), can be manufactured at low cost with high productivity performance GaN-based FET of the high-frequency high-power high f _T (cutoff frequency) .

FIG. 16 shows a GaN-based FET according to the fifteenth embodiment of the present invention.

As shown in FIG. 16, the GaN-based FET according to the fifteenth embodiment has a γ-A
Instead of the l ₂ O ₃ crystal layer 52, the α-Al ₂ O ₃ crystal layer 6
3 has a configuration similar to that of the GaN-based FET according to the fourteenth embodiment, except that a GaN-based semiconductor layer forming an FET structure is laminated thereon. In this case, the α-Al ₂ O ₃ crystal layer 63 has a thickness that becomes a continuous film, for example, a thickness of 5 nm to 1 μm. This α-A
The interface between the l ₂ O ₃ crystal layer 63 and the GaN buffer layer 53 may be flat or uneven. α-Al
_{The 2} O ₃ crystal layer 63 has, for example, a (0001) plane orientation.

Since the method of manufacturing the GaN-based FET is the same as the method of manufacturing the GaN-based semiconductor laser according to the fourteenth embodiment, the description will not be repeated.

According to the fifteenth embodiment, advantages similar to those of the fourteenth embodiment can be obtained.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above embodiments, and various modifications based on the technical concept of the present invention are possible.

For example, the numerical values, structures, raw materials, processes, and the like described in the above-described first to fifteenth embodiments are merely examples, and if necessary, different numerical values,
Structures, raw materials, processes and the like may be used.

In the embodiments except the thirteenth embodiment, a GaN buffer layer is grown as a buffer layer. However, the buffer layer is generally made of Al _x Ga.
_1-xy In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y
≦ 1) layers can be used.

In the fourteenth and fifteenth embodiments, the γ-Al ₂ O ₃ crystal layer 59 is used as a gate insulating film. However, as shown in FIGS. it may be used -al ₂ O ₃ crystal layer 64. The α-Al ₂ O ₃ crystal layer 64 may be directly grown, or may be formed by growing a γ-Al ₂ O ₃ crystal layer and then performing a phase transition on the γ-Al ₂ O ₃ crystal layer. Is also good.

Further, in the above-described eleventh to thirteenth embodiments, the case where the present invention is applied to the GaN-based semiconductor laser having the SCH structure has been described.
The present invention can also be applied to a GaN-based semiconductor laser having a DH (Double Heterostructure) structure. Further, a single quantum well structure may be used as the active layer. The laser structure includes a ridge waveguide type, an internal current confinement type, a structure substrate type, and a longitudinal mode control type (distributed feedback (DFB) type or distributed Bragg type) for realizing a gain guided type or index guided type semiconductor laser. Various types such as a reflection (DBR) semiconductor laser) can be used. Further, the present invention relates to Ga
It can also be applied to N-based light emitting diodes.

[0143]

As described above, according to the nitride-based III-V compound semiconductor substrate of the present invention, a high-quality nitride-based II-II is formed on the Al ₂ O ₃ crystal layer grown on the substrate.
A high-quality, large-area nitride can be obtained by growing an IV compound semiconductor layer and using an inexpensive Si substrate or the like from which a large-diameter substrate can be easily obtained. A system III-V compound semiconductor substrate can be obtained at low cost.

The nitride III-V according to the present invention
According to the method for manufacturing a group III compound semiconductor substrate,
By growing a ₂ O ₃ crystal layer and growing a nitride III-V compound semiconductor layer on this Al ₂ O ₃ crystal layer, a high quality nitride III-V compound semiconductor layer can be formed. A high-quality, large-area nitride-based III-V compound semiconductor substrate can be grown by using an inexpensive Si substrate or the like that can easily obtain a large-diameter substrate as the substrate. Can be manufactured at low cost.

Further, according to the semiconductor device of the present invention, a semiconductor device having good characteristics can be obtained at low cost by using a high-quality, large-area nitride-based III-V compound semiconductor substrate.

Further, according to the method of manufacturing a semiconductor device according to the present invention, a semiconductor device having good characteristics is manufactured at a high productivity and at a low cost by using a high-quality, large-area nitride-based III-V compound semiconductor substrate. can do.

[Brief description of the drawings]

FIG. 1 shows a nitride-based II according to a first embodiment of the present invention.
It is sectional drawing which shows an IV group compound semiconductor substrate.

FIG. 2 shows a nitride-based II according to a second embodiment of the present invention.
It is sectional drawing which shows an IV group compound semiconductor substrate.

FIG. 3 shows a nitride-based II according to a third embodiment of the present invention.
It is sectional drawing which shows an IV group compound semiconductor substrate.

FIG. 4 shows a nitride-based II according to a fourth embodiment of the present invention.
It is sectional drawing which shows an IV group compound semiconductor substrate.

FIG. 5 shows a nitride-based II according to a fifth embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of an IV group compound semiconductor substrate.

FIG. 6 shows a nitride-based II according to a sixth embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of an IV group compound semiconductor substrate.

FIG. 7 shows a nitride-based II according to a seventh embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of an IV group compound semiconductor substrate.

FIG. 8 shows a nitride-based II according to an eighth embodiment of the present invention.
It is sectional drawing for demonstrating the manufacturing method of an IV group compound semiconductor substrate.

FIG. 9 shows a nitride system II according to a ninth embodiment of the present invention.
It is sectional drawing which shows an IV group compound semiconductor substrate.

FIG. 10 is a sectional view showing a nitride III-V compound semiconductor substrate according to a tenth embodiment of the present invention.

FIG. 11 is a sectional view showing a GaN-based semiconductor laser according to an eleventh embodiment of the present invention;

FIG. 12 is a sectional view showing a GaN-based semiconductor laser according to a twelfth embodiment of the present invention.

FIG. 13 is a sectional view showing a GaN-based semiconductor laser according to a thirteenth embodiment of the present invention.

FIG. 14 is a sectional view showing a GaN-based FET according to a fourteenth embodiment of the present invention.

FIG. 15 is an energy band diagram of a GaN-based FET according to a fourteenth embodiment of the present invention.

FIG. 16 is a sectional view showing a GaN-based FET according to a fifteenth embodiment of the present invention.

FIG. 17 is a sectional view showing a GaN-based FET according to a sixteenth embodiment of the present invention;

FIG. 18 is a sectional view showing a GaN-based FET according to a seventeenth embodiment of the present invention.

[Explanation of symbols]

1, 11, 51 ... Si substrate, 2, 12, 52 ...
γ-Al ₂ O ₃ crystal layer, 4... nitride III-V compound semiconductor layer, 5, 26, 63, 64... α-Al
₂ O ₃ crystal layer, 31 ... n-type GaN substrate

 ────────────────────────────────────────────────── ─── Continued on the front page F term (reference) 5F045 AA04 AA05 AA06 AB09 AB14 AB17 AB18 AB37 AC01 AC08 AC12 AC15 AD09 AD13 AD14 AD15 AD16 AE23 AF02 AF03 AF04 AF07 AF09 AF13 AF20 BB08 CA05 CA07 CA10 CA12 DA51 DA53 DA55 HA14 HA16 HA22

Claims (88)

[Claims] 1. A nitride III-V semiconductor device comprising: an Al ₂ O ₃ crystal layer epitaxially grown; and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer.
Group V compound semiconductor substrate. 2. The nitride II according to claim 1, wherein the Al ₂ O ₃ crystal layer is a continuous film or an island shape.
Group IV compound semiconductor substrate. 3. The Al ₂ O ₃ crystal layer is γ-Al ₂ O ₃
The nitride-based III-V compound semiconductor substrate according to claim 1, wherein the substrate is a crystal layer. 4. The Al ₂ O ₃ crystal layer is formed of α-Al ₂ O ₃
The nitride-based III-V compound semiconductor substrate according to claim 1, wherein the substrate is a crystal layer. 5. The nitride III-V compound semiconductor substrate according to claim 1, further comprising an Al ₂ O ₃ crystal layer on said nitride III-V compound semiconductor layer. 6. A semiconductor device comprising: a crystal substrate; an Al ₂ O ₃ crystal layer epitaxially grown on the crystal substrate; and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. Nitride III-
Group V compound semiconductor substrate. 7. The nitride II according to claim 6, wherein the Al ₂ O ₃ crystal layer is a continuous film or an island shape.
Group IV compound semiconductor substrate. 8. The Al ₂ O ₃ crystal layer is γ-Al ₂ O ₃
7. The nitride III-V compound semiconductor substrate according to claim 6, wherein the substrate is a crystal layer. 9. The Al ₂ O ₃ crystal layer is α-Al ₂ O ₃
7. The nitride III-V compound semiconductor substrate according to claim 6, wherein the substrate is a crystal layer. 10. The nitride III-V compound semiconductor substrate according to claim 6, wherein said crystal substrate is a Si substrate. 11. The nitride III according to claim 10, wherein said Si substrate has a (001) plane orientation.
A group V compound semiconductor substrate; 12. The nitride III according to claim 10, wherein said Si substrate has a (111) plane orientation.
A group V compound semiconductor substrate; 13. The nitride III- according to claim 6, wherein said crystal substrate is an Al ₂ O ₃ crystal substrate.
Group V compound semiconductor substrate. 14. The nitride I according to claim 13, wherein the surface of the Al ₂ O ₃ crystal substrate on which the Al ₂ O ₃ crystal layer is epitaxially grown has an uneven structure.
II-V compound semiconductor substrate. 15. The crystal substrate according to claim 6, wherein said crystal substrate is a nitride III-V compound semiconductor crystal substrate.
The nitride-based III-V compound semiconductor substrate according to the above. 16. The nitride-based III-V compound semiconductor substrate according to claim 6, wherein said crystal substrate is a quartz substrate. 17. The nitride III-V compound semiconductor substrate according to claim 6, further comprising an Al ₂ O ₃ crystal layer on said nitride III-V compound semiconductor layer. 18. A substrate having at least one principal surface amorphous, an Al ₂ O ₃ crystal layer grown on the one principal surface of the substrate, and a nitride III-V compound on the Al ₂ O ₃ crystal layer. A nitride III- having a semiconductor layer
Group V compound semiconductor substrate. 19. The nitride III-V compound semiconductor substrate according to claim 18, wherein said Al ₂ O ₃ crystal layer is a continuous film or an island shape. 20. The Al ₂ O ₃ crystal layer according to claim 1, wherein the γ-Al ₂ O
19. The nitride III-V compound semiconductor substrate according to claim 18, wherein the substrate is a _three crystal layer. 21. The Al ₂ O ₃ crystal layer is α-Al ₂ O
19. The nitride III-V compound semiconductor substrate according to claim 18, wherein the substrate is a _three crystal layer. 22. A nitride, wherein an Al ₂ O ₃ crystal layer is grown on a substrate, and a nitride III-V compound semiconductor layer is grown on the Al ₂ O ₃ crystal layer. A method for producing a system III-V compound semiconductor substrate. 23. The method according to claim 22, wherein the Al ₂ O ₃ crystal layer has a continuous film or an island shape. 24. The Al ₂ O ₃ crystal layer according to claim 1, wherein the γ-Al ₂ O
_The method for producing a nitride-based III-V compound semiconductor substrate according to claim 22, wherein the substrate is a _three- crystal layer. 25. The Al ₂ O ₃ crystal layer is α-Al ₂ O
_The method for producing a nitride-based III-V compound semiconductor substrate according to claim 22, wherein the substrate is a _three- crystal layer. 26. The method according to claim 22, wherein the substrate is a crystal substrate. 27. The method according to claim 26, wherein the crystal substrate is a Si substrate. 28. The nitride III according to claim 27, wherein said Si substrate has a (001) plane orientation.
-A method for producing a group V compound semiconductor substrate. 29. The nitride III according to claim 27, wherein said Si substrate has a (111) plane orientation.
-A method for producing a group V compound semiconductor substrate. 30. The nitride III according to claim 26, wherein the crystal substrate is an Al ₂ O ₃ crystal substrate.
-A method for producing a group V compound semiconductor substrate. 31. The nitride III-V compound semiconductor substrate according to claim 30, wherein the surface of the Al ₂ O ₃ crystal substrate on which the Al ₂ O ₃ crystal layer is grown has an uneven structure. Manufacturing method. 32. The crystal substrate according to claim 2, wherein the crystal substrate is a nitride III-V compound semiconductor crystal substrate.
7. The method for producing a nitride III-V compound semiconductor substrate according to item 6. 33. The method according to claim 26, wherein the crystal substrate is a quartz substrate. 34. The method according to claim 22, wherein at least one principal surface of the substrate is an amorphous substrate. 35. The nitride III-V compound semiconductor substrate according to claim 22, wherein said substrate is removed after said nitride III-V compound semiconductor layer is grown. Manufacturing method. 36. The method according to claim 22, wherein said substrate and said Al ₂ O ₃ crystal layer are removed after said nitride-based III-V compound semiconductor layer is grown.
A method for producing a nitride-based III-V compound semiconductor substrate according to the above. 37. The method according to claim 37, wherein the Al ₂ O _{3 is formed} on both main surfaces of the substrate.
3. A crystal layer and said nitride III-V compound semiconductor layer are sequentially grown.
3. The method for producing a nitride III-V compound semiconductor substrate according to item 2. 38. The method according to claim 37, wherein the substrate is removed after growing the Al ₂ O ₃ crystal layer and the nitride III-V compound semiconductor layer.
A method for producing a nitride-based III-V compound semiconductor substrate according to the above. 39. The Al ₂ O ₃ crystal layer and the nitride III-V compound semiconductor layer are grown using the same growth apparatus.
A method for producing a nitride-based III-V compound semiconductor substrate according to the above. 40. After growing the γ-Al ₂ O ₃ crystal layer on the substrate, the gamma-Al ₂ by heat treatment
The O ₃ crystal layer is a phase transition to the alpha-Al ₂ O ₃ crystal layer, and characterized in that so as to grow the nitride III-V compound semiconductor layer on the alpha-Al ₂ O ₃ crystal layer The method for producing a nitride III-V compound semiconductor substrate according to claim 22. 41. A semiconductor device comprising: an Al ₂ O ₃ crystal layer epitaxially grown; and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. 42. The semiconductor device according to claim 41, wherein said Al ₂ O ₃ crystal layer is a continuous film or an island shape. 43. The Al ₂ O ₃ crystal layer is γ-Al ₂ O
42. The semiconductor device according to claim 41, wherein the semiconductor device is a _three- crystal layer. 44. The Al ₂ O ₃ crystal layer is α-Al ₂ O
42. The semiconductor device according to claim 41, wherein the semiconductor device is a _three- crystal layer. 45. The semiconductor device according to claim 41, further comprising an Al ₂ O ₃ crystal layer on said nitride III-V compound semiconductor layer. 46. A semiconductor device comprising: a crystal substrate; an Al ₂ O ₃ crystal layer epitaxially grown on the crystal substrate; and a nitride III-V compound semiconductor layer on the Al ₂ O ₃ crystal layer. Semiconductor device. 47. The semiconductor device according to claim 46, wherein said Al ₂ O ₃ crystal layer has a continuous film or an island shape. 48. The Al ₂ O ₃ crystal layer is a γ-Al ₂ O
47. The semiconductor device according to claim 46, wherein the semiconductor device is a _three- crystal layer. 49. The Al ₂ O ₃ crystal layer is α-Al ₂ O
47. The semiconductor device according to claim 46, wherein the semiconductor device is a _three- crystal layer. 50. The semiconductor device according to claim 46, wherein said crystal substrate is a Si substrate. 51. The semiconductor device according to claim 50, wherein said Si substrate has a (001) plane orientation. 52. The semiconductor device according to claim 50, wherein said Si substrate has a (111) plane orientation. 53. The semiconductor device according to claim 46, wherein said crystal substrate is an Al ₂ O ₃ crystal substrate. 54. The semiconductor device according to claim 53, wherein the surface of the Al ₂ O ₃ crystal substrate on which the Al ₂ O ₃ crystal layer is epitaxially grown has an uneven structure. 55. The crystal substrate according to claim 4, wherein the crystal substrate is a nitride III-V compound semiconductor crystal substrate.
7. The semiconductor device according to 6. 56. The semiconductor device according to claim 46, wherein said crystal substrate is a quartz substrate. 57. The semiconductor device according to claim 46, wherein an Al ₂ O ₃ crystal layer is provided on the nitride III-V compound semiconductor layer. 58. A substrate having at least one main surface amorphous, an Al ₂ O ₃ crystal layer grown on the one main surface of the substrate, and a nitride III-V compound on the Al ₂ O ₃ crystal layer. A semiconductor device having a semiconductor layer. 59. The semiconductor device according to claim 58, wherein said Al ₂ O ₃ crystal layer is a continuous film or an island shape. 60. The Al ₂ O ₃ crystal layer is γ-Al ₂ O
59. The semiconductor device according to claim 58, wherein the semiconductor device is a _three- crystal layer. 61. The Al ₂ O ₃ crystal layer is α-Al ₂ O
59. The semiconductor device according to claim 58, wherein the semiconductor device is a _three- crystal layer. 62. A semiconductor device comprising an Al ₂ O ₃ crystal layer on a nitride III-V compound semiconductor layer. 63. The semiconductor device according to claim 62, wherein the Al ₂ O ₃ crystal layer has a continuous film or an island shape. 64. The Al ₂ O ₃ crystal layer is γ-Al ₂ O
63. The semiconductor device according to claim 62, wherein the semiconductor device is a _three- crystal layer. 65. The Al ₂ O ₃ crystal layer is α-Al ₂ O
63. The semiconductor device according to claim 62, wherein the semiconductor device is a _three- crystal layer. 66. A semiconductor device characterized in that an Al ₂ O ₃ crystal layer is grown on a substrate, and a nitride III-V compound semiconductor layer is grown on the Al ₂ O ₃ crystal layer. Manufacturing method. 67. The method according to claim 66, wherein the Al ₂ O ₃ crystal layer has a continuous film or an island shape. 68. The Al ₂ O ₃ crystal layer is γ-Al ₂ O
67. The method according to claim 66, wherein the semiconductor device is a _three- crystal layer. 69. The Al ₂ O ₃ crystal layer is α-Al ₂ O
67. The method according to claim 66, wherein the semiconductor device is a _three- crystal layer. 70. The method according to claim 66, wherein the substrate is a crystal substrate. 71. The method according to claim 70, wherein the crystal substrate is a Si substrate. 72. The method according to claim 71, wherein said Si substrate has a (001) plane orientation. 73. The method according to claim 71, wherein the Si substrate has a (111) plane orientation. 74. The method according to claim 70, wherein the crystal substrate is an Al ₂ O ₃ crystal substrate. 75. The method according to claim 74, wherein the surface of the Al ₂ O ₃ crystal substrate on which the Al ₂ O ₃ crystal layer is grown has an uneven structure. 76. The crystal substrate according to claim 7, wherein the crystal substrate is a nitride III-V compound semiconductor crystal substrate.
0. A method for manufacturing a semiconductor device according to item 0. 77. The method according to claim 70, wherein the crystal substrate is a quartz substrate. 78. The method according to claim 66, wherein said substrate is an amorphous substrate having at least one principal surface. 79. The method of manufacturing a semiconductor device according to claim 66, wherein said substrate is removed after said nitride-based III-V compound semiconductor layer is grown. 80. The method according to claim 66, wherein after growing said nitride-based III-V compound semiconductor layer, said substrate and said Al ₂ O ₃ crystal layer are removed.
The manufacturing method of the semiconductor device described in the above. 81. The method according to claim 81, wherein the Al ₂ O _{3 is formed} on both main surfaces of the substrate.
7. The semiconductor device according to claim 6, wherein a crystal layer and said nitride III-V compound semiconductor layer are sequentially grown.
7. The method for manufacturing a semiconductor device according to item 6. 82. The method according to claim 66, wherein the substrate is removed after growing the Al ₂ O ₃ crystal layer and the nitride III-V compound semiconductor layer.
The manufacturing method of the semiconductor device described in the above. 83. The semiconductor device according to claim 66, wherein the Al ₂ O ₃ crystal layer and the nitride III-V compound semiconductor layer are grown using the same growth apparatus.
The manufacturing method of the semiconductor device described in the above. 84. After growing the γ-Al ₂ O ₃ crystal layer on the substrate, the gamma-Al ₂ by heat treatment
The O ₃ crystal layer is a phase transition to the alpha-Al ₂ O ₃ crystal layer, and characterized in that so as to grow the nitride III-V compound semiconductor layer on the alpha-Al ₂ O ₃ crystal layer 67. The method of manufacturing a semiconductor device according to claim 66. 85. A nitride III-V compound semiconductor layer is grown on a substrate, and an Al ₂ O ₃ crystal layer is grown on the nitride III-V compound semiconductor layer. Manufacturing method of a semiconductor device. 86. The method of manufacturing a semiconductor device according to claim 85, wherein said Al ₂ O ₃ crystal layer is a continuous film or an island shape. 87. The Al ₂ O ₃ crystal layer is γ-Al ₂ O
_The method for manufacturing a semiconductor device according to claim 85, wherein the semiconductor device is a _three- crystal layer. 88. The Al ₂ O ₃ crystal layer is α-Al ₂ O
_The method for manufacturing a semiconductor device according to claim 85, wherein the semiconductor device is a _three- crystal layer.