JP2000164569A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) [PROBLEMS] To prevent oxidation of copper wiring without complicating the process when forming a multilayer structure having copper wiring. SOLUTION: After forming a connection hole by etching on a copper-based metal film, when removing the resist used for the etching, oxygen plasma etching is performed at a substrate temperature of -50 ° C to 50 ° C.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a wiring and a connection plug made of a copper-based metal film on a semiconductor substrate.

[0002]

2. Description of the Related Art A method of manufacturing a semiconductor device having copper wiring will be described with reference to FIGS.

[0003] First, a silicon oxide film 1, a silicon nitride film 2, and a silicon oxide film 3 are formed in this order on a semiconductor substrate (not shown) on which elements such as transistors are formed, and further patterned thereon in a predetermined shape. A resist 4 is provided (FIG. 4A).

Next, dry etching is performed using the resist 4 as a mask to form a groove for embedding a lower wiring in the silicon oxide film 3. At this time, the silicon nitride film 2 functions as an etching stopper. Subsequently, the resist 4 is stripped by ashing with oxygen plasma and washing with a stripping solution containing an amine compound (FIG. 4).
(B)).

Next, a TaN film as a barrier metal film is formed on the entire surface.
The film 5 is deposited by a sputtering method. Further, a copper film 6 is deposited thereon by a sputtering method to fill the groove (FIG. 4C). Next, CMP (Chemical Mechan)
Unnecessary TaN film 5 and copper film 6 formed outside the groove are removed by ical polishing (chemical mechanical polishing method) to complete the lower wiring (FIG. 4D).

After the lower wiring is formed, a silicon nitride film 7 and a silicon oxide film 8 are formed in this order, and a resist 9 patterned in a predetermined shape is provided thereon (FIG. 5).
(A)). Using the resist 9 as a mask, the silicon oxide film 8 is dry-etched until the silicon nitride film 7 is exposed to form an interlayer connection hole (FIG. 5B). The opening diameter of the interlayer connection hole is, for example, 0.25 μm. As the etching gas, a mixed gas containing C ₄ F ₈ , Ar, and O ₂ is used. Since this gas has a large etching rate with respect to the silicon oxide film 8 and the silicon nitride film 7 (silicon oxide film: silicon nitride film = 20: 1), the etching is stopped above the silicon nitride film 7.

Subsequently, the silicon nitride film 7 is dry-etched to expose the surface of the lower wiring (FIG. 5C).
A mixed gas of CHF ₃ and Ar is used as an etching gas. Subsequently, oxygen plasma ashing is performed to remove the resist 9 (FIG. 6A). The substrate temperature during ashing is 150 to 250 ° C., and the processing gas is oxygen gas. After the removal of the resist, a resist residue 11 remains on the silicon oxide film 8 and a deposit 12 adheres inside the interlayer connection hole. The deposit 12 is formed by reacting a resist material, copper, or the like with an etching gas (CHF ₃ -containing gas).

Next, the above-described resist residue 11 and deposit 1
In order to remove No. 2, cleaning is performed using a stripping solution (FIG. 6).
(B)). After that, a barrier metal film inside the interlayer connection hole,
An interlayer connection plug is completed by forming a buried conductive film and flattening the surface.

In the above-described example, the resist 9 is stripped off after the etching of the silicon nitride film 7 in FIG.
The peeling treatment may be performed at the stage (b). A second conventional technique according to such a method will be described with reference to the drawings.

First, an underline wiring is formed in the same manner as in FIGS. 4 (a) to 4 (d). After forming the lower wiring, the silicon nitride film 7,
A silicon oxide film 8 is formed in this order, and a resist 9 patterned in a predetermined shape is further provided thereon (FIG. 7).
(A)). Next, using the resist 9 as a mask, the silicon oxide film 8 is dry-etched until the silicon nitride film 7 is exposed, thereby forming an interlayer connection hole (FIG. 7B). The opening diameter of the interlayer connection hole is, for example, 0.25 μm. As an etching gas, a mixed gas containing C ₄ F ₈ , Ar and O ₂ is used.

In this state, the resist 9 is removed by oxygen plasma ashing. Substrate temperature during ashing is 15
The temperature is 0 to 250 ° C., and the processing gas is oxygen gas. After the removal of the resist, the resist residue 11 remains on the silicon oxide film 8 and the deposit 10 adheres inside the interlayer connection hole (FIG. 7C). Therefore, these resist residues 1
Cleaning is performed using a stripping solution to remove 1 and the deposit 10 (FIG. 8A).

Subsequently, the silicon nitride film 7 is dry-etched to expose the surface of the lower wiring (FIG. 8B).
A mixed gas of CHF ₃ and Ar is used as an etching gas.

After the dry etching, in order to remove the resist residues 11 and the deposits 12, cleaning is performed again using a stripping solution containing an amine compound (FIG. 8C). afterwards,
A barrier metal film and a buried conductive film are formed inside the interlayer connection hole, and the surface is flattened to complete the interlayer connection plug.

[0014]

However, in the above-mentioned prior art, there is room for improvement in the following points.

In the first prior art, as shown in FIG. 6A, when oxygen plasma ashing is performed, a copper film is oxidized,
Copper oxide 14 is formed. The oxidation of copper proceeds not only on the surface but also to a depth of about 50 nm. When such copper oxide 14 is formed, there is a problem that the resistance of the contact wiring increases or a connection failure occurs, and the reliability of the element is reduced.

In the oxygen plasma ashing, active species such as oxygen radicals generated by plasma discharge are used.
This is performed by reacting with a resist resin activated by heating. As a result, the organic resin, which is the main component of the resist, reacts with the active species generated by the oxygen plasma discharge to be decomposed into a gas such as CO ₂ or H ₂ O and removed from the substrate surface.

Here, in order to perform oxygen plasma ashing, it is necessary to heat the substrate to make the resist have a certain temperature or higher. This is because there is a threshold temperature for active oxygen species and oxygen ion species in oxygen plasma to cause a chemical reaction with the organic resin in the resist. In a typical organic resin used as a resist, a substrate temperature of 10
If the temperature is lower than 0 ° C., the reaction is particularly slow. Normally,
The processing is performed at a temperature of 150 ° C. or more in consideration of the process efficiency.

On the other hand, if the temperature at the time of ashing is too high, a carbonization reaction of the organic resin occurs in addition to a gas generation reaction such as CO ₂ and H ₂ O, and the resist may be scorched. Therefore, the treatment is usually performed at a temperature of 250 ° C. or less.

From the above, in order to generate a gas such as CO ₂ or H ₂ O in a high yield to the extent that the resist is not scorched, the substrate temperature is set to 150 to 2 during ashing.
It is necessary to control to 50 ° C. However, when ashing is performed at this temperature, oxidation of the copper film proceeds as described above, and a problem arises in that the contact wiring resistance increases. This problem is caused by the rapid progress of the oxidation of the copper-based metal film, and is a problem that occurs specifically when the copper-based metal film is provided.

On the other hand, in the above-mentioned second prior art, ashing is performed in a state where the surface of the copper wiring is covered with the silicon nitride film, so that oxidation of copper as described above can be prevented. However, there is a problem that the number of steps increases and the operation becomes complicated. When this method is adopted, the treatment is carried out by using a stripper as shown in FIG.
This must be performed both after (c) and after FIG. 8 (b).
It is necessary to take out the wafer from the apparatus for performing the etching or ashing and perform the process using the stripping solution, and the process time is increased because the wafer is moved.

As a method other than the method described above, a method of removing the resist with a stripping solution without performing oxygen plasma ashing in the method of the first prior art may be considered. However, in this case, a special stripping solution that can effectively remove the resist and the deposit and does not deteriorate the copper film is required, and the frequency of changing the stripping solution is increased. However, a stripper that sufficiently satisfies such requirements has not been found, and at present it is necessary to rely on the above-described first or second prior art.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to prevent oxidation of copper wiring without complicating the steps when forming a copper wiring multilayer structure.

[0023]

According to the present invention, a step of forming a copper-based metal film on a semiconductor substrate, a step of forming an insulating film on the copper-based metal film, Forming a resist patterned in a predetermined shape, providing a hole in the insulating film to reach the copper-based metal film using the resist as a mask, and setting the temperature of the semiconductor substrate to -50.
Removing the resist by performing oxygen plasma etching at a temperature of 50 ° C. to 50 ° C. to provide a method of manufacturing a semiconductor device.

In the present invention, the resist is removed by oxygen plasma etching instead of oxygen plasma ashing in the prior art.

As described above, in oxygen plasma ashing, there is a threshold temperature at which active oxygen species and oxygen ion species cause a chemical reaction with the resist resin. In a normal organic resin used as a resist, a substrate temperature of 100
When the temperature is lower than or equal to ° C., the reaction becomes extremely slow in the plasma ashing process.

On the other hand, the method of manufacturing the semiconductor device is as follows.
The semiconductor substrate is placed in oxygen plasma at a substrate temperature of -50 ° C to 50 ° C, and the resist is removed by oxygen plasma etching. In this temperature range, it has been difficult to efficiently perform the conventional oxygen plasma ashing. However, according to the study of the present inventors, it has been clarified that the resist can be removed even in such a temperature range by a method such as applying an RF bias or adjusting the pressure of a processing atmosphere. The present invention has been made based on such knowledge, and it is possible to remove a resist while suppressing the progress of oxidation of a copper-based metal film.

The method for manufacturing a semiconductor device has an advantage that a resist residue remaining after the resist is stripped can be easily removed in a subsequent cleaning step. The resist residue is one in which a reaction product of a resist resin and an etching gas or an ashing gas adheres to an insulating film when the resist is stripped. When the method of the present invention is used, the resist residue can be easily removed by subsequent washing. This is presumed to be due to a change in the film quality of the remaining resist resin because the processing temperature at the time of removing the resist was lowered. In the method of the present invention, since the resist is stripped at a low temperature, the amount of the resist residue may increase as compared with the conventional ashing process, but even in such a case, the resist residue can be easily removed in the subsequent cleaning step. Because it is possible, there is no particular problem.

According to the present invention, a copper-based metal film, an insulating film, and a resist are sequentially laminated on a semiconductor substrate, and an opening for exposing the copper-based metal film is formed. A method of manufacturing a semiconductor device, comprising removing the resist at a temperature at which oxidation of the resist can be suppressed.

According to the method of manufacturing a semiconductor device, the resist can be removed while suppressing the progress of oxidation of the copper-based metal film.

In the method of manufacturing a semiconductor device, the resist is preferably removed by oxygen plasma etching.

The temperature at which the oxidation of the surface of the copper-based metal film can be suppressed is, for example, the film thickness at which the copper-based metal film is oxidized within the time of removing the resist by oxygen plasma etching. It is preferable that the temperature be controlled to 3% or less of the temperature, particularly -50 to 50 ° C. When the copper-based metal film is oxidized, the copper-based metal film is removed in a later step, and accordingly, the thickness of the copper-based metal film is reduced. Generally, when this film thickness is reduced by 2-3% or more,
It is said that the increase in wiring resistance affects the electrical characteristics of the semiconductor device. Therefore, for example, when a copper-based metal film of 300 nm is used, the thickness of the oxidized film is 9 nm (= 300 nm).
× 0.03). The thickness of the copper-based metal film is determined by the time for removing the resist by oxygen plasma etching or the like and the temperature of the semiconductor substrate at the time of etching, and the longer the time and the higher the temperature, the thicker. In addition, the lower the temperature of the resist, the longer the time until the resist is completely removed. In consideration of these points, it is preferable that the temperature at which the thickness of the copper-based metal film oxidized is suppressed to 3% or less of the thickness of the copper-based metal film, and more preferably 2% or less. .

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In performing oxygen plasma etching in the present invention, the substrate temperature is set to -50.degree. C. to 50.degree. C., and more preferably, -50.degree. With such a temperature, the progress of oxidation of the copper-based metal film can be more effectively suppressed.

The pressure of the atmosphere in which the oxygen plasma etching is performed is preferably 500 mtorr or less, more preferably 100 mtorr or less, and most preferably 10 mtr or less.
orr or less. With such a low pressure, the resist can be stripped more efficiently.
There is no particular lower limit, but it is sufficient to set the lower limit to 0.1 mtorr or more. In conventional oxygen plasma ashing,
It is necessary to set the degree of vacuum of the processing atmosphere to a certain value or more. Since it is desirable that the ashing process is an isotropic process, it is important to shorten the mean free path of the active species in the plasma. For this reason, it is necessary that the degree of vacuum of the processing atmosphere be equal to or more than a certain value, and is usually 1 to 3 to
rr. In contrast, in the method of the present invention,
As described above, it is preferable to adjust the processing atmosphere to a lower pressure than when ashing is performed. Thereby, the mean free path of the active species in the plasma can be lengthened, and the etching action can be improved.

In the present invention, it is preferable that the semiconductor substrate is mounted on an electrode connected to a high-frequency power source, and oxygen plasma etching is performed with a high-frequency bias applied to the semiconductor substrate. By doing so, the resist surface can be impacted by high energy active species, and the resist can be sufficiently stripped even at a low temperature. The high-frequency bias is appropriately set depending on the type of the etching apparatus and the like, and is usually set to 10 W to 50 W. If a too high bias is applied, the surface of the copper film may be etched or copper oxidation may progress to a deep position. Here, it is preferable to apply the bias so that the active species in the plasma is accelerated almost perpendicularly to the substrate.

When oxygen plasma etching is performed in the present invention, the flow rate of oxygen is appropriately set in consideration of the volume of the chamber in which the processing is performed, the amount of exhaust, and the like, so that a stable etching processing can be realized. Usually, it is about 10 to 100 sccm.

The method of manufacturing a semiconductor device according to the present invention has an advantage that a resist residue remaining after the resist is stripped can be easily removed in a subsequent cleaning step. In particular, if a stripping solution containing an amine compound is used, the resist residue can be more easily removed. That is, the effect of the present invention can be more remarkably exhibited by employing a process having a step of cleaning the inner wall of the hole using a stripping solution containing an amine compound after the step of removing the resist.

The present invention is characterized by the process after the formation of the copper-based metal film, and the type of the semiconductor substrate is not particularly limited. Specifically, in addition to a semiconductor substrate made of a group IV element such as silicon, a semiconductor substrate made of a group III-V or II-VI compound semiconductor can also be used.

The copper-based metal film in the present invention refers to a metal film made of copper or a copper alloy, and includes a film used as an interconnect, a film used as an interlayer connection plug, and the like. The copper alloy refers to, for example, a copper / aluminum alloy or the like. The step of forming the copper-based metal film is not particularly limited, and a plating method, a sputtering method, and a CVD method are mainly used.

In the present invention, the copper-based metal film can be formed by a damascene method or the like. For example, after forming a concave portion at a predetermined portion of an interlayer insulating film, a copper-based metal film is formed so as to fill the concave portion, and further, an unnecessary portion of the copper-based metal film is removed to form the copper-based metal film. Can be. An unnecessary portion of the copper-based metal film is removed by CMP or the like.

As the insulating film in the present invention, a low dielectric constant material such as an SOG film can be used in addition to a conventionally used silicon oxide film. Here, the type of the SOG film is not particularly limited, and an inorganic SOG film, an organic SOG film, an HS
A Q (Hydrogen Silisesquioxane) film or the like can be used.

The resist in the present invention is not particularly limited as long as it can be removed by oxygen plasma etching, and a general resist material made of an organic compound can be used. For example, in addition to a novolak-based resist material, a chemically amplified resist material or the like can be used.

In the present invention, the apparatus for carrying out the oxygen plasma etching has a semiconductor substrate temperature of -50 to 50 ° C. during processing.
The one that can be adjusted to a temperature within the range is used. Further, as described above, when performing the oxygen plasma etching, it is preferable to set the pressure of the processing atmosphere to a low pressure of 500 mtorr or less and apply a high-frequency bias to the semiconductor substrate. Therefore, an apparatus which can realize such conditions is used. Is preferred. The ECR plasma device can realize a high plasma density even in a low vacuum, and thus can be suitably applied to the present invention. A parallel plate type plasma device is also preferable because a high frequency bias can be suitably applied to the semiconductor substrate.

[0043]

Embodiment 1 This embodiment will be described with reference to FIGS.

First, a silicon oxide film 1, a silicon nitride film 2, and a silicon oxide film 3 are formed in this order on a semiconductor substrate (not shown) on which elements such as transistors are formed, and further patterned thereon in a predetermined shape. A resist 4 was provided (FIG. 1A).

Next, dry etching was performed using the resist 4 as a mask to form a trench for embedding a lower wiring in the silicon oxide film 3. At this time, the silicon nitride film 2 functions as an etching stopper. Subsequently, the resist 4 was stripped by ashing with oxygen plasma and washing using a stripping solution containing an amine compound (FIG. 1).
(B)).

Next, TaN is formed on the entire surface as a barrier metal film.
Film 5 (film thickness 50 nm) was deposited by a sputtering method. Further, a copper film 6 was deposited thereon by a sputtering method to fill the groove (FIG. 1C). Next, CM
Unnecessary TaN film 5 and copper film 6 formed outside the groove were removed by P (Chemical Mechanical Polishing) to complete the lower wiring (FIG. 1D).

After forming the lower wiring, a silicon nitride film 7 (100 nm thick) and a silicon oxide film 8 (1200 nm thick)
Were formed in this order, and a resist 9 patterned into a predetermined shape was further provided thereon (FIG. 2A). As a resist material, a cresol novolak resin-naphthoquinonediazide (NQD) photosensitizer-based positive resist used as a resist for g-line or i-line was used.

Using the resist 9 as a mask, the silicon oxide film 8 was dry-etched until the silicon nitride film 7 was exposed to form an interlayer connection hole (FIG. 2B). The opening diameter of the interlayer connection hole was 0.25 μm. A mixed gas containing C ₄ F ₈ , Ar, and O ₂ was used as an etching gas.
Since this gas has a large etching rate for the silicon oxide film 8 and the silicon nitride film 7 (silicon oxide film: silicon nitride film = 20: 1), the etching was stopped at the upper part of the silicon nitride film 7.

Subsequently, the silicon nitride film 7 was dry-etched to expose the surface of the lower wiring (FIG. 2C).
A mixed gas of CHF ₃ and Ar was used as an etching gas.

Subsequently, oxygen plasma etching was performed under the conditions shown in Table 1 below to remove the resist 9 (FIG. 3).
(A)). At the time of etching, a known ECR plasma device was used.

[0051]

[Table 1]

The substrate temperature was measured at the center of the wafer surface using a thermo label. The temperature was adjusted by passing a coolant through the electrode on which the substrate was placed, and controlling the temperature of the coolant. The semiconductor substrate was mounted on an electrode connected to a high-frequency power supply, and oxygen plasma etching was performed with a high-frequency bias applied to the semiconductor substrate.

As described above, when the etching process by the oxygen plasma is performed, the resist residue 1 on the silicon oxide film 8 is formed.
1 remains, and deposits 12 generated by etching the copper film 6 adhere to the inside of the interlayer connection hole. In order to remove these, washing was performed using a stripping solution containing an amine compound.

Then, after pre-processing the inside of the interlayer connection hole,
A barrier metal film made of TaN and a buried conductive film made of tungsten were formed (not shown). The surface was flattened to complete an interlayer connection plug.

According to the method of this embodiment, oxygen plasma etching is performed at a substrate temperature of −20 ° C. in the resist stripping step. In the prior art, the substrate temperature is set to 150 to 25.
The resist was stripped by ashing with oxygen plasma at 0 ° C. For this reason, as shown in FIG. 6B, there is a problem that oxidation proceeds from the surface of the copper film and copper oxide 14 is formed. On the other hand, in the present embodiment, a process for setting the substrate temperature to −20 ° C. is performed. When the etching process performed at such a low temperature is performed, although the resist removal rate is lower than that of the conventional ashing process, the oxidation of the copper wiring can be effectively prevented. Even when the etching process is performed, oxidation occurs on the surface of the copper wiring, but the depth at which the oxide layer is formed is limited to 100 ° (10 nm) or less. It can be sufficiently removed at the stage of pretreatment.

As described above, according to the method of this embodiment, oxidation of copper wiring can be prevented without complicating the steps.

Example 2 Next, a model experiment was conducted for a case where conventional oxygen plasma ashing was performed and a case where oxygen plasma etching of the present invention was performed, and the results of comparing the resist etching rate and the progress of copper oxidation are shown. .

(Resist Etching Rate) A resist material was applied on a silicon substrate provided with a silicon oxide film on the surface to prepare a sample. Cresol novolak resin-naphthoquinonediazide (NQD) as a resist material
A photosensitive-type positive resist was used. The thickness of the resist is 2
μm.

Next, the resist was stripped under the conditions shown in Table 2 below. FIG. 9 shows the relationship between the processing time and the resist removal amount when the processing is performed under these conditions. According to the method of the present invention, the resist removal rate is reduced due to the low processing temperature, but the resist can be removed at a rate equal to or more than half that of the conventional ashing.

[0060]

[Table 2]

(Progress of Oxidation of Copper) A copper film was formed by a plating method on a silicon substrate having a silicon oxide film provided on the surface to prepare a sample. Next, the sample was left for 2 minutes in the atmosphere shown in Table 2 above. Thereafter, the depth of the copper oxide layer was measured by the XPS method. FIG. 10 shows the depth of the copper oxide layer according to the method of the present invention and the conventional method. According to the method of the present invention, it was found that the depth of the copper oxide layer was suppressed to 100 ° or less.

Example 3 FIG. 11 shows the result of performing the processing according to the method of the present invention shown in Example 2 while changing the substrate temperature. From the results of FIG. 11, it has been clarified that when the substrate temperature is -50 to 50 ° C., the resist can be suitably removed while suppressing the oxidation of copper. In particular, when the substrate temperature is 30 ° C. or lower, the thickness of the copper oxide layer can be reduced to 100 ° or less, and the thickness of the copper oxide layer can be stably reduced even if there is a slight temperature fluctuation.

[0063]

As described above, according to the present invention, when a resist is peeled off after a connection hole is formed on a copper-based metal film, the resist is removed at a temperature at which oxidation of the surface of the copper-based metal film can be suppressed. Has been removed. For example, if the substrate temperature is -50 ° C to 5
The resist is removed by performing oxygen plasma etching at 0 ° C. Therefore, oxidation of the copper wiring can be prevented without complicating the process.

[Brief description of the drawings]

FIG. 1 is a process cross section of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a process cross section of the semiconductor device manufacturing method of the present invention.

FIG. 3 is a process cross section of the semiconductor device manufacturing method of the present invention.

FIG. 4 is a process cross section of a conventional semiconductor device manufacturing method.

FIG. 5 is a process cross section of a conventional method for manufacturing a semiconductor device.

FIG. 6 is a process cross section of a conventional semiconductor device manufacturing method.

FIG. 7 is a process cross section of a conventional method for manufacturing a semiconductor device.

FIG. 8 is a process cross section of a conventional semiconductor device manufacturing method.

FIG. 9 is a diagram showing a relationship between a processing time and a resist removal amount when performing a resist stripping process of the present invention and a conventional resist.

FIG. 10 is a diagram showing the progress of oxidation of copper after the present invention and a conventional resist stripping process are performed.

FIG. 11 is a diagram showing the substrate temperature dependence of the processing time and the depth of the copper oxide layer in the oxygen plasma etching processing.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 silicon substrate 2 silicon nitride film 3 silicon oxide film 4 resist 5 TaN film 6 copper film 7 silicon nitride film 8 silicon oxide film 9 resist 10 deposit 11 resist residue 12 deposit 13 silicon nitride film 14 copper oxide

Claims (10)

[Claims] 1. A step of forming a copper-based metal film on a semiconductor substrate, a step of forming an insulating film on the copper-based metal film, and forming a resist patterned into a predetermined shape on the insulating film. Performing a step of providing a hole reaching the copper-based metal film in the insulating film using the resist as a mask, and removing the resist by performing oxygen plasma etching with the temperature of the semiconductor substrate being −50 ° C. to 50 ° C. And a method of manufacturing a semiconductor device. 2. When performing the oxygen plasma etching,
2. The method according to claim 1, wherein the temperature of the semiconductor substrate is -50C to 30C. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the pressure of the atmosphere in which the oxygen plasma etching is performed is set to 500 mtorr or less. 4. The oxygen plasma etching according to claim 1, wherein the semiconductor substrate is mounted on an electrode connected to a high-frequency power supply, and the oxygen plasma etching is performed with a high-frequency bias applied to the semiconductor substrate. 13. The method for manufacturing a semiconductor device according to item 5. 5. When performing the oxygen plasma etching,
The method for manufacturing a semiconductor device according to claim 1, wherein an oxygen flow rate is 10 to 100 sccm. 6. The semiconductor device according to claim 1, further comprising, after the step of removing the resist, a step of cleaning an inner wall of the hole using a stripping solution containing an amine compound. Manufacturing method. 7. A copper-based metal film, an insulating film, and a resist are sequentially laminated on a semiconductor substrate to form an opening through which the copper-based metal film is exposed, and then oxidation of the surface of the copper-based metal film can be suppressed. A method for manufacturing a semiconductor device, comprising removing the resist at a temperature. 8. The method according to claim 7, wherein the resist is removed by oxygen plasma etching. 9. A temperature at which oxidation of the surface of the copper-based metal film can be suppressed, the film thickness at which the copper-based metal film is oxidized within a time period for removing the resist by the oxygen plasma etching is set to a value corresponding to the thickness of the copper-based metal film. 9. The method for manufacturing a semiconductor device according to claim 8, wherein the temperature is a temperature that can be suppressed to 3% or less of the film thickness. 10. The method of manufacturing a semiconductor device according to claim 7, wherein a temperature at which oxidation of the surface of the copper-based metal film can be suppressed is −50 to 50 ° C.