JP2000148961A - LSI for combi card - Google Patents

Abstract

(57) [Summary] [PROBLEMS] A wireless / contact switchable I with a simple configuration
Provide a C card. SOLUTION: When a radio signal is input from an antenna,
The power supply potential is generated by the wireless linear circuit, and the switching signal RFRST becomes “H”. At this time, the CPU recognizes the wireless mode and executes a processing program in the wireless mode. In the logic circuits A1 and A2, data and a clock signal based on a wireless signal can be transferred. on the other hand,
If no radio signal is input from the antenna, the switching signal RFRST becomes “L”. At this time, the CPU recognizes the contact mode and executes a processing program in the contact mode. In the logic circuits A3 to A5, the reset signal, the data, and the clock signal input from the external terminals are set in a transferable state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an LSI used for a so-called combination card in which a contact IC card and a wireless IC card are combined.

[0002]

2. Description of the Related Art Conventionally, a contact type IC card has been used.
2. Description of the Related Art There are two types of cards, wireless cards and wireless IC cards.

FIG. 15 schematically shows the structure of a conventional contact type IC card.

[0004] The plastic card 10 has a connect unit 11 and an MPU 12 for an IC card mounted thereon. The connection unit 11 has external electrodes, and exchanges data and the like by bringing the external electrodes into direct contact with an external device (reader / writer) 18. In general, the connection unit 11 and the MPU 12 for an IC card are modularized to form an IC module. By fitting the IC module into the embossed area of the plastic card 10, an IC card is completed.

The MPU 12 for an IC card includes a control unit 13,
Arithmetic unit 14, ROM 15, RAM 16, and EEPROM
17 is provided. The ROM 15 stores a data processing program. The RAM 16 is used for temporarily storing data, and the EEPROM 17 is
Used for data storage.

FIG. 16 schematically shows the structure of a conventional wireless IC card.

The plastic card 20 has an antenna 2
1 and an MPU 22 for an IC card. The antenna 21 exchanges data and the like with an external device (reader / writer) 30. The IC card MPU 22 includes a modulation / demodulation circuit 23, an input / output control circuit 24, a CPU 25, a ROM 26, an SRAM 27, an EEP
A ROM 28 and a bus 29 are provided.

[0008] The radio signal received by the antenna 21 is input to an input / output control circuit 24 via a modulation / demodulation circuit 23. The ROM 26 stores a data processing program. The SRAM 27 is used for temporarily storing data, and the EEPROM 28 is used for storing data.

In recent years, in order to reduce the number of cards to be carried, multi-cards capable of processing various applications with one card have been developed. Along with this, the development of a combination card in which a contact IC card and a wireless IC card which have been separately carried so far can be combined to process many applications with one card has been advanced.

This combination card is promising for a system that uses, for example, a combination of electronic money (contact type) and commuter pass (wireless type).

FIG. 17 shows a first example of a conventional combination card.

This embodiment relates to an IC card disclosed in Japanese Patent Application Laid-Open No. 5-333966. This IC card is 1
It has both contact and wireless functions in a single card. However, this IC card has a built-in battery, and the life of the battery is extended by using a rechargeable battery. This document does not disclose how to switch between the contact type and the wireless type.

FIG. 18 shows a second example of a conventional combination card.

This embodiment relates to an IC card disclosed in Japanese Patent Publication No. 2755809. This document discloses a switching method between a contact type and a wireless type. In this switching method, the potential U2 of the contact VDD terminal is compared with a reference potential U1 generated in the wireless mode by a comparator 2.1.2, and the contact type and the wireless type are switched based on the comparison result.

However, in this method, since the potential U2 of the contact VDD terminal is compared with the reference potential U1 generated in the wireless mode, the accuracy of the comparator 2.1.2 becomes a problem, and the comparator 2.1. There is a drawback that the switching circuit including 2 is complicated.

This document also discloses a comparator 2.
There is no disclosure as to how to switch between the contact type and the wireless type using the comparison result of 1.2.

[0017]

SUMMARY OF THE INVENTION An object of the present invention is to provide an LSI for a combination card which can switch between a contact type and a wireless type by a simple method.

[0018]

(1) A combination card LSI according to the present invention includes a contact linear circuit connected to a plurality of external terminals and an antenna connected to a first power supply potential based on a radio signal. The switching signal is set to a first level when the first power supply potential exceeds a predetermined threshold, and the switching signal is set to a second level when the first power supply potential does not reach the predetermined threshold. A wireless linear circuit that performs transmission and reception of data in the wireless linear circuit when the switching signal is at a first level, and transmits and receives data in the contact linear circuit when the switching signal is at a second level. And a switching circuit for enabling.

The circuit for generating the first power supply potential is connected to an internal power supply node via a backflow prevention diode, and a terminal to which a second power supply potential is applied among the plurality of external terminals is also connected to the internal power supply node. Connected to power supply node.

The combination card LSI according to the present invention further recognizes that the switching mode is in the wireless mode when the switching signal is at the first level, and executes a processing program in the wireless mode when the switching signal is at the second level. A control circuit that recognizes the contact mode and executes a processing program in the contact mode.

(2) The combination card LSI of the present invention
Is a contact linear circuit connected to a plurality of external terminals,
A wireless linear circuit connected to an antenna, and a control circuit that determines an operation mode based on a state of each signal input to the contact linear circuit and a state of each signal generated by the wireless linear circuit. When the control circuit recognizes the wireless mode, the wireless linear circuit enables data transfer, and when the control circuit recognizes the contact mode, the contact linear circuit enables data transfer. And a circuit.

The combination card LSI of the present invention further includes a switching circuit for fixing the plurality of external terminals to a ground potential when the control circuit recognizes the wireless mode.

(3) The IC chip of the present invention is mounted on an IC module for an IC card.
Pads for wire bonding and bumps for flip chip bonding are respectively arranged on the main surface of the C chip.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a combination card LSI of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a first example of a combination card to which the present invention is applied.

The plastic card 30 has an antenna 3
1, a connection unit 32 and a combination card LSI unit 33 are built-in. The antenna 31 is connected to an external device (reader /
A writer) 38 for exchanging data and obtaining power from the external device 38. The connection unit 32 includes I / O (input / output), CLK (clock), RST (reset), VDD (power supply), VSS
It has external terminals (electrodes) of (ground), and exchanges data by bringing these external terminals into direct contact with an external device (reader / writer) 39.

The combination card LSI unit 33 includes a wireless linear circuit 34, a contact linear circuit 35, and a switching circuit 3.
6 and a logic / memory circuit 37.
The wireless linear circuit 34 includes a wireless signal detection circuit, a power supply potential generation circuit, a wireless / contact switching signal generation circuit, and the like. The contact linear circuit 35 includes a level shift circuit and the like.

The switching circuit 36 includes the wireless linear circuit 3
The switching between the wireless mode and the contact mode is performed based on the wireless / contact switching signal output from the communication unit 4. In the wireless mode, data is exchanged between the wireless linear circuit 34 and the logic / memory circuit 37. In the contact mode, the contact linear circuit 35 and the logic / memory circuit 3 are exchanged.
7 to exchange data.

The logic / memory circuit 37 includes a CPU for processing various signals and random logic, a ROM in which a data processing method is programmed according to each mode (contact or wireless), and a temporary storage of data. RAM used, EEPRO used for data storage
M.

FIGS. 2 and 3 show the combination card L of FIG.
3 shows the configuration of the SI in detail.

The wireless linear circuit 34 has terminals CP and C
M is provided. An antenna for transmitting and receiving a radio signal (AC signal) and acquiring power is connected to the terminals CP and CM.

The terminal CP has a detector (detection circuit) 4
1 is connected. The detector 41 has a function of detecting data from a radio signal received by an antenna. The terminal CP is connected to the limiter 42, the regulator 43, and the diode D1. In the path of the limiter 42 and the regulator 43, a radio signal (AC signal)
, Power supply potential VCC in the wireless mode is generated.

The diode D1 is for preventing a current from flowing backward from the external terminal VDD to the regulator 43 in the contact mode.

In the path of the bandgap circuit 44 and the battery level detector 45, the level of the power supply potential (DC power supply) generated from the radio signal (AC signal) is detected.
When the power supply potential level exceeds a predetermined threshold, it is determined that the wireless mode is set, and the wireless / contact switching signal RFR
ST is set to “H”. Conversely, when the power supply potential level has not reached the predetermined threshold, it is determined that the contact mode is set,
The radio / contact switching signal RFRST is set to “L”.

The terminal CM is provided with a clock extraction circuit 4.
6 is connected. The clock extraction circuit 46 is for extracting the clock signal RFCLK from the radio signal received by the antenna.

The radio / contact switching signal RFRST is input to logic circuits (AND circuits) A1 and A2. Therefore, when the signal RFRST is “H”, the wireless mode is set, and the data output from the detector 41 is supplied to the logic / memory circuit 37 via the logic circuit A1 and the logic circuit (OR circuit) O1. Similarly, the signal RFR
When ST is “H”, the clock signal RFCLK output from the clock extraction circuit 46 is supplied to the logic / memory circuit 37 via the logic circuit A2 and the logic circuit (OR circuit) O3.

The resistor R1 and the MOS transistor M
1 is used to output (transmit) data in the wireless mode.

On the other hand, the contact linear circuit 35 is connected to external terminals VDD, VSS, I / O, CLK, and RST. Diodes D2 and M connected to external terminal VDD
Regarding the OS transistor M2, the band gap circuit 47, and the battery level detector 48, in the path of the band gap circuit 47 and the battery level detector 48,
The power supply potential level applied to the external terminal VDD is detected. That is, when the potential applied to the external terminal VDD is 3V, the signal CF1 becomes "H", and when it is 5V, the signal CF1 becomes "H".
1 becomes "L".

In the wireless mode, the radio / contact switching signal RFRST is "H", and in the contact mode (power supply 3 V), the signal CF1 is "H". ) The output of NR1 becomes "L", and the MOS transistor M2 is turned on. In the contact mode (power supply 5 V), the radio / contact switching signal R
Since both FRST and the signal CF1 become "L", the output of the logic circuit NR1 becomes "H", and the MOS transistor M2 is turned off.

The diode D2 is for preventing a current from flowing backward.

The external terminals RST, I / O, and CLK are connected to logic circuits (AND circuits) A3 to A5 via level shifters 49 to 51, respectively. Level shifter 4
In steps 9 to 51, the level of the VDD signal is shifted to the level of the VCC signal. To the logic circuits A3 to A5, an inverted signal / RFRST of the wireless / contact switching signal RFRST is input.

When the inverted signal / RFRST of the radio / contact switching signal RFRST is "H", the operation mode is the contact mode, and the output signals of the level shifters 49 to 51 are the logic circuit A
The signal is supplied to the logic / memory circuit 37 via 3 to A5. At this time, the oscillator 52 outputs the clock signal OSCCLK.

The resistor R2 and the MOS transistor M
Reference numeral 3 is used to output data in the contact mode.

Next, the combination card LS shown in FIGS.
The operation of I will be described in detail.

1. At the time of the wireless mode First, a power supply radio wave signal (AC signal) is input from an antenna, half-wave or full-wave rectification is performed on this signal, and a power supply potential (DC power supply) is generated. Based on this power supply potential, the limiter 42, the regulator 43, and the band gap circuit 44 are operated, and the power supply potential (internal power supply)
Generate VCC.

The power supply potential VCC is supplied to the battery level detector 45. When the power supply potential VCC exceeds a predetermined threshold, the radio / contact switching signal RFRST output from the battery detector 45 becomes "H".

When the radio / contact switching signal RFRST becomes "H", the CPU of the logic / memory circuit 37
Determines that the current mode is the wireless mode.

Therefore, the CPU processes data according to the processing program in the wireless mode stored in the ROM.

At this time, logic circuits (AND circuits) A1, A
In 2, since one input signal RFRST becomes "H", the other input signal (data, clock signal) is output as an output signal as it is. In the logic circuits (AND circuits) A3 to A5, one of the input signals / RFRST is "L", so that the output signals of these logic circuits A3 to A5 are always "L".

For this reason, in the wireless mode, data is supplied from the detector 41 to the logic / memory circuit 37 via the logic circuits A1 and O1. Also, the clock signal R
FCLK is supplied from the clock extraction circuit 46 to the logic / memory circuit 37 via the logic circuit A2, and the clock signal CLK is supplied from the clock extraction circuit 46 to the logic circuit A.
It is supplied to the logic / memory circuit 37 via O2 and O3.

In the logic circuit AA, the signal RFOUT becomes "H" or "L" in accordance with the output data, so that the data is output via the output circuit (MOS transistor M1) of the wireless linear circuit 34. You. On the other hand, since the output signal COUT of the logic circuit AA is always “L”, the output circuit (MOS transistor M3) of the contact linear circuit 35 does not operate.

2. In the contact mode In this mode, the external terminals VDD, VSS, RST, I
A power supply potential or a signal (including data) is supplied from / O and CLK, and a wireless signal is not supplied.

Accordingly, the power supply potential (DC power supply) is not generated in the wireless linear circuit 34, and the wireless / contact switching signal R output from the battery detector 45 is not generated.
FRST becomes “L”.

When the radio / contact switching signal RFRST becomes "L", the CPU of the logic / memory circuit 37
Determines that the current mode is the contact mode.

Therefore, the CPU processes data in accordance with the processing program in the contact mode stored in the ROM.

At this time, a power supply potential of 3 V or 5 V is supplied from the external terminal VDD. With this power supply potential, the band gap circuit 47 and the battery level detector 4
8 operates, and the signal RST (2) becomes “L”. Also,
When the power supply is 3 V, since the signal CF1 is "H",
The output of the logic circuit (Nor circuit) NR1 becomes “L” and M
The OS transistor M2 is turned on. When the power supply is 5 V, the radio / contact switching signal RFRST and the signal C
Since both F1 are "L", the output of the logic circuit NR1 is "H" and the MOS transistor M2 is turned off.

Note that a diode D1 is provided to prevent a current from flowing into the wireless linear circuit 34 when the power supply potential is supplied from the external terminal VDD.

Also, logic circuits (AND circuits) A3 to A5
In this case, one input signal / RFRST becomes "H", so that the other input signal (reset signal, data, clock signal) is output as it is as an output signal. In the logic circuits (AND circuits) A1 and A2, one input signal RFR
Since ST is at "L", the output signals of these logic circuits A1 and A2 are always at "L".

Therefore, in the contact mode, data is supplied from the terminal I / O to the logic / memory circuit 37 via the level shifter 50 and the logic circuits A3 and O1. The clock signal CLK is supplied from the terminal CLK to the logic / memory circuit 37 via the level shifter 51 and the logic circuits A5 and O3, and the reset signal RST is supplied from the terminal RST via the level shifter 49 and the logic circuits A4 and O2. And supplied to the logic / memory circuit 37.

The radio / contact switching signal RFRST
Is high, the oscillator 52 operates, and the oscillator 52 generates the clock signal OSCCLK.

In the logic circuit AA, the signal COUT becomes “H” or “L” according to the output data.
Data is output via the output circuit (MOS transistor M3) of the contact linear circuit 35. On the other hand, since the output signal RFOUT of the logic circuit AA is always "L", the output circuit (MOS transistor M1) of the wireless linear circuit 34 does not operate.

As described above, according to the first embodiment of the combination card LSI of the present invention, the wireless mode is determined by the presence or absence of the power supply potential (DC power supply) generated based on the wireless signal in the wireless linear circuit. And switch the contact mode.

That is, when the power supply potential is generated by the wireless linear circuit, the switching signal RFRST is set to “H”,
This is given to the CPU so that the CPU recognizes the wireless mode. At the same time, the switching circuit outputs a clock signal and data from the wireless linear circuit. On the other hand, when the power supply potential is not generated by the wireless linear circuit, the switching signal RFRST is set to “L”, and this is given to the CPU to make the CPU recognize that it is in the contact mode. At the same time, the switching circuit outputs a clock signal and data from the contact linear circuit.

As a result, it is possible to provide a combination card LSI that can switch between the contact type and the wireless type by a simple method.

FIG. 4 shows a second example of a combination card to which the present invention is applied.

The antenna 3 is provided on the plastic card 30.
1, a connection unit 32 and a combination card LSI unit 33 are built-in. The antenna 31 is connected to an external device (reader /
A writer) 38 for exchanging data and obtaining power from the external device 38. The connection unit 32 includes I / O (input / output), CLK (clock), RST (reset), VDD (power supply), VSS
It has external terminals (electrodes) of (ground), and exchanges data by bringing these external terminals into direct contact with an external device (reader / writer) 39.

The combination card LSI unit 33 includes a wireless linear circuit 34, a contact linear circuit 35, and a switching circuit 3.
6, and a logic / memory circuit 37. The wireless linear circuit 34 includes a wireless signal detection circuit, a power supply potential generation circuit, a wireless / contact switching signal generation circuit, and the like. The contact linear circuit 35 includes a level shift circuit and the like.

The logic / memory circuit 37 stores a CPU for processing various signals, random logic, a program for determining an operation mode, and a data processing program corresponding to each operation mode (contact or wireless). ROM, R used for temporary storage of data
It consists of an AM and an EEPROM used for storing data.

The switching circuit 36 switches between the wireless mode and the contact mode based on the wireless / contact switching signal output from the logic / memory circuit 37. In the wireless mode, data is exchanged between the wireless linear circuit 34 and the logic / memory circuit 37. In the contact mode, data is exchanged between the contact linear circuit 35 and the logic / memory circuit 37. Do.

In the wireless mode, the switching circuit 40 controls the I / O (input / output), CLK (clock), RST (reset), VDD (power supply), VSS
This is for fixing each external terminal (electrode) of (ground) to the ground potential.

In the wireless mode, for example, it is conceivable to use a combination card by holding it over a wireless reader / writer in a state of being put in a wallet or a regular case. In this case, the external terminals for contact of the combination card (for example, the VDD terminal and the VSS terminal) may be short-circuited by a conductive material such as a coin, which may adversely affect the operation. In order to eliminate this possibility, in the wireless mode, each external terminal (electrode) of the connect unit 32 is fixed to the ground potential.

The feature of the combination card of this example is that the operation mode is determined by the CPU in the logic / memory circuit 37 using software. That is, the CPU in the logic / memory circuit 37 is
The state of each signal such as a power supply potential and a clock signal generated in the step S1 and the state of each signal such as a power supply potential and a clock signal input to the contact linear circuit 35 are monitored, and the states of these signals are comprehensively determined. To determine the operation mode.

For example, when the power supply potential is generated by the wireless linear circuit 34 and the power supply potential is not input to the contact linear circuit 35, the CP in the logic / memory circuit 37
U determines the wireless mode. Conversely, when the power supply potential is not generated in the wireless linear circuit 34 and the power supply potential is input to the contact linear circuit 35, the CPU in the logic / memory circuit 37 determines that the contact mode is set.

For example, when the power supply potential is input to the contact linear circuit 35 but the clock signal is not input and the wireless linear circuit 34 generates the clock signal, Since the determination is impossible, the mode determination operation is temporarily stopped. Wireless linear circuit 34
A power supply potential is generated at the same time, and the power supply potential is input to the contact linear circuit 35 at the same time.
When the clock signal is generated in step 4 and the clock signal is input to the contact linear circuit 35 at the same time, the mode determination is temporarily stopped because the mode cannot be determined.

When the CPU determines the operation mode, the result of the determination is transmitted to the switching circuits 36 and 40 by a wireless / contact switching signal.

As described above, according to the second example of the combination card LSI of the present invention, the operation mode to be performed first is determined by the CPU using software (operation mode determination program). Is going. That is,
The switching between the wireless mode and the contact mode is performed by the CPU comprehensively determining the state of each signal generated by the wireless linear circuit and the state of each signal input to the contact linear circuit. As described above, by determining the operation mode in the CPU, it is possible to easily switch between the contact type and the wireless type.

Incidentally, the combination card or the contact type IC card has a connecting portion serving as an interface between an external device and an IC (chip), and the connecting portion is formed by an IC module having a plurality of external terminals (electrodes). Be composed.

FIG. 5 shows the appearance of an IC card. The plastic card 10 has a certain thickness, and an embossed area is provided on a part of its surface. I
The C module 53 has an IC (chip) mounted thereon. External terminals (electrodes) 54 are formed on the surface of the IC module 53 opposite to the surface on which the IC is mounted. The IC module 53 is fitted into the embossed region such that the external terminals 54 are exposed.

FIG. 6 shows an IC module. FIG. 7 is a sectional view taken along the line VII-VII in FIG. In FIG. 6, the external terminals are omitted.
On one side of the IC module 53, an IC (chip) 55
Is installed. The IC 55 is covered with a resin 56. An external electrode 54 is formed on the other surface of the IC module 53.

FIG. 8 shows an IC module and an IC (chip).
1 shows an example of the connection technique. FIG. 9 shows only the IC shown in FIG.

In this technique, the terminals of the IC module 53 and the pads of the IC 55 are connected by bonding wires 57. IC is an I / O (input / output) pad,
The CLK (clock) pad, the RST (reset) pad, the VDD (power supply) pad, and the VSS (ground) pad are mounted on the IC module 53 such that the pads are exposed.

The IC module 53 has an I / O (input / output) terminal, a CLK (clock) terminal, an RST (reset) terminal, and a VDD (power supply) corresponding to each pad of the IC 55.
A terminal and a VSS (ground) terminal are formed. The position of each terminal of the IC module 53 is determined in advance corresponding to the position of each pad of the IC 55. The terminals of the IC module 53 and the pads of the IC 55 are connected to each other by bonding wires 57.

An I / O (input / output) terminal, a CLK (clock) terminal, an RS
The T (reset) terminal, the VDD (power supply) terminal, and the VSS (ground) terminal are external terminals (I / O,
CLK, RST, VDD, VSS).

FIG. 10 shows another example of a technique for connecting an IC module and an IC (chip). FIG.
Reference numeral 1 shows only the IC shown in FIG.

In this technique, the terminals of the IC module 53 and the bumps of the IC 55 are connected by flip chip bonding. The IC module is configured such that I / O (input / output) bumps, CLK (clock) bumps, RST (reset) bumps, VDD (power supply) bumps, and VSS (ground) bumps are hidden between the IC modules. 53.

The IC module 53 has an I / O (input / output) terminal, a CLK (clock) terminal, an RST (reset) terminal, and a VDD (power supply) corresponding to each bump of the IC 55.
A terminal and a VSS (ground) terminal are formed. The position of each terminal of the IC module 53 is determined in advance corresponding to the position of each bump of the IC 55. The terminals of the IC module 53 and the bumps of the IC 55 are connected to each other by a crimping technique.

The I / O (input / output) terminal, CLK (clock) terminal, RS
The T (reset) terminal, the VDD (power supply) terminal, and the VSS (ground) terminal are external terminals (I / O,
CLK, RST, VDD, VSS).

The above describes two connection techniques between the IC module and the IC (chip).
The directions of the chips mounted on the C module are different from each other.
That is, when a bonding wire is used, the IC is mounted on the IC module so that each pad is visible, whereas when flip-chip bonding is used, the IC is mounted on the IC module so that each pad is hidden.

Therefore, assuming that the configuration of the IC module is not changed, the arrangement (layout) of the IC pads when the connection technique using bonding wires is applied is as shown in FIG.
In contrast, the layout (layout) of bumps on pads or pads of an IC when the connection technique by flip chip bonding is applied is as shown in FIG.

That is, as is apparent from a comparison between the layout of FIG. 9 and the layout of FIG. 11, these two pad (or bump) layouts are reversed left and right. For this reason, in manufacturing an IC for an IC card, the two connection technologies described above must be used.
Two types of pads (or bumps) having left and right inverted layouts must be prepared.

By changing the layout of each terminal of the IC module, it is possible to use one kind of pad (or bump) layout so as to support the above two connection technologies. In this case, extra work increases, and the mounting process becomes complicated.

In the following, a pad (or bump) layout is proposed in which one type of layout can support the above two connection technologies without increasing the burden on the user in the mounting process.

FIG. 12 shows an IC to which the present invention is applied and an IC.
An example is shown in which terminals of a module are electrically connected by bonding wires. FIG. 13 shows an example in which an IC to which the present invention is applied and terminals of an IC module are electrically connected by flip chip bonding. FIG. 14 shows a pad (or bump) layout of the present invention.

First, the pad (or bump) layout of the present invention will be described (FIG. 14).

The feature of the pad (or bump) layout of the present invention is that each pad (I / O, CLK, RST, VDD, VS) for wire bonding is provided on an IC (chip).
S) and each bump (I) for flip chip bonding.
/ O, CLK, RST, VDD, VSS).

For example, when the main surface of an IC (chip) is divided into two areas on the left and right, I / O pads, VSS pads, CLK bumps, RST bumps, VD
D bump is arranged, and CLK pad, RS
A T pad, a VDD pad, an I / O bump, and a VSS bump are arranged.

Thus, at the time of wire bonding,
The I / O pad and the VSS pad for wire bonding are arranged at positions corresponding to the I / O terminal and the VSS terminal of the IC module 53. Similarly, the CLK pad, RST pad, and VDD pad for wire bonding are
CLK terminal, RST terminal and VD of IC module 53
It is arranged at a position corresponding to the D terminal.

At the time of flip chip bonding, the crimping I / O bump and the VSS bump are arranged at positions corresponding to the I / O terminal and the VSS terminal of the IC module 53, and similarly, the crimping CLK bump, RST
The bump and the VDD bump are the CL of the IC module 53.
It is arranged at a position corresponding to the K terminal, the RST terminal, and the VDD terminal.

As described above, according to the pad (or bump) layout of the present invention, it is possible to cope with both the connection techniques of wire bonding and flip chip bonding, and it is possible to cope with the maker's burden in designing and manufacturing the chip and in the mounting process. The burden on the user can be reduced.

Next, a configuration in the case where the IC to which the present invention is applied and the terminals of the IC module are electrically connected by bonding wires will be described (FIG. 12).

The IC has pads (I / O, CLK, RST, VDD, VSS) for wire bonding and bumps (I / O, CL) for flip chip bonding.
K, RST, VDD, and VSS) are mounted on the IC module 53 so as to be respectively exposed.

The IC module 53 has an I / O (input / output) terminal, a CLK (clock) terminal, an RST (reset) terminal, and a VDD (power supply) corresponding to each pad of the IC 55.
A terminal and a VSS (ground) terminal are formed. The position of each terminal of the IC module 53 is determined in advance corresponding to the position of each pad of the IC 55. The terminals of the IC module 53 and the pads of the IC 55 are connected to each other by bonding wires 57.

Next, a configuration in the case where the IC to which the present invention is applied and the terminals of the IC module are electrically connected by flip chip bonding will be described (FIG. 1).
3).

The IC has pads (I / O, CLK, RST, VDD, VSS) for wire bonding and bumps (I / O, CL) for flip chip bonding.
K, RST, VDD, VSS) are hidden between the IC module and the IC, respectively.
Mounted on top.

The IC module 53 has an I / O (input / output) terminal, a CLK (clock) terminal, an RST (reset) terminal, and a VDD (power supply) corresponding to each bump of the IC 55.
A terminal and a VSS (ground) terminal are formed. The position of each terminal of the IC module 53 is determined in advance corresponding to the position of each bump of the IC 55. The terminals of the IC module 53 and the bumps of the IC 55 are connected to each other by a crimping technique.

Here, each pad of the IC 55 is arranged at a position where it does not contact each terminal of the IC module 53 during flip chip bonding.

In FIGS. 12 and 13, I / O (input / output) terminals, CLK (clock) terminals, RST (reset) terminals, VDD (power) terminals, VSS (power) terminals (Ground) terminals are external terminals (I / O, CLK, RST,
VDD, VSS).

As described above, according to the pad layout of the IC (chip) of the present invention, each pad for wire bonding (I / O, C
LK, RST, VDD, VSS) and flip-chip bonding bumps (I / O, CLK, RST, V
DD, VSS). Therefore, regardless of the connection technology of wire bonding and flip chip bonding, the modularization of the IC can be achieved by one kind of pad (or bump) layout. The burden and the burden on the user in the mounting process can be reduced.

[0109]

According to the first embodiment of the combination card LSI of the present invention, the switching between the wireless mode and the contact mode is performed according to the presence or absence of the power supply potential (DC power supply) generated based on the wireless signal in the wireless linear circuit. It is carried out.

That is, when the power supply potential is generated by the wireless linear circuit, the switching signal RFRST is set to “H”,
This is given to the CPU so that the CPU recognizes the wireless mode. At the same time, the switching circuit outputs a clock signal and data from the wireless linear circuit. On the other hand, when the power supply potential is not generated by the wireless linear circuit, the switching signal RFRST is set to “L”, and this is given to the CPU to make the CPU recognize that it is in the contact mode. At the same time, the switching circuit outputs a clock signal and data from the contact linear circuit.

As a result, it is possible to provide a combination card LSI capable of switching between a contact type and a wireless type by a simple method.

Further, according to the second example of the combination card LSI of the present invention, the operation mode to be performed first is determined by the CPU using software (operation mode determination program). That is, switching between the wireless mode and the contact mode is performed by the CPU comprehensively determining the state of each signal generated by the wireless linear circuit and the state of each signal input to the contact linear circuit. . As described above, by determining the operation mode in the CPU, it is possible to easily switch between the contact type and the wireless type.

Further, according to the pad layout of the IC (chip) of the present invention, each pad for wire bonding (I / O, CLK, RST,
VDD, VSS) and flip-chip bonding bumps (I / O, CLK, RST, VDD, VSS)
Are arranged respectively. Therefore, no matter which connection technique of wire bonding or flip chip bonding is applied, the modularization of the IC can be achieved by one kind of pad (or bump) layout,
It is possible to reduce the burden on the manufacturer in designing and manufacturing the chip and the burden on the user in the mounting process.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first example of a combination card to which the present invention is applied.

FIG. 2 is a diagram showing the overall configuration of a combination card LSI of the present invention.

FIG. 3 is a diagram showing a main part of a combination card LSI of the present invention.

FIG. 4 is a diagram showing a second example of a combination card to which the present invention is applied.

FIG. 5 is a diagram showing the appearance of an IC card.

FIG. 6 is a diagram showing an IC module.

FIG. 7 is a sectional view taken along the line VII-VII in FIG. 6;

FIG. 8 is a diagram showing a connection technique by wire bonding.

FIG. 9 is a diagram showing a pad layout of the IC of FIG. 8;

FIG. 10 is a diagram showing a connection technique by flip chip bonding.

FIG. 11 is a diagram showing a bump layout of the IC of FIG. 10;

FIG. 12 is a diagram showing a connection technique by wire bonding using the IC of the present invention.

FIG. 13 is a diagram showing a connection technique by flip chip bonding using the IC of the present invention.

FIG. 14 is a diagram showing a bump layout of the IC shown in FIGS. 12 and 13;

FIG. 15 is a view schematically showing a configuration of a conventional contact IC card.

FIG. 16 is a view schematically showing a configuration of a conventional wireless IC card.

FIG. 17 is a diagram showing a configuration example of a conventional combination card.

FIG. 18 is a diagram showing a configuration example of a conventional combination card.

[Explanation of symbols]

30: plastic card, 31: antenna, 32: connect part, 33: LS for combination card
I, 34: wireless linear circuit, 35: contact linear circuit, 36, 40: switching circuit, 37: logic / memory circuit, 38, 39: external device (reader,
41: detector, 42: limiter, 43: regulator, 44, 47: band gap circuit, 45, 48: battery level detector, 46: clock extraction circuit, 49-51: level shifter, 52: oscillator, 53: IC Module: 54: external terminal (electrode), 55: IC (chip), 56: resin, 57: bonding wire, A1 to A5: logic circuit (AND circuit), O1 to O3: logic circuit (OR circuit), NR1: Logic circuit (Nor circuit), I1: inverter, D1 to D3: diode, R1, R2: resistor, M1 to M3: MOS transistor.

Claims (6)

[Claims] 1. A contact linear circuit connected to a plurality of external terminals, and a first power supply potential connected to an antenna and generated based on a radio signal, wherein the first power supply potential exceeds a predetermined threshold. A wireless linear circuit that sets a switching signal to a first level and sets the switching signal to a second level when the first power supply potential does not reach the predetermined threshold; and when the switching signal is at the first level. And a switching circuit that enables data transfer in the wireless linear circuit and enables data transfer in the contact linear circuit when the switching signal is at the second level. LSI. 2. The circuit for generating a first power supply potential is connected to an internal power supply node via a backflow prevention diode, and a terminal to which a second power supply potential is applied among the plurality of external terminals is also provided. 2. The combination card LSI according to claim 1, wherein the LSI is connected to the internal power supply node. 3. When the switching signal is at a first level,
A control circuit that recognizes the wireless mode and executes the processing program in the wireless mode, and when the switching signal is at the second level, recognizes the contact mode and executes the processing program in the contact mode. The LSI for a combination card according to claim 1, wherein the LSI is provided. 4. A contact linear circuit connected to a plurality of external terminals, a wireless linear circuit connected to an antenna,
A control circuit that determines an operation mode based on the state of each signal input to the contact linear circuit and the state of each signal generated by the wireless linear circuit, and when the control circuit recognizes the wireless mode A switching circuit that enables data transmission and reception in the wireless linear circuit, and enables the data transmission and reception in the contact linear circuit when the control circuit recognizes a contact mode. LSI for cards. 5. A switching circuit for fixing each of the plurality of external terminals to a ground potential when the control circuit recognizes a wireless mode.
The described combination card LSI. 6. An IC chip mounted on an IC module for an IC card, wherein each pad for wire bonding and each bump for flip chip bonding are arranged on a main surface of the IC chip. IC chip.