JP2000003978A - Semiconductor device - Google Patents

Abstract

(57) [Summary] To prevent deterioration of signal quality input / output to / from a semiconductor chip. A wiring pattern is arranged on a flexible insulating tape having a device hole. One end of the wiring pattern 18 protrudes from the device hole 16. By connecting the inner leads to the semiconductor chip 14, the wiring pattern 18
The input and output of a signal is enabled via the. Here, at the four corners of the device hole 16, there are regions 28 where the wiring patterns 18 are not routed, and the regions 28 are provided with dummy patterns 30. The dummy pattern 30 is electrically connected to the adjacent wiring pattern 18 and the wiring pattern 18 is used as a grounding pattern, so that the potential of the dummy pattern 30 becomes the ground potential and becomes stable.
The dummy pattern 30 becomes a noise source and the wiring pattern 18
Can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor chip is mounted on a flexible circuit board having a wiring pattern formed on an insulating tape, and more particularly, to preventing deterioration of signal quality input / output to / from the semiconductor chip. The present invention relates to a semiconductor device.

[0002]

2. Description of the Related Art In recent years, a semiconductor device in which a semiconductor chip is bonded to a flexible circuit board and sealed with a resin has been used.

Hereinafter, the structure of the above-described semiconductor device will be described with reference to FIG. FIG. 4 is a plan view showing the structure of a conventional semiconductor device. As shown in FIG. 1, the semiconductor device 1 has a configuration in which a semiconductor chip 3 is mounted on a flexible circuit board 2.

The flexible circuit board 2 has a form in which a base material 4 made of an insulating tape (mainly polyimide is used) is punched in a square shape, and a central portion for mounting the semiconductor chip 3 is provided. Device holes 5 are formed.

A plurality of wiring patterns 6 made of copper foil are routed on one surface of the base material 4, and one end of the wiring pattern 6 protrudes from the device hole 5 and is connected to the electrode of the semiconductor chip 3. And an outer lead 8 at the other end for connection to the outside of the apparatus.

The electrodes (not shown) of the semiconductor chip 3
Is connected to the inner leads 7, so that signals can be input and output from the outside of the device to the semiconductor chip 3 via the wiring pattern 6.

In the semiconductor device 1 described above, a dummy pattern 9 that does not contribute to input / output is formed on both sides of the wiring pattern 6, and even if a break occurs in the base material 4, the dummy pattern 9 first receives this and connects the wiring. A device that protects the pattern 6 is known.

[0008]

However, in the above-described semiconductor device, the dummy pattern provided in the region is not connected to the semiconductor chip installed in the device hole or the outside of the device, and is in a state of floating in potential. Had become. Therefore, if the semiconductor device is placed in a noisy environment,
The dummy pattern plays a role of an antenna, and the dummy pattern serves as a noise source, which may deteriorate the signal quality of the adjacent wiring pattern.

SUMMARY OF THE INVENTION The present invention focuses on the above-described conventional problems and degrades the quality of signals input to and output from a semiconductor chip via a wiring pattern even when the semiconductor device itself is placed in an environment with a high noise level. It is an object to provide a semiconductor device without any.

[0010]

SUMMARY OF THE INVENTION The present invention relates to a method of connecting a region having no wiring pattern (a region where a dummy pattern is formed) and a grounding pattern (earth), or a method of forming a wiring pattern sandwiching a region having no wiring pattern. If at least one of them is a grounding pattern and is extended to a region having no wiring pattern, the purpose of installing the conventional dummy pattern can be fulfilled, and the potential of the dummy pattern can be prevented from fluctuating and an antenna effect can be prevented. This is based on knowledge.

That is, in the semiconductor device according to the first aspect, a wiring pattern and a dummy pattern are arranged on an insulating substrate having a device hole, and a flexible circuit board having one end of the wiring pattern protruding from the device hole; A semiconductor device having a semiconductor chip connected to the projecting wiring pattern, wherein the dummy pattern is connected to a ground pattern in the wiring pattern. According to the semiconductor device of the first aspect, the dummy pattern has the same potential (grounded state) as the ground pattern, so that the potential does not fluctuate due to the antenna function (mutual induction by external noise). Since the fluctuation of the potential is suppressed, the dummy pattern becomes a noise generation source, so that it is possible to prevent the noise from affecting adjacent wiring patterns.

According to a second aspect of the present invention, in the semiconductor device, the wiring pattern adjacent to the dummy pattern is used as the ground pattern and is connected to the dummy pattern. According to the semiconductor device of the second aspect, since the wiring pattern adjacent to the dummy pattern is the grounding pattern, it is easy to connect the dummy pattern to the grounding pattern. In order to make the wiring pattern a grounding pattern, the electrode of the semiconductor chip connected to the target wiring pattern may be set as the grounding electrode.

According to a third aspect of the present invention, in the semiconductor device, a plurality of the dummy patterns are provided, a connecting pattern for connecting the dummy patterns is provided, and the connecting pattern and the dummy pattern are connected to the ground pattern. It is characterized by. According to the semiconductor device of the third aspect, in addition to the above-described operation, a plurality of dummy patterns are integrated by the connection pattern.
The contact area of the dummy pattern with the substrate can be increased. For this reason, it is possible to prevent the dummy pattern from peeling off from the substrate.

According to a fourth aspect of the present invention, in the semiconductor device, a wiring pattern and a dummy pattern are arranged on an insulating substrate having a device hole, and a flexible circuit board having one end of the wiring pattern protruding from the device hole;
A semiconductor device having a semiconductor chip connected to the projecting wiring pattern, wherein the wiring pattern is branched around the device hole, and the branched wiring pattern is a grounding pattern. And According to the semiconductor device of the fourth aspect,
The branched wiring pattern is arranged around the device hole. Since the branched wiring pattern is used as the grounding pattern, the potential is constant, and the wiring pattern does not have an antenna effect (mutual induction by external noise). Since the fluctuation of the potential is suppressed, the branched wiring pattern becomes a noise generation source, so that it is possible to prevent the noise from affecting adjacent wiring patterns. The branched wiring pattern can be used for the same purpose as the dummy pattern such as protection of the wiring pattern.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor device according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a plan view showing a semiconductor device according to an embodiment, and FIG. 2 is an enlarged view of a main part in FIG. As shown in these figures, the semiconductor device 10 has a rectangular flexible insulating tape 12 made of polyimide. A device hole 16 having a size large enough to accommodate the semiconductor chip 14 is formed in a central portion thereof.

A wiring pattern 18 made of copper foil is routed around the device hole 16, and the end of the wiring pattern 18 protrudes from each side 20 of the device hole 16 as an inner lead 22. The semiconductor chip 14 fits in the central portion of the device hole 16, and the connection electrode 15 provided on the semiconductor chip 14 is connected to the inner lead 22 to input and output signals to and from the semiconductor chip 14 via the wiring pattern 18. Making it possible. A resin mold (not shown) is applied inside the device hole 16, and the semiconductor chip 14 and the inner lead 22 are sealed to protect the semiconductor chip 14.

By the way, the wiring pattern 18 is set in advance from the input / output relationship of the semiconductor chip 14, and in the figure, the wiring pattern 18 extended from the inner lead 22 is a flexible insulating tape by the input side and the output side. Upper and lower sides 24 that are outer edges of 12
It can be divided into sides.

The end of the wiring pattern 20 protruding from the side 24 is an outer lead 26. By connecting the outer lead 26 to the outside of the device, signals can be input / output to / from the semiconductor chip. .

The space between the inner lead 22 and the outer lead 26, that is, the surface of the wiring pattern 18 routed on the flexible insulating tape 12 is covered with a resist (protective resin film). A short circuit or the like is prevented from occurring.

In such a semiconductor device 10, the wiring pattern 18 is routed from the inner lead 22 as a starting point, but the device hole 16 has a square shape as shown in FIG. For this reason, between the wiring patterns 18 drawn from the adjacent sides 20, there is a region 28 where the wiring pattern 18 is not drawn.

Such a region 28 is formed in the device hole 16.
Are located at the four corners around the
In FIG. 8, a dummy pattern 30 made of copper foil is formed so as to fill the region 28 for the purpose of reinforcing around the device hole 16.

The dummy pattern 30 is designed to be electrically connected to at least one of the adjacent wiring patterns 18 (wiring pattern 18a in the figure). That is, the dummy pattern 30 is obtained by enlarging the width of the wiring pattern 18 adjacent to the region 28.
Has the same potential at any position. The semiconductor chip 1 connected to the wiring pattern 18a
If the fourth connection electrode 15a is a ground electrode (earth electrode), the potential of the wiring pattern 18a and the dummy pattern 30 can be set to the ground potential. The dummy pattern 30 is described in more detail.
Numeral 0 has an (electrically) potential, which is connected to one of the surrounding wiring patterns 18 to prevent the potential from rising.

If the potential of the dummy pattern 30 is set to the ground potential in this way, even if external noise (especially high frequency) is applied to the semiconductor device 10, for example, the dummy pattern 3
In the case of 0, the potential does not fluctuate due to the antenna function (mutual induction by external noise). Therefore, dummy pattern 3
0 can be a noise source and can prevent the adjacent wiring patterns 18 from being affected by noise.

FIG. 3 is an enlarged view of a main part showing an application example relating to a dummy pattern. In the figure, the configuration other than the area 28 is the same as the above-described configuration, and therefore, the description will be given by assigning the same numbers.

As shown in the figure, in the application example, a plurality of dummy patterns 32 are arranged in parallel in the region 28, and the direction thereof is parallel to the adjacent wiring pattern 18b. Further, on one side of the dummy pattern 32 formed only in this manner, a connection pattern 36 for connecting the ends of the dummy pattern 34 is formed. One end of the connection pattern 36 extends beyond the region 28, and the wiring pattern 18a
Is to be connected.

As described above, a plurality of dummy patterns 34 are formed, and a connection pattern 36 for integrating these dummy patterns 34 is formed.
6 is connected to the wiring pattern 18a at the ground potential, the dummy pattern 34 and the connection pattern 36 can be set to the same potential (ground potential) as the wiring pattern 18a.

Since a plurality of dummy patterns 34 are formed, in addition to the above-described effects, adjacent wiring patterns 1 are formed.
8, the pattern density can be made uniform. That is, when the pattern density around the wiring pattern 18 is made uniform, the thermal expansion coefficients become substantially equal, and even if the device itself is repeatedly subjected to a temperature change, the wiring pattern 18 is not subjected to stress due to the difference in the thermal expansion coefficient, and the wiring Pattern 1
8 can be prevented from being cracked or disconnected.

Further, since the plurality of dummy patterns 34 are integrated by the connecting patterns 34, the contact area of the dummy patterns 34 with the flexible insulating tape 12 increases, and the dummy patterns 34 fall off due to bending of the flexible insulating tape 12 or the like. Can be prevented.

In this embodiment, the wiring pattern adjacent to the dummy pattern is used as the ground pattern and the ground potential is used. However, the present invention is not limited to this mode. For example, the wiring pattern not adjacent to the dummy pattern and the dummy pattern may be used. May be connected by pattern routing or a jumper to set the potential.

Although the electrodes of the semiconductor chip are used to set the wiring pattern to the ground potential, an external terminal connected to the outer lead may be used as the ground electrode instead of the electrodes of the semiconductor chip. .

Further, the regions where the dummy patterns are arranged are the four corners of the device hole. However, the present invention is not limited to this configuration. Depending on the arrangement of the electrodes of the semiconductor chip, the dummy pattern may be provided at the center of each side of the device hole. Is also good.

[0033]

As described above, according to the present invention, a flexible circuit board in which a wiring pattern and a dummy pattern are arranged on an insulating substrate having a device hole, and one end of the wiring pattern protrudes from the device hole. When,
A semiconductor device having a semiconductor chip connected to the protruding wiring pattern, wherein the dummy pattern is connected to a ground pattern in the wiring pattern, so that the dummy pattern is stabilized at the same potential as the ground pattern. . For this reason, it is possible to prevent the dummy pattern from acting as an antenna and a noise source, and to prevent the quality of signals input to and output from the semiconductor chip via the wiring pattern from deteriorating.

[Brief description of the drawings]

FIG. 1 is a plan view showing a semiconductor device according to an embodiment.

FIG. 2 is an enlarged view of a main part in FIG.

FIG. 3 is an enlarged view of a main part showing an application example relating to a dummy pattern.

FIG. 4 is a plan view showing the structure of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Flexible circuit board 3 Semiconductor chip 4 Base material 5 Device hole 6 Wiring pattern 7 Inner lead 8 Outer lead 9 Dummy pattern 10 Semiconductor device 12 Flexible insulating tape 14 Semiconductor chip 15 Connecting electrode 16 Device hole 18 Wiring pattern 20 Each Side 22 Inner lead 24 Side 26 Outer lead 28 Area 30 Dummy pattern 32 Dummy pattern 34 Connection pattern

Claims (4)

[Claims] A wiring pattern and a dummy pattern are arranged on an insulating substrate having a device hole, and a flexible circuit board having one end of the wiring pattern protruding from the device hole is connected to the protruding wiring pattern. A semiconductor device having a semiconductor chip, wherein the dummy pattern is connected to a ground pattern in the wiring pattern. 2. The semiconductor device according to claim 1, wherein the wiring pattern adjacent to the dummy pattern is used as the ground pattern and is connected to the dummy pattern. 3. A method according to claim 1, wherein a plurality of said dummy patterns are provided, a connecting pattern connecting said dummy patterns is provided, and said connecting pattern and said dummy pattern are connected to said ground pattern. The semiconductor device according to claim 2. 4. A wiring pattern and a dummy pattern are arranged on an insulating substrate having a device hole, and a flexible circuit board having one end of the wiring pattern protruding from the device hole is connected to the protruding wiring pattern. A semiconductor device having a semiconductor chip to be formed, wherein the wiring pattern is branched around the device hole, and the branched wiring pattern is used as a grounding pattern.