JP2000058990A - Printed board, buildup board and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the etching characteristics of a conductive plate mainly composed of Cu formed by a transfer method, and to provide a printed board formed of a wiring portion which facilitates high-density wiring and the printed board. An object of the present invention is to provide a used build-up board and a semiconductor device including the printed board or the build-up board. SOLUTION: In a printed circuit board including a layer in which conductors are wired, the printed board includes wirings obtained by transferring an etched conductor plate to an insulating substrate, and the conductor plate is mainly made of Cu, and has a surface. Of (200)>
The printed circuit board satisfies the relationship of 35%. Alternatively, the printed circuit board is characterized in that the conductor plate is mainly composed of Cu, and the average crystal grain size measured by an intercept method at the center of the thickness of the cross section is adjusted to 20 μm or less.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board, a build-up board, and a semiconductor device having one or more layers in which conductors are wired.

[0002]

2. Description of the Related Art For example, a CSP (Chip scal) is formed by wiring a conductor for guiding a signal from a semiconductor chip to the outside.
e package) or BGA (Ball grid)
As a technique for forming a wiring portion of a semiconductor device using an array, a build-up board for mounting them, and a high-density mounting board, fine wiring by a transfer method as disclosed in JP-A-8-293510 has been proposed. . A specific example of a method called the transfer method is shown in FIGS.
As shown in (f), an electrolytic copper foil as a carrier material (10) is used as a cathode, and Ni as a barrier material (11) is used.
After forming the plating layer, copper sulfate plating is applied as a wiring portion forming material (12) to prepare a three-layer transfer method foil material (15). Next, a dry film resist (13) is laminated, a desired resist pattern is formed by exposure and development, a wiring portion forming material (12) is selectively etched, and the resist remaining on the wiring forming material is potassium hydroxide. The resist is stripped using a solution.

[0003] Next, the transfer method foil material (15) obtained by the above process is set in a mold, the copper wiring pattern side is transferred to a glass epoxy resin (14), and a carrier material and a barrier material are selected. Etching is performed so that only the transferred copper wiring pattern can be left.
It can be said that this method is suitable for forming a wiring having a narrow pitch of 0 μm or less and a wiring distance of 50 μm or less.

In this transfer method, a thickness of 5 to 18 μm
Since a wiring forming material having a degree of less than or equal to that is used, there is a problem in handleability, so that it is used to impart rigidity to the carrier material. Further, the barrier material is used to prevent the etching solution from reaching the wiring forming material when the carrier material is removed by etching, and conversely, when the wiring forming material is subjected to wiring patterning with the etching solution, the etching solution is used. Is used to prevent the particles from reaching the carrier material.
If the above-described transfer method is used, the copper foil of the wiring transferred to the glass epoxy resin or the like is formed by removing only the carrier material by selective etching and then removing only the barrier material by selective etching, so that etching spots are formed. This method is excellent as a method that is difficult to perform, and is excellent as a technique applicable to a printed board, a build-up board, and high-density wiring formed by using this transfer method.

[0005]

However, in the above-mentioned Japanese Patent Application Laid-Open No. Hei 8-293510, since the copper foil of the wiring portion is simply laminated by plating, the wiring portion is formed by improving the etching shape. No consideration was given to the etchability of the layer to be formed. Therefore, when the wiring portion is formed by etching, etching progresses from the end of the resist, and a phenomenon called side etching in which the cross-sectional shape of the final wiring is etched into a substantially trapezoidal shape may occur.

In order to form a wiring forming material on a barrier material of a foil material for a transfer method by using a plating method disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 8-293510, 2-3 times of plating are required.
Since only a thickness of μm is formed, it is necessary to divide the layers into a desired thickness in several steps, which is not economical, and the thickness of the wiring forming material itself varies, making it difficult to control side etch and the like. Was.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for forming a Cu film by a transfer method.
A printed board formed of a wiring portion that facilitates high-density wiring by improving the etching characteristics of a conductive plate mainly composed of a printed board, a build-up board using the printed board, and the printed board or the build-up board. It is to provide a semiconductor device.

[0008]

SUMMARY OF THE INVENTION The present inventor has studied the problems described above, studied the etching properties of the wiring portion formed by the transfer method, and obtained an etching shape suitable for high-density wiring. The present invention has been achieved by focusing on the orientation and the average crystal grain size.

That is, the present invention provides a printed circuit board comprising a layer in which conductors are wired, wherein the printed board is provided with wiring obtained by transferring an etched conductor plate to an insulating substrate, and the conductor plate comprises Cu. It is a printed circuit board which mainly has a surface orientation satisfying a relation of (200)> 35%. The present invention also provides a printed circuit board comprising a layer in which conductors are wired, wherein the printed board is obtained by transferring an etched conductor plate to an insulating substrate, wherein the conductor plate is mainly composed of Cu, and has a cross-sectional plate thickness. This is a printed circuit board whose center is adjusted to an average crystal grain size of 20 μm or less as measured by an intercept method.

The conductor plate is a printed board made of rolled foil or electrolytic foil mainly composed of Cu. Preferably, the thickness of Cu of the conductor plate is 3 to 18 μm. Further, the present invention is a build-up board formed by laminating one or more layers of the printed board, and a semiconductor device further including the printed board or the build-up board.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail.
An important feature of the present invention lies in the improvement of the etching property. In the transfer method, the shape of the wiring obtained by etching is important because the etched conductor pattern is transferred. That is, when the etching progresses in a substantially trapezoidal shape, the area of the surface capable of being subjected to the roughening treatment on the surface of the wiring portion is reduced, and the bonding strength with the substrate is degraded. There is a problem that the insulation distance cannot be ensured, and there is a danger of a short circuit and a leak current is likely to occur. Therefore, it is necessary to obtain as sharp an etched shape as possible.

As the most effective solution to the above-mentioned problem, the orientation of the surface of the conductor plate is specified to be (200)> 35% in order to impart excellent etching properties which is an important feature of the present invention. When the crystal orientation of the surface of the conductive plate is measured using X-ray diffraction, (200), (220), (31)
The main directions of 1) and (111) are measured. this house,
Since the (200) crystal orientation is an orientation in which a crystal lattice perpendicular to the surface of the conductor plate is obtained, it is a particularly effective crystal face for suppressing side etching. Therefore, (2
By integrating the crystal orientation over 35% in (00), not only defective factors such as a chip in a wiring portion and a change in the width of the lead can be eliminated, but also side etching can be suppressed. And excellent etching properties can be imparted. More preferably, it is 50% or more, but if it exceeds 99%, it is deformed by etching, so that the optimum range is 50% or more and 99% or more.
The range is as follows.

Further, in the present invention, in order to make the surface orientation of the conductive plate (200)> 35% using a rolled foil,
For example, after cold rolling at a rolling reduction of more than 70%,
For example, annealing may be performed at about 400 to 600 ° C. At this time, the rolled foil having a small thickness may have a problem in handling properties.
% May be subjected to cold rolling.

Further, as another means for improving the etching property of the present invention, it is possible to suppress the side etching by setting the average crystal grain size measured by the intercept method at the center of the cross section of the conductor plate to 20 μm. Preferably, the average crystal grain size should be 10 μm or less, more preferably 3 μm.
m or less, and when using electrolytic foil, 1
It is particularly desirable to adjust the thickness to about 5 μm.

In the etching, an etching solution selectively etches crystal grain boundaries. Therefore, by adjusting the average crystal grain size, it is possible to further improve the etching accuracy in forming a narrow-pitch wiring having a wiring width of 50 μm or less and a wiring distance of 50 μm or less, for example, short-circuit and leakage current. It is particularly effective in suppressing the occurrence of blemishes.

In the present invention, in order to adjust the cross section of the conductor plate to the above-mentioned crystal grain size using the rolled foil, for example, 70%
After cold rolling at a moderate reduction rate, annealing may be performed in the range from the recrystallization temperature to the recrystallization temperature + 200 ° C. Also, in this case, since the hardness is reduced to HV 100 or less, in cold rolling,
If mechanical strength is provided, handling properties can be improved.

In the present invention, the electrolytic foil tends to have a smaller crystal grain size on the shiny surface in contact with the cathode and a larger mat surface on the opposite side during production. The largest cause of the change in the crystal grain size of the electrolytic foil is the glue between Cl ⁻ in the electrolytic solution and the additive. Therefore, for example, the crystal grain size is adjusted to the above-mentioned grain size by suppressing the growth of the columnar structure at a concentration of glue by adding the Cl ⁻ in the electrolytic solution for growing the columnar structure of the electrolytic foil by the concentration of the electrolytic solution. Can be.

Next, when rolled foil is used in the present invention, oxygen-free copper, tough pitch copper, or the like may be used because it is easily available. Further, it is preferable to select a material obtained by a method in which nonmetallic inclusions are reduced in the metal structure. Further, if rolled foil is used, for example, it is easy to impart mechanical properties with elongation of 20% or more, so that it is not only suitable for applications where the wiring portion is mechanically bent and used, but also for pinholes and wiring. There are few defects such as cracks and breaks in parts,
From the viewpoint of easy control of the crystal orientation and the average crystal grain size, it is suitable for forming a thin wiring having a thickness of, for example, 18 μm or less and a narrow pitch.

Another advantage of using a rolled foil is that it is easy to uniformly control the cross-sectional crystal grain size of the wiring portion, which is particularly effective in suppressing side etching and forming fine wiring with a narrow pitch. And the change in thickness is small, making it very easy to control the etching, such as adjusting the etching rate of the wiring formation surface, and the wiring itself has no defects such as pinholes found in the plating method. Can be enhanced.

Next, when an electrolytic foil is used in the present invention, it is preferable to select one corresponding to the types 1 to 3 specified by JIS according to its use. Further, a recently developed copper foil having an elongation at a high temperature of more than 30%, a foil having a small crystal grain size in a metal structure, or the like can be used. Among these, there is a copper foil having a tensile strength of 500 N / mm ² or more and excellent in etching properties, and is particularly effective for forming a thin wiring of 18 μm or less and a narrow pitch.

After etching into a desired wiring shape, wiring is formed on the resin substrate by using a transfer method. At this time, as the resin substrate, glass epoxy, polyimide,
BT resin can be used.

According to the present invention, a printed circuit board is formed using the above-described conductor plate. As described above, since the printed circuit board of the present invention uses a conductive plate having excellent etching properties, it is suitable for high-density wiring with a narrow pitch, so that the number of conventional build-up layers can be reduced. for that reason,
The use of the printed board of the present invention can increase the wiring density of the printed board itself, and is particularly effective for a build-up board in which the printed boards of the present invention are stacked, for example, flip-chip mounting, Wafer Level CSP, and the like.

Further, according to the present invention, a semiconductor device can be formed by using the above-mentioned printed board or build-up board.
Although the semiconductor device of the present invention is not particularly limited, a preferred example thereof is as shown in FIG. 1, via a solder ball (3) for guiding a signal from a semiconductor chip (4) to the outside. A semiconductor device that is flip-chip mounted and can transmit a signal to a build-up board (5) in which a plurality of printed boards (2) are stacked, and has a good etching property suitable for a narrow pitch. Since it is used, it is particularly suitable for a semiconductor device (Flip Chip, WaferLevel Package) directly mounted on a build-up substrate. The solid via shown in FIG. 1 can be formed by a method in which a paste of Ag formed in a conical shape penetrates a prepreg, but a plating method may be employed.

In FIG. 1 shown as an example, both surfaces of the build-up substrate are surface-mounted by plating. However, when wiring is formed by plating, it takes a long time to form a plurality of wirings. Many are required, and it is difficult to form a wiring with a narrow pitch. Therefore, also in this surface mounting, if a wiring is formed by a transfer method using the conductive plate having excellent etching properties of the present invention, about one to two layers are formed on both sides,
Since a sufficiently high-density wiring can be formed, a wiring formation time can be shortened and a thinner build-up substrate can be obtained. Incidentally, the build-up board of the present invention is, for example, a base part is a glass epoxy laminated board, and a through hole connecting the surface of the base is filled with epoxy resin, or a built-up surface mount, or In which a build-up board and surface mounting are combined.

Further, according to the present invention, for example, as shown in FIG.
A signal is transmitted from the semiconductor chip (4) bonded by the above to each wiring board (1) formed on the resin substrate (2) made of glass epoxy resin through the bonding wire (7), and the wiring board (1) Can be a BGA having a structure in which a signal is guided to the outside by a solder ball (3) or the like. In the present invention, for example, as shown in FIG. 2B, a heat spreader (9) may be used as a temporary substrate. Needless to say, the present invention is also suitable for a CSP, a multi-layer BGA, or the like as a semiconductor device using the conductor plate having excellent etching characteristics of the present invention.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on embodiments. As the rolled foil, the intermediate rolling was changed to 72 to 85%, then annealed at 500 ° C, and the finish rolling was further performed to 12 to 15%.
% And a 15 μm rolled foil was prepared. As a comparative example, a rolled foil used for a conductor plate finished to 15 μm without annealing and finish rolling was prepared. Next, the surface of the conductor plate was subjected to X-ray diffraction to obtain (200), (22)
The main directions of (0), (311), and (111) were measured, and the degree of integration of (200) was determined using the following equation. % = I (200) / ΣI × 100 (ΣI = I (111)
+ I (200) + I (220) + I (311)) Next, in order to measure the average crystal grain size, the cross section was measured with an optical microscope, and the average crystal grain size at the center of the plate thickness was measured by an intercept method.

Next, Ni of 0.5 μm is formed as a barrier material on the oxygen-free copper carrier material by plating, and the joining surface between the barrier material surface and the rolled foil for the conductor plate is activated in a vacuum. Then, they were joined by low rolling reduction to obtain a three-layer composite foil.
Selectively etch the conductor plate formed on the three-layer composite foil described above,
The etching properties were evaluated. As an evaluation of etching properties,
After forming a photoresist film having a rectangular opening of 50 μm on the sample, the conductor plate is etched with an alkali etchant, and the etching amount D in the thickness direction and the etching amount S in the plate width direction are measured. Factor ES
Was determined by the following equation. Etching factor (ES) = D / S Table 1 shows the results of the above X-ray crystal orientation, average crystal grain size, and etching properties.

[0028]

[Table 1]

Next, the electrolytic foil having the adjusted crystal grain size shown in Table 2 was formed into a three-layer composite by the same manufacturing method as the rolled foil, and the average crystal grain size and etching characteristics were determined. Table 2 shows the measurement results. .

[0030]

[Table 2]

It can be seen that all of the conductor plates obtained according to the present invention have excellent etching properties. Also,
The result of observing the corner of the wiring portion with a microscope also confirmed that the wiring was etched substantially at right angles. This conductor plate is transferred to a glass epoxy resin by a transfer method, a carrier material and a barrier material are selectively etched to form a printed board, and a plurality of the printed boards are laminated to form a build-up board. It was a semiconductor device.

[0032]

According to the present invention, a conductive plate having excellent etching properties and an unprecedented combination of the transfer method are used to form a printed wiring board having a narrow pitch of 50 μm or less and a wiring distance of 50 μm or less. This is advantageous and is an indispensable technique for a semiconductor device having high-density wiring.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a semiconductor device illustrating an example of the present invention.

FIG. 2 is a configuration diagram of a semiconductor device illustrating an example of the present invention.

FIG. 3 is a schematic diagram showing a typical semiconductor device manufacturing process of the transfer method.

[Explanation of symbols]

1. 1. copper wiring; 2. resin substrate; 3. solder balls; 4. semiconductor chip; 5. Build-up board, Encapsulated resin,
7. Bonding wire, 8. 8. die bonding material; Heat spreader, 10; Carrier material, 11. Barrier material, 1
2. 12. wiring forming material; Dry film resist, 1
4. Glass epoxy resin, 15. Composite foil material for transfer method

Claims (7)

[Claims] 1. A printed circuit board comprising a layer in which conductors are wired, wherein the printed board comprises wiring obtained by transferring an etched conductor plate to an insulating substrate, wherein the conductor plate is mainly composed of Cu, Surface orientation is (200)>
A printed circuit board satisfying a relationship of 35%. 2. A printed circuit board comprising a layer on which conductors are wired, wherein the printed board comprises wiring obtained by transferring an etched conductor plate to an insulating substrate, wherein the conductor plate is mainly composed of Cu, A printed circuit board, wherein an average crystal grain size measured by an intercept method at a center of a thickness of a cross section is adjusted to 20 μm or less. 3. The printed circuit board according to claim 1, wherein the conductor plate is a rolled foil mainly composed of Cu. 4. The printed circuit board according to claim 2, wherein the conductor plate is an electrolytic foil mainly composed of Cu. 5. The printed circuit board according to claim 1, wherein the conductive plate has a thickness of 3 to 18 μm. 6. A build-up board comprising the printed circuit board according to claim 5 in one or more layers. 7. A semiconductor device comprising the printed board or the build-up board according to any one of claims 1 to 6.