JP2000058993A - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JP2000058993A JP2000058993A JP10223389A JP22338998A JP2000058993A JP 2000058993 A JP2000058993 A JP 2000058993A JP 10223389 A JP10223389 A JP 10223389A JP 22338998 A JP22338998 A JP 22338998A JP 2000058993 A JP2000058993 A JP 2000058993A
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- circuit board
- conductive layers
- substrate
- polymer alloy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 239000004696 Poly ether ether ketone Substances 0.000 claims abstract description 29
- 229920002530 polyetherether ketone Polymers 0.000 claims abstract description 29
- 229920000642 polymer Polymers 0.000 claims abstract description 22
- 239000000956 alloy Substances 0.000 claims abstract description 21
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 21
- 239000004642 Polyimide Substances 0.000 claims description 8
- 229920001721 polyimide Polymers 0.000 claims description 8
- 229920005992 thermoplastic resin Polymers 0.000 abstract description 8
- 238000003825 pressing Methods 0.000 abstract description 6
- 238000010438 heat treatment Methods 0.000 abstract description 5
- JUPQTSLXMOCDHR-UHFFFAOYSA-N benzene-1,4-diol;bis(4-fluorophenyl)methanone Chemical compound OC1=CC=C(O)C=C1.C1=CC(F)=CC=C1C(=O)C1=CC=C(F)C=C1 JUPQTSLXMOCDHR-UHFFFAOYSA-N 0.000 description 16
- 239000000463 material Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000007731 hot pressing Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920003002 synthetic resin Polymers 0.000 description 2
- 239000000057 synthetic resin Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、絶縁基板の上面と
下面の両面に、配線パターンとしての導電層が形成され
る回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having a conductive layer as a wiring pattern formed on both upper and lower surfaces of an insulating substrate.
【０００２】[0002]
【従来の技術】従来、フィルム状の薄い絶縁基板の両面
に、配線パターンとしての導電層を形成した回路基板
が、自動車用電装品、電気機器等で使用されている。2. Description of the Related Art Conventionally, a circuit board in which a conductive layer as a wiring pattern is formed on both sides of a thin insulating substrate in the form of a film has been used for electric parts for automobiles, electric equipment and the like.
【０００３】絶縁基板の両面に導電パターンを形成した
回路基板では、一般に、両面の導電パターンを導通・接
続する場合、絶縁基板及びその両側の導電パターンにス
ルーホールを形成し、そのスルーホール内に無電解メッ
キ、電解メッキを施して導通部を形成し、両面の導電パ
ターンを導通させる方法が採られる。In a circuit board having conductive patterns formed on both surfaces of an insulating substrate, generally, when conducting and connecting the conductive patterns on both surfaces, through holes are formed in the insulating substrate and the conductive patterns on both sides thereof, and the through holes are formed in the through holes. A method is employed in which a conductive portion is formed by applying electroless plating or electrolytic plating, and the conductive patterns on both surfaces are conducted.
【０００４】[0004]
【発明が解決しようとする課題】しかし、このようなメ
ッキ処理による導通部の形成は、工程数が非常に多くな
り、コスト高となる問題があって、従来、フィルム状の
薄い絶縁基板を使用する場合において、ホットプレスに
より簡便に絶縁基板の両面の導電層を相互に接続する方
法が、特開平１−１９４３８５号公報等で提案されてい
る。However, the formation of the conductive portion by such a plating process involves a problem that the number of steps is very large and the cost is high. Conventionally, a thin film-shaped insulating substrate is used. In such a case, a method for easily connecting the conductive layers on both surfaces of the insulating substrate to each other by hot pressing is proposed in Japanese Patent Application Laid-Open No. 1-194385.
【０００５】この方法は、絶縁フィルムの両面に形成さ
れた導電層の上下から、ホットプレスを押し当てること
により、絶縁フィルムをその箇所で薄肉化し、或は無肉
化して両面の導電層を接触させ、接続するものである。[0005] In this method, a hot press is pressed from above and below a conductive layer formed on both surfaces of an insulating film to make the insulating film thinner or thinner at that location and to contact the conductive layers on both surfaces. Let's connect.
【０００６】然しながら、この従来の方法では、絶縁フ
ィルムを導通・接続箇所で薄肉化し或は無肉化するため
に、絶縁フィルムに熱可塑性樹脂を用いることになる
が、汎用されている一般の熱可塑性樹脂のフィルムを絶
縁基板として使用すると、製造後の使用時において、高
温雰囲気中でその回路が長時間使用された場合、熱可塑
性樹脂フィルムは一般に、熱変形温度が比較的低く、耐
熱性が悪いため、絶縁基板が変形し、回路基板の良好な
動作が阻害される恐れが生じていた。However, in this conventional method, a thermoplastic resin is used for the insulating film in order to make the insulating film thinner or thinner at the conduction / connection portion. When a film of a thermoplastic resin is used as an insulating substrate, the thermoplastic resin film generally has a relatively low heat deformation temperature and a low heat resistance when the circuit is used for a long time in a high-temperature atmosphere during use after manufacture. Poorly, the insulating substrate is deformed, and the good operation of the circuit board may be hindered.
【０００７】本発明は、上記の点に鑑みてなされたもの
で、絶縁基板の両面に形成した導電層間の接続を加熱・
押圧により簡単に行なうことができると共に、使用時に
おける絶縁基板の熱変形等を防止することができる回路
基板を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has been made by heating and connecting a conductive layer formed on both surfaces of an insulating substrate.
An object of the present invention is to provide a circuit board that can be easily performed by pressing and that can prevent thermal deformation and the like of an insulating substrate during use.
【０００８】[0008]
【課題を解決するための手段】上記目的を達成するため
に、本発明の請求項１の回路基板は、絶縁基板の両面
に、配線パターンとしての導電層が形成されてなる回路
基板において、絶縁基板がポリエーテルエーテルケトン
を主成分とするポリマーアロイを材料にしてフィルム状
に形成され、両導電層が両側から加熱・押圧されること
により、相互接続されていることを特徴とする。In order to achieve the above object, a circuit board according to a first aspect of the present invention is a circuit board having a conductive layer as a wiring pattern formed on both sides of an insulating board. The substrate is formed in a film shape using a polymer alloy containing polyetheretherketone as a main component, and both conductive layers are interconnected by being heated and pressed from both sides.
【０００９】また、請求項２の回路基板は、上記請求項
１の回路基板において、ポリエーテルエーテルケトンを
主成分とするポリマーアロイにポリイミドが混合されて
いることを特徴とする。According to a second aspect of the present invention, there is provided the circuit board according to the first aspect, wherein a polyimide is mixed with a polymer alloy containing polyetheretherketone as a main component.
【００１０】更に、請求項３の回路基板は、絶縁基板の
両面に、配線パターンとしての導電層が形成されてなる
回路基板において、絶縁基板がポリエーテルエーテルケ
トンによりフィルム状に形成され、両導電層が両側から
加熱・押圧されることにより、相互接続されていること
を特徴とする。In a third aspect of the present invention, there is provided a circuit board having a conductive layer as a wiring pattern formed on both surfaces of an insulating substrate. The layers are interconnected by being heated and pressed from both sides.
【００１１】更に、請求項４の回路基板は、上記請求項
１又は３記載の回路において、両導電層が相互に接続さ
れる接続箇所の絶縁基板に、孔が穿設されていることを
特徴とする。According to a fourth aspect of the present invention, there is provided the circuit board according to the first or third aspect, wherein a hole is formed in the insulating substrate at a connection portion where the conductive layers are connected to each other. And
【００１２】[0012]
【発明の作用・効果】請求項１又は３の回路基板では、
絶縁基板が熱可塑性樹脂であるポリエーテルエーテルケ
トン、或はポリエーテルエーテルケトンを主成分とする
ポリマーアロイによりフィルム状に形成されているか
ら、両面の導電層を相互に接続しようとする箇所を、ホ
ットプレス、超音波プレス装置などにより、両側から加
熱・押圧すれば、絶縁基板がその部分で容易に薄肉化或
は無肉化され、両導電層を簡単に熱圧着して相互に接続
することができる。According to the circuit board of claim 1 or 3,
Since the insulating substrate is formed in a film shape from a polyetheretherketone, which is a thermoplastic resin, or a polymer alloy containing polyetheretherketone as a main component, a portion where the conductive layers on both surfaces are to be connected to each other, By heating and pressing from both sides with a hot press, ultrasonic press, etc., the insulating substrate can be easily thinned or thinned at that part, and both conductive layers can be easily thermocompressed and connected to each other. Can be.
【００１３】また、絶縁基板には、耐熱性、熱安定性の
良いポリエーテルエーテルケトン、或はポリエーテルエ
ーテルケトンを主成分とするポリマーアロイから形成さ
れるから、回路がその使用時に高温雰囲気中で長時間使
用されたとしても、基板の熱変形や熱劣化を防止し、回
路の良好な動作を確保することができる。Further, since the insulating substrate is formed of polyetheretherketone or a polymer alloy containing polyetheretherketone as a main component having good heat resistance and heat stability, the circuit is exposed to a high-temperature atmosphere during use. Therefore, even if the substrate is used for a long time, thermal deformation and thermal deterioration of the substrate can be prevented, and good operation of the circuit can be ensured.
【００１４】また、請求項２の回路基板のように、ポリ
エーテルエーテルケトンにポリイミドを混合したポリマ
ーアロイにより絶縁基板を形成すれは、更に良好な耐熱
性や熱安定性を有し、回路基板の寿命を大きく向上させ
ることができる。Further, when the insulating substrate is formed by a polymer alloy in which polyimide is mixed with polyetheretherketone as in the circuit substrate of claim 2, the circuit substrate has better heat resistance and thermal stability. The life can be greatly improved.
【００１５】[0015]
【発明の実施の形態】以下、本発明の実施の形態を図面
に基づいて説明する。図１は回路基板の平面図を示し、
図２、図３は製造時のその断面図を示している。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a plan view of a circuit board,
2 and 3 show cross-sectional views during manufacturing.
【００１６】この回路基板の絶縁基板１は、ＰＥＥＫ
（ポリエーテルエーテルケトン）を主成分とするポリマ
ーアロイ（以下ＰＥＥＫポリマーアロイと言う）を材料
にして、フィルム状に形成される。その厚さは、約１２
μｍ〜７０μｍ、望ましくは約２５μｍ〜５５μｍであ
る。このＰＥＥＫポリマーアロイには、基材となるＰＥ
ＥＫに対しポリイミドが約４０％〜５０％混合され、Ｐ
ＥＥＫ自体が一般の合成樹脂に比べ、熱安定性の良好な
熱可塑性樹脂であるが、ポリイミドを混合することによ
り、さらに良好な熱安定性を有した合成樹脂となってい
る。The insulating substrate 1 of this circuit board is made of PEEK
It is formed into a film shape using a polymer alloy (hereinafter referred to as PEEK polymer alloy) containing (polyether ether ketone) as a main component. Its thickness is about 12
μm to 70 μm, desirably about 25 μm to 55 μm. This PEEK polymer alloy has PE as a base material.
About 40% to 50% of polyimide is mixed with EK.
EEK itself is a thermoplastic resin having better thermal stability than a general synthetic resin. However, by mixing polyimide, it becomes a synthetic resin having better thermal stability.
【００１７】このＰＥＥＫポリマーアロイ製の絶縁基板
１の両面に、配線パターンとしての導電層２、３が形成
される。これらの導電層２、３は、厚さ約１８μｍの銅
箔から形成され、接着剤或は熱融着により絶縁基板１の
両面に接着され、エッチング等により所定の形状にパタ
ーンニングされる。Conductive layers 2 and 3 as wiring patterns are formed on both surfaces of the insulating substrate 1 made of the PEEK polymer alloy. These conductive layers 2 and 3 are formed of a copper foil having a thickness of about 18 μm, adhered to both surfaces of the insulating substrate 1 by an adhesive or heat fusion, and patterned into a predetermined shape by etching or the like.
【００１８】図１に示すように、絶縁基板１の両面に取
着された導電層２と導電層３が上下で交差する箇所で、
導電層２、３は、相互に接続される。この両導電層２、
３の接続は、例えばホットプレスにより圧着して行なわ
れる。As shown in FIG. 1, at a place where the conductive layer 2 and the conductive layer 3 attached to both sides of the insulating substrate 1 intersect vertically,
The conductive layers 2 and 3 are connected to each other. These two conductive layers 2,
The connection of No. 3 is performed by, for example, hot pressing.
【００１９】即ち、図２に示すように、導電層２、３を
形成した絶縁基板１の上下にホットプレスヘッド４、５
を配設し、加熱コイルによりホットプレスヘッド４、５
を加熱した状態で、プレス機構によりホットプレスヘッ
ド４、５を上昇或は下降させ、両導電層２、３の接続予
定箇所を、ホットプレスヘッド４、５の先端で押圧す
る。That is, as shown in FIG. 2, hot press heads 4 and 5 are placed above and below an insulating substrate 1 on which conductive layers 2 and 3 are formed.
And the hot press heads 4, 5
Is heated, the press mechanism raises or lowers the hot press heads 4 and 5, and presses the portions where the conductive layers 2 and 3 are to be connected with the tips of the hot press heads 4 and 5.
【００２０】このホットプレスヘッド４、５による上下
の押圧動作により、上下の導電層２、３がその押圧箇所
で凹状に変形すると共に、熱可塑性樹脂であるＰＥＥＫ
ポリマーアロイ製の絶縁基板１が押圧箇所で薄肉化し或
は無肉化し、図２（ａ）に示すように、上下の導電層
２、３同士が内側で圧着し、電気的接続がなされる。The upper and lower conductive layers 2 and 3 are deformed concavely at the pressed portions by the vertical pressing operation by the hot press heads 4 and 5, and the thermoplastic resin PEEK is used.
The insulating substrate 1 made of a polymer alloy is reduced in thickness or reduced in thickness at the pressed portion, and as shown in FIG. 2A, the upper and lower conductive layers 2 and 3 are press-fitted on the inner side, and electrical connection is made.
【００２１】このように、ホットプレス加工のみの工程
で、両導電層２、３の接続を完了することができるた
め、従来の基板にスルーホールを形成後、メッキ処理に
より導通部を形成して接続する工程に比べ、遥かに簡単
に少ない工程で両導電層２、３の電気的接続を行なうこ
とができる。As described above, the connection between the two conductive layers 2 and 3 can be completed only by the step of hot pressing, so that a through-hole is formed in a conventional substrate and then a conductive portion is formed by plating. The electrical connection between the two conductive layers 2 and 3 can be performed much more easily and in fewer steps than in the connection step.
【００２２】また、上記のように製造された回路基板
は、その絶縁基板１が熱安定性の良いＰＥＥＫポリマー
アロイから形成されるから、回路がその使用時に高温雰
囲気中で長時間使用されたとしても、基板の熱変形や熱
劣化を防止し、回路の良好な動作を確保することができ
る。特にＰＥＥＫにポリイミドを混合したＰＥＥＫポリ
マーアロイは、更に良好な耐熱性や耐熱変形性を有し、
回路基板の寿命を大きく向上させることができる。In the circuit board manufactured as described above, since the insulating substrate 1 is formed of a PEEK polymer alloy having good thermal stability, it is assumed that the circuit has been used for a long time in a high-temperature atmosphere during its use. In addition, thermal deformation and thermal deterioration of the substrate can be prevented, and favorable operation of the circuit can be ensured. In particular, PEEK polymer alloy in which PEEK is mixed with polyimide has better heat resistance and heat deformation resistance,
The life of the circuit board can be greatly improved.
【００２３】図３は他の実施例を示している。この例で
は、絶縁基板１１の接続予定箇所つまり上下の導電層１
２、１３が交差する箇所に、予め孔１１ａが形成され
る。絶縁基板１１は、上記と同様、ＰＥＥＫポリマーア
ロイを材料としてフィルム状に形成され、絶縁基板１１
の上面と下面には、配線パターンとしての導電層１２、
１３が形成される。FIG. 3 shows another embodiment. In this example, the connection planned portions of the insulating substrate 11, that is, the upper and lower conductive layers 1
A hole 11a is formed in advance at a location where the intersections 2 and 13 intersect. As described above, the insulating substrate 11 is formed in a film shape using a PEEK polymer alloy as a material.
A conductive layer 12 as a wiring pattern,
13 are formed.
【００２４】両面の導電層１２、１３をその交差箇所で
接続する場合、上記と同様に、導電層１２、１３を形成
した絶縁基板１１の上下にホットプレスヘッド４、５を
配設し、加熱コイルによりホットプレスヘッド４、５を
加熱した状態で、プレス機構によりホットプレスヘッド
４、５を上昇或は下降させ、両導電層１２、１３の接続
予定箇所を、ホットプレスヘッド４、５の先端で押圧す
る。When the conductive layers 12 and 13 on both sides are connected at their intersections, hot press heads 4 and 5 are disposed above and below the insulating substrate 11 on which the conductive layers 12 and 13 are formed, and heating is performed. While the hot press heads 4 and 5 are heated by the coils, the hot press heads 4 and 5 are raised or lowered by the press mechanism, and the connecting portions of the conductive layers 12 and 13 are connected to the tips of the hot press heads 4 and 5. Press with.
【００２５】この時、押圧する箇所の絶縁基板１１には
孔１１ａが設けられているため、ホットプレスヘッド
４、５による導電層１２、１３の凹状変形は容易に行な
われ、図３（ｂ）のように、導電層１２、１３同士が内
側で熱圧着され、電気的接続がなされる。絶縁基板１１
がＰＥＥＫポリマーアロイから形成されるため、熱安定
性が良好で、上記と同様に、回路の使用時における熱変
形や熱劣化を防止できる。At this time, since the hole 11a is provided in the insulating substrate 11 at the position to be pressed, the concave deformation of the conductive layers 12, 13 by the hot press heads 4, 5 is easily performed, and FIG. As described above, the conductive layers 12 and 13 are thermocompression-bonded on the inner side, and an electrical connection is made. Insulating substrate 11
Is formed from a PEEK polymer alloy, so that it has good thermal stability and, similarly to the above, can prevent thermal deformation and thermal degradation during use of the circuit.
【００２６】なお、本発明は上記実施形態に限定される
ものではなく、以下のような態様でも実施することがで
きる。It should be noted that the present invention is not limited to the above embodiment, but can be carried out in the following modes.
【００２７】上記実施例では、ホットプレスを用いて
両導電層を圧着・接続したが、超音波プレス装置或は超
音波溶着装置を用いて、両導電層を圧着・接続すること
もできる。In the above embodiment, the two conductive layers are pressed and connected by using a hot press. However, the two conductive layers may be pressed and connected by using an ultrasonic pressing device or an ultrasonic welding device.
【００２８】また、上面と下面の両導電層の複数箇所
を、同時に圧着・接続することも可能である。It is also possible to simultaneously press-bond and connect a plurality of locations on both the upper and lower conductive layers.
【００２９】更に、上記絶縁基板の硬さは、ＰＥＥＫ
ポリマーアロイの製造時に任意に設定することができ
る。Further, the hardness of the insulating substrate is PEEK.
It can be set arbitrarily during the production of the polymer alloy.
【００３０】上記実施例では、ＰＥＥＫにポリイミド
を混合してＰＥＥＫポリマーアロイとしたが、ポリイミ
ド以外の耐熱性或は熱安定性の良好な高分子をＰＥＥＫ
に混合してＰＥＥＫポリマーアロイを作り、絶縁基板の
材料として使用することもできる。In the above embodiment, PEEK was mixed with polyimide to obtain a PEEK polymer alloy. However, a polymer other than polyimide having good heat resistance or thermal stability was used.
To make a PEEK polymer alloy, which can be used as a material for an insulating substrate.
【００３１】更に、ＰＥＥＫ自体が、耐熱性、熱安定
性の良好な熱可塑性樹脂であるからＰＥＥＫのみを材料
にして絶縁基板を形成しても、本発明の効果を得ること
ができる。Further, since PEEK itself is a thermoplastic resin having good heat resistance and thermal stability, the effects of the present invention can be obtained even if an insulating substrate is formed using only PEEK as a material.
【図１】本発明の一実施形態を示す回路基板の平面図で
ある。FIG. 1 is a plan view of a circuit board showing one embodiment of the present invention.
【図２】図１のII-II 線位置における接続前の拡大断面
図（ａ）と接続工程時の拡大断面図（ｂ）である。FIGS. 2A and 2B are an enlarged cross-sectional view (a) before connection at an II-II line position in FIG. 1 and an enlarged cross-sectional view during a connection step.
【図３】他の実施例の接続前の拡大断面図（ａ）と接続
工程時の拡大断面図（ｂ）である。3A and 3B are an enlarged cross-sectional view before connection of another embodiment and an enlarged cross-sectional view during a connection step.
１−絶縁基板 ２−導電層 ３−導電層 1-insulating substrate 2-conductive layer 3-conductive layer
Claims (4)
の導電層が形成されてなる回路基板において、 該絶縁基板がポリエーテルエーテルケトンを主成分とす
るポリマーアロイを材料にしてフィルム状に形成され、
該両導電層が両側から加熱・押圧されることにより、相
互接続されていることを特徴とする回路基板。1. A circuit board having a conductive layer as a wiring pattern formed on both sides of an insulating substrate, wherein the insulating substrate is formed in a film shape using a polymer alloy containing polyetheretherketone as a main component. ,
A circuit board, wherein the conductive layers are interconnected by being heated and pressed from both sides.
するポリマーアロイにはポリイミドが混合されている請
求項１記載の回路基板。2. The circuit board according to claim 1, wherein a polyimide is mixed with the polymer alloy containing polyetheretherketone as a main component.
の導電層が形成されてなる回路基板において、 該絶縁基板がポリエーテルエーテルケトンによりフィル
ム状に形成され、該両導電層が両側から加熱・押圧され
ることにより、相互接続されていることを特徴とする回
路基板。3. A circuit board having a conductive layer as a wiring pattern formed on both surfaces of an insulating substrate, wherein the insulating substrate is formed in a film shape from polyetheretherketone, and the two conductive layers are heated from both sides. A circuit board which is interconnected by being pressed.
所の絶縁基板に、孔が穿設されている請求項１又は３記
載の回路基板。4. The circuit board according to claim 1, wherein a hole is formed in the insulating substrate at a connection point where the conductive layers are connected to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10223389A JP2000058993A (en) | 1998-08-06 | 1998-08-06 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10223389A JP2000058993A (en) | 1998-08-06 | 1998-08-06 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000058993A true JP2000058993A (en) | 2000-02-25 |
Family
ID=16797389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10223389A Pending JP2000058993A (en) | 1998-08-06 | 1998-08-06 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000058993A (en) |
-
1998
- 1998-08-06 JP JP10223389A patent/JP2000058993A/en active Pending
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