JP2000058635A - Method for forming element isolation insulating film and semiconductor device - Google Patents

Abstract

[PROBLEMS] To provide a method for forming an inter-element isolation insulating film capable of making the thickness of a silicon oxide film formed by thermal oxidation uniform and avoiding the occurrence of protrusions on a silicon substrate and sharp corners of the silicon oxide film. obtain. A silicon oxide film and a silicon nitride film each having an opening above an element isolation region are formed on a surface of a P-type silicon substrate. Next, the P-type silicon substrate 1 is etched to a predetermined depth using the silicon nitride film 3 as a mask to form a trench 5. Next, silicon ions are implanted into the P-type silicon substrate 1 exposed on the side and bottom surfaces of the trench 5 to form an ion implantation region 6. As a result, the P-type silicon substrate 1 in the ion implantation region 6 is made amorphous, and the plane orientation of the P-type silicon substrate 1 in this portion can be eliminated. Next, a silicon oxide film 7 is formed by thermally oxidizing the surface of the P-type silicon substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an element isolation insulating film for electrically isolating elements formed on a substrate of a semiconductor device, and more particularly to an element isolation insulating film using a trench isolation technique. The present invention relates to a method for forming a film, and further relates to a semiconductor device including an element isolation insulating film.

[0002]

2. Description of the Related Art In recent years, miniaturization of semiconductor devices has been promoted. For example, in the case of a DRAM, the integration has been increased four times in about three years. Accordingly, the conventional L
Since it has become difficult to form an element isolation insulating film by the OCOS technique, a trench isolation technique of forming an element isolation insulating film using a trench has been developed as an element isolation technique replacing the LOCOS technique.

FIG. 23 is a cross-sectional view schematically showing a structure of a conventional semiconductor device having an element isolation insulating film formed by a trench isolation technique. A MOS transistor 201A having a gate electrode 201a and a source / drain region 202a is formed in a first element formation region of the silicon substrate 101, and a gate electrode 201b and a source / drain region are formed in a second element formation region. Drain region 2
The MOS transistor 201B having the transistor 02b is formed. The element isolation region between the first element formation region and the second element formation region of the silicon substrate 101 includes an element isolation region for electrically isolating the MOS transistor 201A and the MOS transistor 201B. The insulating film 203 is formed by a trench isolation technique.
The gate electrode 201c on the element isolation insulating film 203
Is a gate electrode of a MOS transistor formed in an element formation region located before or behind the plane of FIG.

FIGS. 24 to 30 are sectional views sequentially showing a conventional method of forming an element isolation insulating film using a trench isolation technique. First, a silicon oxide film 102 is formed on the entire surface by thermally oxidizing the upper surface of the silicon substrate 101, and then a silicon nitride film 103 is deposited on the entire surface of the silicon oxide film 102 by a CVD method. Thereafter, a resist pattern 104 having an opening above the element isolation region of the silicon substrate 101 is formed on the silicon nitride film 103 by photolithography (FIG. 24).

Next, the silicon nitride film 103 and the silicon oxide film 102 are sequentially etched using the resist pattern 104 as a mask, so that the resist pattern 10
The silicon substrate 101 in a region where no 4 is formed is exposed. After that, the resist pattern 104 is removed (FIG. 25). Next, using the silicon nitride film 103 as a mask,
The trench 105 is formed by etching the silicon substrate 101 from the upper surface to a predetermined depth.
6). As a result, the silicon substrate 101 is exposed on the side and bottom surfaces of the trench 105.

Next, silicon oxide film 106 is formed by thermally oxidizing silicon substrate 101 exposed by formation of trench 105 (FIG. 27). Next, CVD
By a method, a silicon oxide film 109 is deposited on the entire surface (FIG. 28). As a result, the trench 105 is filled with the silicon oxide film 109. Next, CMP (Chemic
The surface is planarized by etching back the silicon oxide film 109 to such an extent that the silicon oxide film 106 is not exposed by an Al Mechanical Polishing method (FIG. 29). Next, after the silicon nitride film 103 is removed by hot phosphoric acid, the silicon oxide film 102 is removed until the silicon oxide film 102 existing in the element formation region of the silicon substrate 101 is removed.
109 is removed with a hydrofluoric acid solution (FIG. 30).

Through the above steps, an element isolation insulating film can be formed in the element isolation region of the silicon substrate 101 as the silicon oxide films 106 and 109 shown in FIG.

[0008]

As described above, according to the conventional method of forming an isolation insulating film using a trench isolation technique, after a trench is formed in a silicon substrate, the exposed silicon substrate is directly thermally oxidized. By doing so, a silicon oxide film is formed. At this time, due to the plane orientation of the single crystal silicon constituting the silicon substrate, a corner formed by the intersection of the surface of the silicon substrate and the side surface of the trench and the intersection of the side surface of the trench and the bottom surface of the trench are formed. It is difficult for the thermal oxidation reaction to proceed at the corners where As a result, the thickness of the silicon oxide film 106 becomes non-uniform as shown in FIG.
There is a problem that a projection 107 is formed on the silicon oxide film 106 and an acute angle portion 108 is formed on the silicon oxide film 106. The presence of the protrusions on the silicon substrate and the sharp corners of the silicon oxide film makes the stress caused by the distortion of the interface between the silicon substrate and the silicon oxide film due to the thermal oxidation uneven. In particular, stress is concentrated at a corner formed by the intersection of the side surface of the trench and the bottom surface of the trench, which breaks the regularity of the crystal lattice of the silicon substrate, generates crystal defects, and increases the leak current. .

[0009] Further, the projections on the silicon substrate may cause an inverse narrow channel effect. FIG.
FIG. 4 is a sectional view in a depth direction of an X portion of the semiconductor device shown in FIG. 3. Since a plurality of wet treatments are performed between the time when the silicon oxide film is formed in the element isolation region and the time when the gate electrode is formed, the silicon oxide film on the protrusion 107 is removed, and The silicon substrate 101 is exposed. As a result, a depression of the gate electrode 201b occurs above the protrusion 107 of the silicon substrate 101, and a parasitic MOS transistor is formed in the Y portion shown in FIG. The parasitic MOS transistor operates earlier than the MOS transistor 201B due to the electric field concentration caused by the depression of the gate electrode 201b, and the MOS transistor 2
The operating threshold voltage of 01B decreases. Then, the influence becomes more remarkable as the gate width becomes narrower with miniaturization of the semiconductor device.

The present invention has been made to solve such a problem. After a trench is formed in a silicon substrate, the thickness of a silicon oxide film formed by thermal oxidation is made uniform, and the protrusion of the silicon substrate is formed. It is another object of the present invention to provide a method for forming an element isolation insulating film capable of avoiding generation of an acute angle portion of a silicon oxide film.

[0011]

Means for Solving the Problems Claim 1 of the present invention
The method for forming an inter-element isolation insulating film according to (1), comprises: (a) forming a recess from the upper surface of the substrate in the inter-element isolation region; and (b) intersecting at least a side surface of the recess and a bottom surface of the recess in the substrate. (C) a step of forming a thermal oxide film in the concave portion, which is performed after the step (b), and (d) a thermal process in the concave portion. Filling the recess with the insulating film by forming an insulating film on the oxide film.

According to a second aspect of the present invention, there is provided a method for forming an inter-element isolation insulating film according to the first aspect, wherein the step (b) comprises the steps of: In the substrate, the second corner formed by the intersection of the upper surface of the substrate and the side surface of the recess is also non-single-crystallized.

According to a third aspect of the present invention, a method for forming an inter-element isolation insulating film according to the second aspect is the method for forming an inter-element isolation insulating film according to the second aspect. Is carried out by implanting ions into the substrate exposed on the side and bottom surfaces of the substrate.

According to a fourth aspect of the present invention, there is provided a method for forming an inter-element isolation insulating film according to the third aspect, wherein the method comprises the step of implanting ions into a substrate. The depth is not more than the thickness of a portion formed in the substrate in the thermal oxide film formed in the step (c).

According to a fifth aspect of the present invention, there is provided a method of forming an inter-element isolation insulating film according to the third aspect, wherein the method comprises the steps of implanting ions into a substrate. Is performed by a step of implanting ions into the substrate obliquely with respect to a normal direction of the bottom surface of the concave portion, and a step of implanting the ions into the substrate from a normal direction of the bottom surface of the concave portion. It is assumed that.

According to a sixth aspect of the present invention, there is provided a method for forming an inter-element isolation insulating film according to the second aspect, wherein the step (b) comprises: e)
A step performed before the step (a), in which ions are implanted into a region to be a second corner by forming a recess on the upper surface of the substrate; and (f) a step performed after the step (a). And implanting ions into the substrate exposed at the bottom surface of the concave portion.

According to a seventh aspect of the present invention, a method for forming an inter-element isolation insulating film according to the sixth aspect is the method for forming an inter-element isolation insulating film according to the sixth aspect. e-
1) forming first and second coating layers on the upper surfaces of the first and second element formation regions of the substrate, respectively;
(E-2) implanting the ions into the substrate using the first and second coating layers as a mask. Step (a) is performed by (a-1) first and second coating layers. Forming the first and second sidewalls on the side wall portions of (a), and (a-2) etching the substrate using the first and second coating layers and the first and second sidewalls as a mask. It is characterized by being executed by.

According to a second aspect of the present invention, a method for forming an inter-element isolation insulating film according to the second aspect is the method for forming an inter-element isolation insulating film according to the second aspect. The method is performed by forming a non-single-crystal film on the substrate exposed in (a), and in step (c), the thermal oxide film is formed by thermally oxidizing the non-single-crystal film. Is what you do.

According to a ninth aspect of the present invention, there is provided a semiconductor device, comprising: (a) forming a concave portion from the upper surface of the substrate in the element isolation region; and (b) forming at least a side surface of the concave portion in the substrate. Non-single-crystallizing the first corner formed by the intersection with the bottom surface of the recess; and (c) step (b)
Forming a thermal oxide film in the concave portion, and (d) filling the concave portion with the insulating film by forming an insulating film on the thermal oxide film in the concave portion. It has an element isolation insulating film.

The semiconductor device according to a tenth aspect of the present invention is the semiconductor device according to the ninth aspect,
In the step (b), the second corner portion formed by the intersection of the upper surface of the substrate and the side surface of the concave portion in the substrate is also non-single-crystallized.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A problem in the conventional method for forming an element isolation insulating film using a trench isolation technique, that is, the thickness of a silicon oxide film formed by thermal oxidation becomes non-uniform, and protrusions on a silicon substrate, The problem of the formation of the acute angle portion of the silicon oxide film occurs because the silicon substrate made of single crystal silicon is directly thermally oxidized when forming the silicon oxide film by thermal oxidation. This is formed by a corner portion (first corner) formed by the intersection between the side surface of the trench and the bottom surface of the trench due to the plane orientation of the single crystal silicon, and by the intersection between the upper surface of the silicon substrate and the side surface of the trench. This is because the thermal oxidation reaction does not easily proceed at the corner portion (second corner portion) that is formed.

Therefore, before forming a silicon oxide film by thermal oxidation, silicon is non-single-crystallized at least at the corners of the silicon substrate, and silicon having no plane orientation is thermally oxidized to form a silicon oxide film. Thereby, the thickness of the silicon oxide film becomes uniform, and the above problem can be solved. Hereinafter, specific embodiments of the present invention will be described.

Embodiment 1 1 to 8 are sectional views sequentially showing a method for forming an element isolation insulating film according to the first embodiment of the present invention. Hereinafter, a method for forming an element isolation insulating film according to the first embodiment will be described in the order of steps with reference to FIGS. First, the upper surface of the P-type silicon substrate 1 is thermally oxidized, so that 1
A silicon oxide film 2 having a thickness of 0 to 30 nm is formed. Next, a silicon nitride film 3 having a thickness of 50 to 250 nm is deposited on the entire surface of the silicon oxide film 2 by the CVD method. Next, a resist pattern 4 having an opening above the element isolation region of the P-type silicon substrate 1 is formed by photolithography (FIG. 1).

Next, using the resist pattern 4 as a mask, the silicon nitride film 3 and the silicon oxide film 2 are sequentially etched to expose the P-type silicon substrate 1 in a region where the resist pattern 4 is not formed. After that, the resist pattern 4 is removed (FIG. 2). Next, the silicon nitride film 3
Using the (covering layer) as a mask, the P-type silicon substrate 1 is etched to a depth of 200 to 500 nm from the upper surface to form a trench 5 (FIG. 3). Thereby, the P-type silicon substrate 1 is exposed on the side and bottom surfaces of the trench 5, respectively.

Next, an ion acceleration voltage of 10 keV and an ion implantation amount of 5E14 atoms / cm ² are applied to the P-type silicon substrate 1 exposed on the side and bottom surfaces of the trench 5, respectively.
The silicon ions are implanted under the conditions described above. At this time, the P-type silicon substrate 1 is rotated while rotating the P-type silicon substrate 1 in order to prevent shadowing and properly implant silicon ions into the P-type silicon substrate 1 exposed on the side surfaces of the trench 5. Silicon ions are implanted at an angle of 15 degrees with respect to the normal direction of the bottom surface. As a result, silicon ions are implanted into the P-type silicon substrate 1 at an average range Rp = 15 nm, and near the surface of the P-type silicon substrate 1 exposed on the side and bottom surfaces of the trench 5, respectively.
An ion implantation region 6 is formed. Then, by the implantation of silicon ions, the P-type silicon substrate 1 in the ion-implanted region 6 becomes amorphous, and the plane orientation of the P-type silicon substrate 1 in this portion can be eliminated.

Here, the depth of the ion implantation region 6 is set to about half the thickness of a silicon oxide film formed in a thermal oxidation step described later. When a silicon oxide film is formed by thermal oxidation, about half of the thickness of the silicon oxide film is formed inside the P-type silicon substrate 1. Therefore, by setting the depth of the ion-implanted region 6 to be about half the thickness of the silicon oxide film, the ion-implanted region 6 that has been made amorphous does not remain in the P-type silicon substrate 1 after the thermal oxidation process. This is because it is possible to avoid generation of a leak current accompanying the amorphization of the P-type silicon substrate 1.

However, the depth of the ion implantation region 6 may be set to less than half the thickness of the silicon oxide film formed in the thermal oxidation step. In this case, the P-type silicon substrate 1 to be thermally oxidized is not completely amorphized, but the effect that the ion-implanted region 6 that has been amorphized does not remain in the P-type silicon substrate 1 after the thermal oxidation step is obtained. Can be.

Next, a silicon oxide film 7 is formed by thermally oxidizing the surface of the P-type silicon substrate 1 exposed on the side and bottom surfaces of the trench 5 (FIG. 5). As described above, the P-type silicon substrate 1 to be thermally oxidized
Is formed with an ion-implanted region 6, and P
The type silicon substrate 1 has no plane orientation. Therefore, the thermal oxidation reaction at the corner formed by the intersection between the upper surface of the P-type silicon substrate 1 and the side surface of the trench 5 and at the corner formed by the intersection of the side surface of the trench 5 and the bottom surface of the trench 5 are different. Progresses at the same speed as the thermal oxidation reaction in the portion.

Next, a silicon oxide film 8 is deposited on the entire surface by the CVD method so as to fill the inside of the trench 5 (FIG. 6). Next, the silicon oxide film 8 is etched back by CMP so that the silicon oxide film 2 is not exposed, and the surface is flattened (FIG. 7). Next, after removing the silicon nitride film 3 with hot phosphoric acid, the P-type silicon substrate 1 is removed.
The silicon oxide films 2 and 8 are removed with a hydrofluoric acid solution until the silicon oxide film 2 existing in the element formation region is removed (FIG. 8).

Through the above steps, an element isolation insulating film can be formed in the element isolation region of the P-type silicon substrate 1 as the silicon oxide films 7 and 8 shown in FIG.

In the above description, the case where silicon ions are used as ions to be implanted into the P-type silicon substrate 1 has been described as an example. However, the present invention is not limited to this, and it is possible to use germanium, oxygen, and nitrogen ions. Can also. The same applies to other embodiments described later.

In order to prevent shadowing,
Although the case where silicon ions are implanted obliquely to the normal direction of the bottom surface of the trench 5 has been described (FIG. 4), in addition to this step, as shown in FIG. A step of implanting silicon ions from the substrate. Thereby, silicon ions can be implanted uniformly into the P-type silicon substrate 1 exposed at the bottom surface of the trench 5, and the silicon substrate 1 in this portion can be more uniformly amorphized.

Further, a step of implanting silicon ions from the direction normal to the bottom surface of the trench 5 without performing the step of implanting silicon ions obliquely to the direction normal to the bottom surface of the trench 5 (FIG. 4). Only (FIG. 9) may be executed. In this case, silicon ions are not implanted into the P-type silicon substrate 1 exposed on the side surfaces of the trench 5, but silicon ions can be implanted into at least the P-type silicon substrate 1 exposed on the bottom surface of the trench 5. Of the silicon substrate 1 can be made amorphous.

As described above, according to the method for forming the element isolation insulating film according to the first embodiment, before the step of thermally oxidizing the silicon substrate, the silicon substrate exposed on the side and bottom surfaces of the trench, respectively. Silicon ions are implanted in the vicinity of the surface, and the portion of the silicon substrate corresponding to about half the thickness of the silicon oxide film formed by thermal oxidation is made amorphous. Therefore, since the silicon substrate to be thermally oxidized has no plane orientation, the thermal oxidation reaction proceeds uniformly on the side and bottom surfaces of the trench. As a result, the thickness of the silicon oxide film formed by thermal oxidation becomes uniform, and the projections on the silicon substrate and the sharp corners of the silicon oxide film, which have been problems in the conventional method of forming the inter-element isolation insulating film, occur. Absent. As a result, there is no electric field concentration caused by the protrusions of the silicon substrate or concentration of stress caused by the sharp corners of the silicon oxide film, and good element isolation insulation that can avoid the reverse narrow channel effect and the occurrence of leakage current. A membrane can be obtained.

It is to be noted that, in the case where only the step of implanting silicon ions from the direction normal to the bottom of the trench is performed without executing the step of implanting silicon ions obliquely to the direction normal to the bottom of the trench. Even so, an acute angle portion of the silicon oxide film does not occur due to the amorphization of the silicon substrate at the bottom portion of the trench, and generation of a leak current due to concentration of stress can be avoided.

Embodiment 2 10 to 17 are sectional views sequentially showing a method for forming an element isolation insulating film according to the second embodiment of the present invention. Hereinafter, a method for forming an element isolation insulating film according to the second embodiment will be described in the order of steps with reference to these drawings. First, a structure similar to the structure shown in FIG. 2 is obtained through the same steps as in the first embodiment.

Next, an ion accelerating voltage of 10 keV and an ion implantation amount of 5 are applied to the upper surface of the P-type silicon substrate 1 in a region where the silicon oxide film 2 and the silicon nitride film 3 are not formed.
Silicon ions are implanted under the condition of E14 atoms / cm ² .
As a result, the average range Rp of silicon ions is 15 nm.
Is implanted into the P-type silicon substrate 1 to form an ion-implanted region 9 near the upper surface of the P-type silicon substrate 1.
0). Then, by the implantation of silicon ions, the P-type silicon substrate 1 in the ion implantation region 9 is made amorphous,
The plane orientation of the P-type silicon substrate 1 in this portion can be eliminated.

Next, after a silicon oxide film is deposited on the entire surface by the CVD method, the silicon oxide film 2 and the silicon nitride film 3 are anisotropically dry-etched at a high etching rate in the depth direction of the P-type silicon substrate 1. The side wall 10 is formed on the side wall portion (FIG. 11). Next, using the silicon nitride film 3 and the sidewalls 10 as a mask, the P-type silicon substrate 1 is
To form a trench 11 (FIG. 12). Thereby, the P-type silicon substrate 1 is exposed on the side and bottom surfaces of the trench 11.

Next, an ion accelerating voltage of 10 ke is applied to the P-type silicon substrate 1 exposed on the bottom of the trench 11.
V, silicon ions are implanted from the normal direction of the bottom surface of the trench 11 under the condition that the ion implantation amount is 5E14 atoms / cm ² . As a result, the average range Rp = 15
nm into the P-type silicon substrate 1 and the trench 11
An ion implantation region 12 is formed near the surface of the P-type silicon substrate 1 exposed on the bottom surface of FIG. Then, the ion implantation region 12 is implanted by the implantation of silicon ions.
The P-type silicon substrate 1 is made amorphous, and the plane orientation of the P-type silicon substrate 1 in this portion can be eliminated. Here, the depth of the ion implantation region 12 is set to about half the thickness of the silicon oxide film formed in the subsequent thermal oxidation step for the same reason as described in the first embodiment.

Next, a silicon oxide film 13 is formed by thermally oxidizing the surface of the P-type silicon substrate 1 exposed on the side and bottom surfaces of the trench 11 (FIG. 14). At this time, in the P-type silicon substrate 1, ion implantation regions 9 and 12 are formed in a corner portion formed by the intersection of the upper surface of the P-type silicon substrate 1 and the side surface of the trench 11 and a bottom portion of the trench 11, respectively. Have been. Therefore, since the P-type silicon substrate 1 in each of these portions has no plane orientation, the thermal oxidation reaction in each of these portions proceeds at the same speed as the thermal oxidation reaction in the other portions of the P-type silicon substrate 1. .

Next, a silicon oxide film 8 is deposited on the entire surface by the CVD method so as to fill the inside of the trench 11 (FIG. 15). Next, the silicon oxide film 8 is etched back by CMP to such an extent that the silicon oxide film 2 is not exposed, and the surface is flattened (FIG. 16). Next, after removing the silicon nitride film 3 with hot phosphoric acid, the silicon oxide films 2 and 8 are removed with a hydrofluoric acid solution until the silicon oxide film 2 existing in the element formation region of the P-type silicon substrate 1 is removed. (FIG. 17).

Through the above steps, an element isolation insulating film can be formed in the element isolation region of the P-type silicon substrate 1 as the silicon oxide films 13 and 8 shown in FIG.

As described above, according to the method for forming an element isolation insulating film according to the second embodiment, in the step before the thermal oxidation step of the silicon substrate, the intersection between the upper surface of the silicon substrate and the side surface of the trench is formed. Ion-implanted regions are formed at the corners to be formed and at the bottom of the trench. Therefore, since the silicon substrate in each of these portions has no plane orientation, the thermal oxidation reaction in each of these portions proceeds at the same speed as the thermal oxidation reaction in other portions of the silicon substrate. As a result, the thickness of the silicon oxide film formed by thermal oxidation becomes uniform, and the projections on the silicon substrate and the sharp corners of the silicon oxide film, which have been problems in the conventional method of forming the inter-element isolation insulating film, occur. Absent.

When a trench is formed by etching a silicon substrate, a silicon nitride film and a sidewall are used as a mask, so that the width of the trench is narrower than the minimum trench width achievable by photolithography. Thus, a trench can be formed, and the area of the element formation region can be increased.

Embodiment 3 18 to 22 are sectional views sequentially showing a method of forming an element isolation insulating film according to the third embodiment of the present invention. Hereinafter, a method for forming an element isolation insulating film according to the third embodiment will be described in the order of steps with reference to these drawings. First, a structure similar to the structure shown in FIG. 3 is obtained through the same steps as in the first embodiment.

Next, a polysilicon film 14 is deposited on the entire surface by the CVD method (FIG. 18). At this time, as shown in FIG. 18, the polysilicon film 14 is deposited not only on the bottom surface of the trench 5 but also on the side surface.

Next, a silicon oxide film 15 is formed by thermally oxidizing the polysilicon film 14 deposited on the side and bottom surfaces of the trench 5 (FIG. 19). Polysilicon is polycrystalline silicon and has no plane orientation. Therefore, the polysilicon film 1 at the corner formed by the intersection of the upper surface of the P-type silicon substrate 1 and the side surface of the trench 5 is formed.
4 and the thermal oxidation reaction of the polysilicon film 14 in the corner portion formed by the intersection of the side surface of the trench 5 and the bottom surface of the trench 5 are the same as the thermal oxidation reaction in other portions of the polysilicon film 14. It progresses at the speed of.

Next, a silicon oxide film 8 is deposited on the entire surface by the CVD method so as to fill the inside of the trench 5 (FIG. 20). Next, the silicon oxide films 8 and 15 are etched back by the CMP method until the silicon oxide film 15 on the silicon nitride film 3 is removed, and the surface is flattened (FIG. 21). Next, after removing the silicon nitride film 3 with hot phosphoric acid, the silicon oxide films 2 and 8 are removed with a hydrofluoric acid solution until the silicon oxide film 2 existing in the element formation region of the P-type silicon substrate 1 is removed. (FIG. 22).

Through the above steps, an element isolation insulating film can be formed in the element isolation region of the P-type silicon substrate 1 as the silicon oxide films 15 and 8 shown in FIG.

In the above description, the case where the polysilicon film 14 is deposited on the side and bottom surfaces of the trench 5 has been described. However, an amorphous silicon film may be deposited instead of the polysilicon film.

As described above, according to the method of forming the isolation insulating film according to the third embodiment, the polysilicon film deposited on the side and bottom surfaces of the trench is thermally oxidized.
A silicon oxide film is formed. Polysilicon is polycrystalline silicon and has no plane orientation. Therefore, the thermal oxidation reaction of the polysilicon film at the corner formed by the intersection of the upper surface of the silicon substrate and the side surface of the trench, and the polysilicon film at the corner formed by the intersection of the side surface of the trench and the bottom surface of the trench. The thermal oxidation reaction proceeds at the same speed as the thermal oxidation reaction in other portions of the polysilicon film. As a result, the thickness of the silicon oxide film formed by thermal oxidation becomes uniform,
The projections on the silicon substrate and the sharp corners of the silicon oxide film, which are problems in the conventional method for forming the element isolation insulating film, do not occur.

[0052]

According to the present invention, in the step (c), the first step is performed in the step (b).
A thermal oxide film is formed in the concave portion by thermally oxidizing a substrate whose corners are previously non-single-crystallized. Then, due to the non-single crystallization of the first corner, the substrate in this portion does not have plane orientation, so that the thermal oxidation reaction proceeds uniformly in the concave portion, and as a result, the thermal oxidation having a uniform film thickness A film can be formed.

According to the second aspect of the present invention, in the step (c), the substrate in which the first and second corners are non-single-crystallized in the step (b) is heated. Oxidation forms a thermal oxide film in the recess. Then, due to the non-single crystallization of the first and second corners, the substrate in these portions does not have plane orientation, so that the thermal oxidation reaction proceeds more uniformly in the concave portion, and as a result, the thermal oxidation reaction becomes more uniform. A thermal oxide film having a thickness can be formed.

According to the third aspect of the present invention, since ions are implanted into the substrate exposed at the side and bottom surfaces of the recess, the surface of the substrate exposed by the formation of the recess extends over the entire surface. Can be non-single-crystallized.

According to the fourth aspect of the present invention, since a thermal oxide film is formed in the region of the substrate into which the ions have been implanted, the substrate after the step (c) is made of a non-single crystal. Thus, the formation of a leakage current due to non-single crystallization of the substrate can be avoided.

According to the fifth aspect of the present invention, ions can be uniformly implanted into the substrate exposed on the side and bottom surfaces of the recess.

According to the sixth aspect of the present invention, the second corner of the substrate can be made non-single-crystallized by the step (e), and the first corner of the substrate can be made by the step (f).
Can be non-single-crystallized. Therefore, since the first and second corners of the substrate have no plane orientation, the thermal oxidation reaction in the step (c) proceeds uniformly in the recess.

According to the seventh aspect of the present invention, in the step (a), the substrate is etched using the first and second cover layers and the first and second sidewalls as a mask. Thereby, a concave portion is formed. Therefore, the distance between the first coating layer and the second coating layer is smaller than the distance between the first coating layer and the second coating layer.
In addition, the recess can be formed with a width narrower by the width of the second sidewall.

The implantation of ions into the substrate is performed using the first and second coating layers as masks, while the etching of the substrate is performed by etching the first and second coating layers and the first and second sidewalls. Since this is performed as a mask, a region which is non-single-crystallized by ion implantation can be left below each of the first and second sidewalls.

According to the eighth aspect of the present invention, in the step (c), the non-single-crystal film formed on the substrate exposed in the step (a) is thermally oxidized, A thermal oxide film is formed. Therefore, the thermal oxidation reaction of the non-single-crystal film at the first and second corners proceeds at the same speed as the thermal oxidation reaction at other portions of the non-single-crystal film. An oxide film can be formed.

Further, according to the ninth aspect of the present invention, in the step (b), the substrate whose first corner is non-single-crystallized in advance is thermally oxidized, so that the substrate is formed in the recess. A thermal oxide film is formed. Then, due to non-single crystallization of the first corner, the substrate in this portion does not have plane orientation,
The thermal oxidation reaction proceeds uniformly in the recess, and as a result,
The thickness of the formed thermal oxide film becomes uniform.

According to the tenth aspect of the present invention, in the step (c), the substrate whose first and second corners are non-single-crystallized in the step (b) is heated. Oxidation forms a thermal oxide film in the recess.
Then, due to the non-single crystallization of the first and second corners, the substrate in these portions does not have a plane orientation, so that the thermal oxidation reaction proceeds more uniformly in the concave portions, and as a result, it is formed. The thickness of the thermal oxide film becomes more uniform.

[Brief description of the drawings]

FIG. 1 is a sectional view sequentially showing a method for forming an element isolation insulating film according to a first embodiment of the present invention.

FIG. 2 is a sectional view sequentially showing a method of forming an element isolation insulating film according to the first embodiment of the present invention.

3A to 3C are cross-sectional views sequentially showing a method for forming an element isolation insulating film according to the first embodiment of the present invention.

4A to 4C are cross-sectional views sequentially showing a method for forming an element isolation insulating film according to the first embodiment of the present invention.

FIGS. 5A to 5C are cross-sectional views sequentially showing a method of forming an element isolation insulating film according to the first embodiment of the present invention.

6A to 6C are cross-sectional views sequentially showing a method for forming an element isolation insulating film according to the first embodiment of the present invention.

FIGS. 7A to 7C are cross-sectional views sequentially showing a method for forming an element isolation insulating film according to the first embodiment of the present invention.

FIGS. 8A to 8C are cross-sectional views sequentially showing a method for forming an element isolation insulating film according to the first embodiment of the present invention.

FIG. 9 is a cross-sectional view showing one step of a method for forming an element isolation insulating film according to Embodiment 1 of the present invention.

FIG. 10 is a sectional view sequentially showing a method of forming an element isolation insulating film according to a second embodiment of the present invention.

FIG. 11 is a sectional view sequentially showing a method of forming an element isolation insulating film according to a second embodiment of the present invention.

FIG. 12 is a sectional view sequentially showing a method of forming an element isolation insulating film according to a second embodiment of the present invention.

13A to 13C are cross-sectional views sequentially showing a method for forming an element isolation insulating film according to a second embodiment of the present invention.

FIG. 14 is a sectional view sequentially showing a method of forming an element isolation insulating film according to a second embodiment of the present invention.

FIG. 15 is a cross-sectional view sequentially showing a method for forming an element isolation insulating film according to the second embodiment of the present invention.

FIG. 16 is a sectional view sequentially showing a method of forming an element isolation insulating film according to a second embodiment of the present invention.

FIG. 17 is a cross-sectional view sequentially showing a method for forming an element isolation insulating film according to the second embodiment of the present invention.

FIG. 18 is a cross-sectional view sequentially showing a method of forming an element isolation insulating film according to a third embodiment of the present invention.

FIG. 19 is a cross-sectional view sequentially showing a method for forming an element isolation insulating film according to the third embodiment of the present invention.

FIG. 20 is a sectional view sequentially showing a method of forming an element isolation insulating film according to the third embodiment of the present invention.

FIG. 21 is a sectional view sequentially showing a method of forming an element isolation insulating film according to a third embodiment of the present invention.

FIG. 22 is a sectional view sequentially showing a method of forming an element isolation insulating film according to the third embodiment of the present invention.

FIG. 23 is a cross-sectional view schematically showing a structure of a conventional semiconductor device having an element isolation insulating film formed by a trench isolation technique.

FIG. 24 is a sectional view sequentially showing a conventional method for forming an element isolation insulating film using a trench isolation technique.

FIG. 25 is a sectional view sequentially showing a conventional method of forming an element isolation insulating film using a trench isolation technique.

FIG. 26 is a sectional view sequentially showing a conventional method for forming an element isolation insulating film using a trench isolation technique.

FIG. 27 is a sectional view sequentially showing a conventional method of forming an element isolation insulating film using a trench isolation technique.

FIG. 28 is a cross-sectional view sequentially showing a conventional method for forming an element isolation insulating film using a trench isolation technique.

FIG. 29 is a sectional view sequentially showing a conventional method of forming an element isolation insulating film using a trench isolation technique.

FIG. 30 is a cross-sectional view sequentially showing a conventional method for forming an element isolation insulating film using a trench isolation technique.

FIG. 31 is a sectional view in the depth direction of an X portion of the semiconductor device shown in FIG. 23;

[Explanation of symbols]

1 P-type silicon substrate, 2, 7, 8, 13, 15 silicon oxide film, 3 silicon nitride film, 4 resist pattern, 5, 11 trench, 6, 9, 12 ion implantation region, 10 sidewall, 14 polysilicon film .

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Shuichi Ueno 2-3-2 Marunouchi, Chiyoda-ku, Tokyo F-term in Mitsubishi Electric Corporation (reference) 5F032 AA35 AA44 AA45 AA74 CA17 DA02 DA24 DA30 DA33 DA34 DA44 DA53 DA60 DA77 DA78 5F058 BA02 BA04 BD01 BD04 BE07 BF02 BF52 BH10 BJ06

Claims (10)

[Claims] 1. A step of forming a recess from the top surface of a substrate in an inter-element isolation region; and (b) a step formed by intersecting at least a side surface of the recess and a bottom surface of the recess in the substrate. (C) forming a thermal oxide film in the concave portion, which is performed after the step (b), and (d) performing the thermal oxidation in the concave portion. Filling the concave portion with the insulating film by forming an insulating film on the film. 2. In the step (b), of the substrate, a second corner formed by an intersection between the upper surface of the substrate and the side surface of the recess is also non-single-crystallized. Item 2. The method for forming an element isolation insulating film according to Item 1. 3. The element isolation insulating film according to claim 2, wherein the step (b) is performed by implanting ions into the substrate exposed on the side and bottom surfaces of the recess. Formation method. 4. The method according to claim 1, wherein a depth of the ion implantation into the substrate is equal to or less than a thickness of a portion of the thermal oxide film formed in the step (c) formed in the substrate. The method for forming an element isolation insulating film according to claim 3. 5. The step of implanting the ions into the substrate, the step of: implanting the ions into the substrate obliquely with respect to a direction normal to the bottom surface of the recess; 4. The method according to claim 3, wherein the method is performed by implanting the ions into the substrate from a linear direction. 6. The step (b) is performed before (e) the step (a), and the second step is performed by forming the recess in the upper surface of the substrate.
(F) implanting ions into the substrate exposed after the step (a) and exposed at the bottom surface of the recess, which is performed after the step (a). The method for forming an element isolation insulating film according to claim 2, wherein: 7. The step (e) includes: (e-1) forming first and second coating layers on the upper surfaces of the first and second element formation regions of the substrate, respectively. (E-2) Using the first and second coating layers as masks,
Implanting the ions into the substrate. The step (a) includes: (a-1) providing first and second sidewalls on sidewall portions of the first and second coating layers, respectively. The method according to claim 6, wherein the step of forming is performed by: (a-2) a step of etching the substrate using the first and second coating layers and the first and second sidewalls as a mask. A method for forming an element isolation insulating film. 8. The step (b) is performed by forming a non-single-crystal film on the substrate exposed in the step (a). In the step (c), the thermal oxide film includes: 3. The method according to claim 2, wherein the non-single-crystal film is formed by thermally oxidizing the non-single-crystal film. 9. A step of (a) forming a recess from the top surface of the substrate in the element isolation region; and (b) a step formed by intersecting at least a side surface of the recess and a bottom surface of the recess in the substrate. (C) forming a thermal oxide film in the concave portion, which is performed after the step (b), and (d) performing the thermal oxidation in the concave portion. A step of filling the concave portion with the insulating film by forming an insulating film on the film. 10. In the step (b), of the substrate, a second corner formed by an intersection between the upper surface of the substrate and the side surface of the recess is also non-single-crystallized. The semiconductor device according to claim 9.