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ITMI20060350A1 - Amplificatore di lettura con ridotta occupazione d'area per memorie a semiconduttore - Google Patents

Amplificatore di lettura con ridotta occupazione d'area per memorie a semiconduttore

Info

Publication number
ITMI20060350A1
ITMI20060350A1 IT000350A ITMI20060350A ITMI20060350A1 IT MI20060350 A1 ITMI20060350 A1 IT MI20060350A1 IT 000350 A IT000350 A IT 000350A IT MI20060350 A ITMI20060350 A IT MI20060350A IT MI20060350 A1 ITMI20060350 A1 IT MI20060350A1
Authority
IT
Italy
Prior art keywords
semiconductor memories
reduced area
reading amplifier
employment
area employment
Prior art date
Application number
IT000350A
Other languages
English (en)
Inventor
Antonio Giambartino
Placa Michele La
Ignazio Martines
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT000350A priority Critical patent/ITMI20060350A1/it
Priority to US11/713,067 priority patent/US7843738B2/en
Publication of ITMI20060350A1 publication Critical patent/ITMI20060350A1/it
Priority to US12/911,575 priority patent/US8254194B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/067—Single-ended amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/06—Sense amplifier related aspects
    • G11C2207/063—Current sense amplifiers
IT000350A 2006-02-28 2006-02-28 Amplificatore di lettura con ridotta occupazione d'area per memorie a semiconduttore ITMI20060350A1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT000350A ITMI20060350A1 (it) 2006-02-28 2006-02-28 Amplificatore di lettura con ridotta occupazione d'area per memorie a semiconduttore
US11/713,067 US7843738B2 (en) 2006-02-28 2007-02-28 Sense amplifier with reduced area occupation for semiconductor memories
US12/911,575 US8254194B2 (en) 2006-02-28 2010-10-25 Sense amplifier with reduced area occupation for semiconductor memories

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000350A ITMI20060350A1 (it) 2006-02-28 2006-02-28 Amplificatore di lettura con ridotta occupazione d'area per memorie a semiconduttore

Publications (1)

Publication Number Publication Date
ITMI20060350A1 true ITMI20060350A1 (it) 2007-09-01

Family

ID=38949095

Family Applications (1)

Application Number Title Priority Date Filing Date
IT000350A ITMI20060350A1 (it) 2006-02-28 2006-02-28 Amplificatore di lettura con ridotta occupazione d'area per memorie a semiconduttore

Country Status (2)

Country Link
US (2) US7843738B2 (it)
IT (1) ITMI20060350A1 (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMI20060536A1 (it) * 2006-03-23 2007-09-24 St Microelectronics Srl Amplificatore di lettura con ridotto consumo di corrente per memorie a semiconduttore
KR101105434B1 (ko) * 2009-03-02 2012-01-17 주식회사 하이닉스반도체 반도체 메모리 장치의 전류 감지 특성 평가 장치 및 방법
CN102185569B (zh) * 2011-04-07 2017-07-07 北京中星微电子有限公司 一种d类放大器的输出级电路
US8593876B2 (en) 2011-04-13 2013-11-26 Micron Technology, Inc. Sensing scheme in a memory device
US8994406B2 (en) * 2011-12-19 2015-03-31 Nanyang Technological University Digital cell
US10762953B2 (en) 2018-12-13 2020-09-01 International Business Machines Corporation Memory array with reduced circuitry

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6044019A (en) * 1998-10-23 2000-03-28 Sandisk Corporation Non-volatile memory with improved sensing and method therefor
US6625057B2 (en) * 2000-11-17 2003-09-23 Kabushiki Kaisha Toshiba Magnetoresistive memory device
US6717449B2 (en) * 2001-10-23 2004-04-06 Olympus Corporation Variable resistance circuit and application circuits using the variable resistance circuit
US6775178B2 (en) * 2002-04-04 2004-08-10 Honeywell International Inc. SEU resistant SRAM using feedback MOSFET
ITTO20030121A1 (it) * 2003-02-18 2004-08-19 St Microelectronics Srl Amplificatore di lettura di celle di memoria non volatili a
JP2004258946A (ja) * 2003-02-26 2004-09-16 Renesas Technology Corp メモリカード
DE60317768T2 (de) 2003-04-10 2008-11-27 Stmicroelectronics S.R.L., Agrate Brianza Verfahren zum Auslesen einer nichtflüchtigen Speichervorrichtung und zugehörige Vorrichtung
ITMI20031619A1 (it) * 2003-08-06 2005-02-07 St Microelectronics Srl Amplificatore di rilevamento perfezionato.
EP1505605A1 (en) 2003-08-06 2005-02-09 STMicroelectronics S.r.l. Improved sensing circuit for a semiconductor memory including bit line precharging and discharging functions
NO324029B1 (no) * 2004-09-23 2007-07-30 Thin Film Electronics Asa Lesemetode og deteksjonsanordning

Also Published As

Publication number Publication date
US7843738B2 (en) 2010-11-30
US20110110169A1 (en) 2011-05-12
US20080013381A1 (en) 2008-01-17
US8254194B2 (en) 2012-08-28

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