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IT1404161B1 - Metodo e sistema per migliorare il controllo del limite dei cicli di scrittura di una carta a circuito integrato - Google Patents

Metodo e sistema per migliorare il controllo del limite dei cicli di scrittura di una carta a circuito integrato

Info

Publication number
IT1404161B1
IT1404161B1 ITMI2010A002475A ITMI20102475A IT1404161B1 IT 1404161 B1 IT1404161 B1 IT 1404161B1 IT MI2010A002475 A ITMI2010A002475 A IT MI2010A002475A IT MI20102475 A ITMI20102475 A IT MI20102475A IT 1404161 B1 IT1404161 B1 IT 1404161B1
Authority
IT
Italy
Prior art keywords
limit
improve
integrated circuit
control
circuit card
Prior art date
Application number
ITMI2010A002475A
Other languages
English (en)
Inventor
Francesco Varone
Stasio Vitantonio Di
Pasquale Vastano
Amedeo Veneroso
Original Assignee
Incard Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Incard Sa filed Critical Incard Sa
Priority to ITMI2010A002475A priority Critical patent/IT1404161B1/it
Priority to PCT/EP2011/006554 priority patent/WO2012089333A1/en
Priority to BR112013016748A priority patent/BR112013016748A2/pt
Priority to US13/976,686 priority patent/US20140025869A1/en
Priority to EP11810805.9A priority patent/EP2659379B1/en
Publication of ITMI20102475A1 publication Critical patent/ITMI20102475A1/it
Application granted granted Critical
Publication of IT1404161B1 publication Critical patent/IT1404161B1/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G06F2212/1036—Life time enhancement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7211—Wear leveling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Credit Cards Or The Like (AREA)
ITMI2010A002475A 2010-12-30 2010-12-30 Metodo e sistema per migliorare il controllo del limite dei cicli di scrittura di una carta a circuito integrato IT1404161B1 (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
ITMI2010A002475A IT1404161B1 (it) 2010-12-30 2010-12-30 Metodo e sistema per migliorare il controllo del limite dei cicli di scrittura di una carta a circuito integrato
PCT/EP2011/006554 WO2012089333A1 (en) 2010-12-30 2011-12-23 Method and system for improving a control of a limit on writing cycles of an ic card
BR112013016748A BR112013016748A2 (pt) 2010-12-30 2011-12-23 método para controlar um número de ciclos de escrita suportado por uma porção e cartão com circuito integrado
US13/976,686 US20140025869A1 (en) 2010-12-30 2011-12-23 Method and system for improving a control of a limit on writing cycles of an ic card
EP11810805.9A EP2659379B1 (en) 2010-12-30 2011-12-23 Method and system for improving a control of a limit on writing cycles of an ic card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI2010A002475A IT1404161B1 (it) 2010-12-30 2010-12-30 Metodo e sistema per migliorare il controllo del limite dei cicli di scrittura di una carta a circuito integrato

Publications (2)

Publication Number Publication Date
ITMI20102475A1 ITMI20102475A1 (it) 2012-07-01
IT1404161B1 true IT1404161B1 (it) 2013-11-15

Family

ID=43737127

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI2010A002475A IT1404161B1 (it) 2010-12-30 2010-12-30 Metodo e sistema per migliorare il controllo del limite dei cicli di scrittura di una carta a circuito integrato

Country Status (5)

Country Link
US (1) US20140025869A1 (it)
EP (1) EP2659379B1 (it)
BR (1) BR112013016748A2 (it)
IT (1) IT1404161B1 (it)
WO (1) WO2012089333A1 (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9026720B2 (en) * 2013-02-07 2015-05-05 Apple Inc. Non-volatile memory monitoring
US9153331B2 (en) 2013-03-13 2015-10-06 Sandisk Technologies Inc. Tracking cell erase counts of non-volatile memory

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6000006A (en) * 1997-08-25 1999-12-07 Bit Microsystems, Inc. Unified re-map and cache-index table with dual write-counters for wear-leveling of non-volatile flash RAM mass storage
US7610438B2 (en) * 2000-01-06 2009-10-27 Super Talent Electronics, Inc. Flash-memory card for caching a hard disk drive with data-area toggling of pointers stored in a RAM lookup table
US7113432B2 (en) * 2000-09-14 2006-09-26 Sandisk Corporation Compressed event counting technique and application to a flash memory system
US6732221B2 (en) * 2001-06-01 2004-05-04 M-Systems Flash Disk Pioneers Ltd Wear leveling of static areas in flash memory
US8112574B2 (en) * 2004-02-26 2012-02-07 Super Talent Electronics, Inc. Swappable sets of partial-mapping tables in a flash-memory system with a command queue for combining flash writes
US20070208904A1 (en) * 2006-03-03 2007-09-06 Wu-Han Hsieh Wear leveling method and apparatus for nonvolatile memory
US7653778B2 (en) * 2006-05-08 2010-01-26 Siliconsystems, Inc. Systems and methods for measuring the useful life of solid-state storage devices
US7464240B2 (en) * 2006-05-23 2008-12-09 Data Ram, Inc. Hybrid solid state disk drive with controller
US7424587B2 (en) * 2006-05-23 2008-09-09 Dataram, Inc. Methods for managing data writes and reads to a hybrid solid-state disk drive
US7461229B2 (en) * 2006-05-23 2008-12-02 Dataram, Inc. Software program for managing and protecting data written to a hybrid solid-state disk drive
US8060718B2 (en) * 2006-06-20 2011-11-15 International Business Machines Updating a memory to maintain even wear
KR100881669B1 (ko) * 2006-12-18 2009-02-06 삼성전자주식회사 비휘발성 데이터 저장장치의 정적 데이터 영역 검출 방법,마모도 평준화 방법 및 데이터 유닛 병합 방법과 그 장치
CN101354681B (zh) * 2008-09-23 2010-12-01 美商威睿电通公司 存储器系统、非易失性存储器的磨损均衡方法及装置
US8327066B2 (en) * 2008-09-30 2012-12-04 Samsung Electronics Co., Ltd. Method of managing a solid state drive, associated systems and implementations
TWI379194B (en) * 2009-01-15 2012-12-11 Phison Electronics Corp Block management method for flash memory, and storage system and controller using the same
US8051241B2 (en) * 2009-05-07 2011-11-01 Seagate Technology Llc Wear leveling technique for storage devices
US8411519B2 (en) * 2010-06-04 2013-04-02 Apple Inc. Selective retirement of blocks

Also Published As

Publication number Publication date
US20140025869A1 (en) 2014-01-23
ITMI20102475A1 (it) 2012-07-01
BR112013016748A2 (pt) 2016-10-11
EP2659379A1 (en) 2013-11-06
WO2012089333A1 (en) 2012-07-05
EP2659379B1 (en) 2014-12-03

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